Changeset 67034 in vbox for trunk/src/VBox
- Timestamp:
- May 23, 2017 11:10:57 AM (8 years ago)
- Location:
- trunk/src/VBox
- Files:
-
- 4 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMAll/IEMAllInstructionsPython.py
r67030 r67034 253 253 'Md_RO': ( 'IDX_UseModRM', 'rm', '%Md', 'Md', ), 254 254 'Md_WO': ( 'IDX_UseModRM', 'rm', '%Md', 'Md', ), 255 'Mdq_WO': ( 'IDX_UseModRM', 'rm', '%Mdq', 'Mdq', ), 255 256 'Mq': ( 'IDX_UseModRM', 'rm', '%Mq', 'Mq', ), 256 257 'Mq_WO': ( 'IDX_UseModRM', 'rm', '%Mq', 'Mq', ), … … 272 273 'Vd_WO': ( 'IDX_UseModRM', 'reg', '%Vd', 'Vd', ), 273 274 'VdZx_WO': ( 'IDX_UseModRM', 'reg', '%Vd', 'Vd', ), 275 'Vdq': ( 'IDX_UseModRM', 'reg', '%Vdq', 'Vdq', ), 274 276 'Vss': ( 'IDX_UseModRM', 'reg', '%Vss', 'Vss', ), 275 277 'Vss_WO': ( 'IDX_UseModRM', 'reg', '%Vss', 'Vss', ), -
trunk/src/VBox/VMM/VMMAll/IEMAllInstructionsTwoByte0f.cpp.h
r67033 r67034 8977 8977 * @opcode 0xe7 8978 8978 * @opcodesub 11 mr/reg 8979 * @oppfx f28979 * @oppfx none 8980 8980 * @opunused immediate 8981 8981 * @opcpuid sse … … 8985 8985 } 8986 8986 8987 /** Opcode 0x66 0x0f 0xe7 - movntdq Mx, Vx */ 8988 FNIEMOP_DEF(iemOp_movntdq_Mx_Vx) 8989 { 8987 /** 8988 * @opcode 0xe7 8989 * @opcodesub !11 mr/reg 8990 * @oppfx 0x66 8991 * @opcpuid sse2 8992 * @opgroup og_sse2_cachect 8993 * @opxcpttype 1 8994 * @optest op1=-1 op2=2 -> op1=2 8995 * @optest op1=0 op2=-42 -> op1=-42 8996 */ 8997 FNIEMOP_DEF(iemOp_movntdq_Mdq_Vdq) 8998 { 8999 IEMOP_MNEMONIC2(MR_MEM, MOVNTDQ, movntdq, Mdq_WO, Vdq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 8990 9000 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); 8991 9001 if ((bRm & X86_MODRM_MOD_MASK) != (3 << X86_MODRM_MOD_SHIFT)) 8992 9002 { 8993 9003 /* Register, memory. */ 8994 IEMOP_MNEMONIC(movntdq_Mx_Vx, "movntdq Mx,Vx");8995 9004 IEM_MC_BEGIN(0, 2); 8996 9005 IEM_MC_LOCAL(RTUINT128U, uSrc); … … 9010 9019 } 9011 9020 9012 /* The register, register encoding is invalid. */ 9021 /** 9022 * @opdone 9023 * @opmnemonic ud660fe7reg 9024 * @opcode 0xe7 9025 * @opcodesub 11 mr/reg 9026 * @oppfx 0x66 9027 * @opunused immediate 9028 * @opcpuid sse 9029 * @optest -> 9030 */ 9013 9031 return IEMOP_RAISE_INVALID_OPCODE(); 9014 9032 } … … 9450 9468 /* 0xe5 */ iemOp_pmulhw_Pq_Qq, iemOp_pmulhw_Vx_Wx, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 9451 9469 /* 0xe6 */ iemOp_InvalidNeedRM, iemOp_cvttpd2dq_Vx_Wpd, iemOp_cvtdq2pd_Vx_Wpd, iemOp_cvtpd2dq_Vx_Wpd, 9452 /* 0xe7 */ iemOp_movntq_Mq_Pq, iemOp_movntdq_M x_Vx,iemOp_InvalidNeedRM, iemOp_InvalidNeedRM,9470 /* 0xe7 */ iemOp_movntq_Mq_Pq, iemOp_movntdq_Mdq_Vdq, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 9453 9471 /* 0xe8 */ iemOp_psubsb_Pq_Qq, iemOp_psubsb_Vx_W, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 9454 9472 /* 0xe9 */ iemOp_psubsw_Pq_Qq, iemOp_psubsw_Vx_Wx, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, -
trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-generated-1-template.c
r67033 r67034 4565 4565 break; 4566 4566 4567 case BS3CG1ENC_MODRM_Mdq_WO_Vdq: 4568 pThis->pfnEncoder = Bs3Cg1EncodeNext_MODRM_MsomethingWO_Vsomething; 4569 pThis->iRmOp = 0; 4570 pThis->iRegOp = 1; 4571 pThis->aOperands[0].cbOp = 16; 4572 pThis->aOperands[1].cbOp = 16; 4573 pThis->aOperands[0].enmLocation = BS3CG1OPLOC_MEM_WO; 4574 pThis->aOperands[1].enmLocation = BS3CG1OPLOC_CTX; 4575 pThis->aOperands[1].idxFieldBase = BS3CG1DST_XMM0; 4576 break; 4577 4567 4578 case BS3CG1ENC_MODRM_Mq_WO_Pq: 4568 4579 pThis->pfnEncoder = Bs3Cg1EncodeNext_MODRM_Mq_WO_Pq; -
trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-generated-1.h
r67033 r67034 117 117 BS3CG1OP_Md_RO, 118 118 BS3CG1OP_Md_WO, 119 BS3CG1OP_Mdq_WO, 119 120 BS3CG1OP_Mq, 120 121 BS3CG1OP_Mq_WO, … … 173 174 BS3CG1ENC_MODRM_Md_RO, 174 175 BS3CG1ENC_MODRM_Md_WO, 176 BS3CG1ENC_MODRM_Mdq_WO_Vdq, 175 177 BS3CG1ENC_MODRM_Mq_WO_Pq, 176 178 BS3CG1ENC_MODRM_Mq_WO_Vq,
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