Changeset 71093 in vbox for trunk/src/VBox/VMM/VMMAll/IEMAllCImplSvmInstr.cpp.h
- Timestamp:
- Feb 22, 2018 9:15:09 AM (7 years ago)
- File:
-
- 1 edited
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trunk/src/VBox/VMM/VMMAll/IEMAllCImplSvmInstr.cpp.h
r71069 r71093 956 956 && !(uErr & X86_TRAP_PF_ID)) 957 957 { 958 /** @todo Nested-guest SVM - figure out fetching op-code bytes from IEM. */959 958 PSVMVMCBCTRL pVmcbCtrl = &pCtx->hwvirt.svm.CTX_SUFF(pVmcb)->ctrl; 960 959 #ifdef IEM_WITH_CODE_TLB 961 uint8_t const cbCurrent = pVCpu->iem.s.cbInstrBuf;962 960 uint8_t const *pbInstrBuf = pVCpu->iem.s.pbInstrBuf; 961 uint8_t const cbInstrBuf = pVCpu->iem.s.cbInstrBuf; 962 pVmcbCtrl->cbInstrFetched = RT_MIN(cbInstrBuf, SVM_CTRL_GUEST_INSTR_BYTES_MAX); 963 963 if ( pbInstrBuf 964 && cbCurrent >= SVM_CTRL_GUEST_INSTR_BYTES_MAX) 965 { 966 pVmcbCtrl->cbInstrFetched = SVM_CTRL_GUEST_INSTR_BYTES_MAX; 967 memcpy(&pVmcbCtrl->abInstr[0], pbInstrBuf, SVM_CTRL_GUEST_INSTR_BYTES_MAX); 968 } 969 else 970 { AssertReleaseFailedReturn(VERR_IEM_IPE_5); /** @todo */ } 964 && cbInstrBuf > 0) 965 memcpy(&pVmcbCtrl->abInstr[0], pbInstrBuf, pVmcbCtrl->cbInstrFetched); 971 966 #else 972 uint8_t const offOpCode = pVCpu->iem.s.offOpcode; 973 uint8_t const cbCurrent = pVCpu->iem.s.cbOpcode - offOpCode; 974 if (cbCurrent >= SVM_CTRL_GUEST_INSTR_BYTES_MAX) 975 { 976 pVmcbCtrl->cbInstrFetched = SVM_CTRL_GUEST_INSTR_BYTES_MAX; 977 memcpy(&pVmcbCtrl->abInstr[0], &pVCpu->iem.s.abOpcode[offOpCode], SVM_CTRL_GUEST_INSTR_BYTES_MAX); 978 } 979 else 980 { AssertReleaseFailedReturn(VERR_IEM_IPE_5); /** @todo */ } 967 uint8_t const cbOpcode = pVCpu->iem.s.cbOpcode; 968 pVmcbCtrl->cbInstrFetched = RT_MIN(cbOpcode, SVM_CTRL_GUEST_INSTR_BYTES_MAX); 969 if (cbOpcode > 0) 970 memcpy(&pVmcbCtrl->abInstr[0], &pVCpu->iem.s.abOpcode[0], pVmcbCtrl->cbInstrFetched); 981 971 #endif 982 972 } 973 if (u8Vector == X86_XCPT_BR) 974 IEM_SVM_UPDATE_NRIP(pVCpu); 983 975 Log2(("iemHandleSvmNstGstEventIntercept: Xcpt intercept u32InterceptXcpt=%#RX32 u8Vector=%#x " 984 976 "uExitInfo1=%#RX64 uExitInfo2=%#RX64 -> #VMEXIT\n", pCtx->hwvirt.svm.CTX_SUFF(pVmcb)->ctrl.u32InterceptXcpt, … … 996 988 uint64_t const uExitInfo1 = IEM_GET_GUEST_CPU_FEATURES(pVCpu)->fSvmDecodeAssists ? u8Vector : 0; 997 989 Log2(("iemHandleSvmNstGstEventIntercept: Software INT intercept (u8Vector=%#x) -> #VMEXIT\n", u8Vector)); 990 IEM_SVM_UPDATE_NRIP(pVCpu); 998 991 IEM_RETURN_SVM_VMEXIT(pVCpu, SVM_EXIT_SWINT, uExitInfo1, 0 /* uExitInfo2 */); 999 992 } … … 1043 1036 { 1044 1037 Log3(("iemSvmHandleIOIntercept: u16Port=%#x (%u) -> #VMEXIT\n", u16Port, u16Port)); 1038 IEM_SVM_UPDATE_NRIP(pVCpu); 1045 1039 return iemSvmVmexit(pVCpu, pCtx, SVM_EXIT_IOIO, IoExitInfo.u, pCtx->rip + cbInstr); 1046 1040 } … … 1070 1064 * @param fWrite Whether this is an MSR write access, @c false implies an 1071 1065 * MSR read. 1066 * @param cbInstr The length of the MSR read/write instruction in bytes. 1072 1067 */ 1073 1068 IEM_STATIC VBOXSTRICTRC iemSvmHandleMsrIntercept(PVMCPU pVCpu, PCPUMCTX pCtx, uint32_t idMsr, bool fWrite) … … 1100 1095 pbMsrpm += offMsrpm; 1101 1096 if (ASMBitTest(pbMsrpm, uMsrpmBit)) 1097 { 1098 IEM_SVM_UPDATE_NRIP(pVCpu); 1102 1099 return iemSvmVmexit(pVCpu, pCtx, SVM_EXIT_MSR, uExitInfo1, 0 /* uExitInfo2 */); 1100 } 1103 1101 } 1104 1102 else
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