Changeset 71927 in vbox for trunk/src/VBox/VMM/VMMR0

Timestamp:

Apr 20, 2018 4:18:24 AM (7 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

122171

Message:

VMM/HM: Naming, nits.

File:

• trunk/src/VBox/VMM/VMMR0/HMSVMR0.cpp (modified) (8 diffs)

trunk/src/VBox/VMM/VMMR0/HMSVMR0.cpp

@@ -3913 +3913 @@
         Log4(("ctrl.IntCtrl.u1VIrqPending            %#x\n",      pVmcb->ctrl.IntCtrl.n.u1VIrqPending));
         Log4(("ctrl.IntCtrl.u1VGif                   %#x\n",      pVmcb->ctrl.IntCtrl.n.u1VGif));
-        Log4(("ctrl.IntCtrl.u6Reserved0              %#x\n",      pVmcb->ctrl.IntCtrl.n.u6Reserved0));
+        Log4(("ctrl.IntCtrl.u6Reserved0              %#x\n",      pVmcb->ctrl.IntCtrl.n.u6Reserved));
         Log4(("ctrl.IntCtrl.u4VIntrPrio              %#x\n",      pVmcb->ctrl.IntCtrl.n.u4VIntrPrio));
         Log4(("ctrl.IntCtrl.u1IgnoreTPR              %#x\n",      pVmcb->ctrl.IntCtrl.n.u1IgnoreTPR));
@@ -3919 +3919 @@
         Log4(("ctrl.IntCtrl.u1VIntrMasking           %#x\n",      pVmcb->ctrl.IntCtrl.n.u1VIntrMasking));
         Log4(("ctrl.IntCtrl.u1VGifEnable             %#x\n",      pVmcb->ctrl.IntCtrl.n.u1VGifEnable));
-        Log4(("ctrl.IntCtrl.u5Reserved1              %#x\n",      pVmcb->ctrl.IntCtrl.n.u5Reserved1));
+        Log4(("ctrl.IntCtrl.u5Reserved1              %#x\n",      pVmcb->ctrl.IntCtrl.n.u5Reserved));
         Log4(("ctrl.IntCtrl.u8VIntrVector            %#x\n",      pVmcb->ctrl.IntCtrl.n.u8VIntrVector));
         Log4(("ctrl.IntCtrl.u24Reserved              %#x\n",      pVmcb->ctrl.IntCtrl.n.u24Reserved));
@@ -4992 +4992 @@
     const uint8_t     cbReg         = (pIoExitInfo->u  >> SVM_IOIO_OP_SIZE_SHIFT)   & 7;
     const uint8_t     cAddrSizeBits = ((pIoExitInfo->u >> SVM_IOIO_ADDR_SIZE_SHIFT) & 7) << 4;
-    const uint8_t     iEffSeg       = pIoExitInfo->n.u3SEG;
-    const bool        fRep          = pIoExitInfo->n.u1REP;
-    const bool        fStrIo        = pIoExitInfo->n.u1STR;
+    const uint8_t     iEffSeg       = pIoExitInfo->n.u3Seg;
+    const bool        fRep          = pIoExitInfo->n.u1Rep;
+    const bool        fStrIo        = pIoExitInfo->n.u1Str;
 
     return HMSvmIsIOInterceptActive(pvIoBitmap, u16Port, enmIoType, cbReg, cAddrSizeBits, iEffSeg, fRep, fStrIo,
@@ -6863 +6863 @@
     VBOXSTRICTRC rcStrict;
     bool fUpdateRipAlready = false;
-    if (IoExitInfo.n.u1STR)
+    if (IoExitInfo.n.u1Str)
     {
 #ifdef VBOX_WITH_2ND_IEM_STEP
@@ -6882 +6882 @@
             if (cbInstr <= 15 && cbInstr >= 1)
             {
-                Assert(cbInstr >= 1U + IoExitInfo.n.u1REP);
+                Assert(cbInstr >= 1U + IoExitInfo.n.u1Rep);
                 if (IoExitInfo.n.u1Type == SVM_IOIO_WRITE)
                 {
-                    /* Don't know exactly how to detect whether u3SEG is valid, currently
+                    /* Don't know exactly how to detect whether u3Seg is valid, currently
                        only enabling it for Bulldozer and later with NRIP.  OS/2 broke on
                        2384 Opterons when only checking NRIP. */
@@ -6892 +6892 @@
                         && pVM->cpum.ro.GuestFeatures.enmMicroarch >= kCpumMicroarch_AMD_15h_First)
                     {
-                        AssertMsg(IoExitInfo.n.u3SEG == X86_SREG_DS || cbInstr > 1U + IoExitInfo.n.u1REP,
-                                  ("u32Seg=%d cbInstr=%d u1REP=%d", IoExitInfo.n.u3SEG, cbInstr, IoExitInfo.n.u1REP));
-                        rcStrict = IEMExecStringIoWrite(pVCpu, cbValue, enmAddrMode, IoExitInfo.n.u1REP, (uint8_t)cbInstr,
-                                                        IoExitInfo.n.u3SEG, true /*fIoChecked*/);
+                        AssertMsg(IoExitInfo.n.u3Seg == X86_SREG_DS || cbInstr > 1U + IoExitInfo.n.u1Rep,
+                                  ("u32Seg=%d cbInstr=%d u1REP=%d", IoExitInfo.n.u3Seg, cbInstr, IoExitInfo.n.u1Rep));
+                        rcStrict = IEMExecStringIoWrite(pVCpu, cbValue, enmAddrMode, IoExitInfo.n.u1Rep, (uint8_t)cbInstr,
+                                                        IoExitInfo.n.u3Seg, true /*fIoChecked*/);
                     }
-                    else if (cbInstr == 1U + IoExitInfo.n.u1REP)
-                        rcStrict = IEMExecStringIoWrite(pVCpu, cbValue, enmAddrMode, IoExitInfo.n.u1REP, (uint8_t)cbInstr,
+                    else if (cbInstr == 1U + IoExitInfo.n.u1Rep)
+                        rcStrict = IEMExecStringIoWrite(pVCpu, cbValue, enmAddrMode, IoExitInfo.n.u1Rep, (uint8_t)cbInstr,
                                                         X86_SREG_DS, true /*fIoChecked*/);
                     else
@@ -6906 +6906 @@
                 else
                 {
-                    AssertMsg(IoExitInfo.n.u3SEG == X86_SREG_ES /*=0*/, ("%#x\n", IoExitInfo.n.u3SEG));
-                    rcStrict = IEMExecStringIoRead(pVCpu, cbValue, enmAddrMode, IoExitInfo.n.u1REP, (uint8_t)cbInstr,
+                    AssertMsg(IoExitInfo.n.u3Seg == X86_SREG_ES /*=0*/, ("%#x\n", IoExitInfo.n.u3Seg));
+                    rcStrict = IEMExecStringIoRead(pVCpu, cbValue, enmAddrMode, IoExitInfo.n.u1Rep, (uint8_t)cbInstr,
                                                    true /*fIoChecked*/);
                     STAM_COUNTER_INC(&pVCpu->hm.s.StatExitIOStringRead);
@@ -6955 +6955 @@
     {
         /* IN/OUT - I/O instruction. */
-        Assert(!IoExitInfo.n.u1REP);
+        Assert(!IoExitInfo.n.u1Rep);
 
         if (IoExitInfo.n.u1Type == SVM_IOIO_WRITE)