Changeset 72262 in vbox

Timestamp:

May 18, 2018 2:10:08 PM (7 years ago)

Author:

vboxsync

Message:

NEM/win: Intercept all (for now) CPUIDs. bugref:9044

Location:

trunk

Files:

• include/iprt/nt/hyperv.h (modified) (2 diffs)
• src/VBox/VMM/VMMAll/NEMAllNativeTemplate-win.cpp.h (modified) (5 diffs)
• src/VBox/VMM/VMMR3/NEMR3Native-win.cpp (modified) (4 diffs)

trunk/include/iprt/nt/hyperv.h

@@ -1355 +1355 @@
 
 
+/**
+ * The payload format for HvMessageTypeX64CpuidIntercept,
+ *
+ * @note This message does not include HV_X64_INTERCEPT_MESSAGE_HEADER!
+ */
+typedef struct
+{
+    HV_X64_INTERCEPT_MESSAGE_HEADER     Header;                 /**< 0x00: The usual intercept header. */
+    uint64_t                            Rax;                    /**< 0x28: Input RAX. */
+    uint64_t                            Rcx;                    /**< 0x30: Input RCX. */
+    uint64_t                            Rdx;                    /**< 0x38: Input RDX. */
+    uint64_t                            Rbx;                    /**< 0x40: Input RBX. */
+    uint64_t                            DefaultResultRax;       /**< 0x48: Default result RAX. */
+    uint64_t                            DefaultResultRcx;       /**< 0x50: Default result RCX. */
+    uint64_t                            DefaultResultRdx;       /**< 0x58: Default result RDX. */
+    uint64_t                            DefaultResultRbx;       /**< 0x60: Default result RBX. */
+} HV_X64_CPUID_INTERCEPT_MESSAGE;
+AssertCompileSize(HV_X64_CPUID_INTERCEPT_MESSAGE, 0x68);
+/** Pointer to a HvMessageTypeX64CpuidIntercept payload. */
+typedef HV_X64_CPUID_INTERCEPT_MESSAGE *PHV_X64_CPUID_INTERCEPT_MESSAGE;
+/** Pointer to a const HvMessageTypeX64CpuidIntercept payload. */
+typedef HV_X64_CPUID_INTERCEPT_MESSAGE const *PCHV_X64_CPUID_INTERCEPT_MESSAGE;
+
+/** Full HvMessageTypeX64CpuidIntercept message. */
+typedef struct
+{
+    HV_MESSAGE_HEADER                   MsgHdr;
+    HV_X64_CPUID_INTERCEPT_MESSAGE      Payload;
+} HV_X64_CPUID_INTERCEPT_MESSAGE_FULL;
+
+
 /** X64 exception information (HvMessageTypeX64ExceptionIntercept).
  * @sa WHV_VP_EXCEPTION_INFO */
@@ -1477 +1508 @@
         /** HvMessageTypeX64IoPortIntercept */
         HV_X64_IO_PORT_INTERCEPT_MESSAGE    X64IoPortIntercept;
+        /** HvMessageTypeX64CpuidIntercept */
+        HV_X64_CPUID_INTERCEPT_MESSAGE      X64CpuIdIntercept;
         /** HvMessageTypeX64ExceptionIntercept */
         HV_X64_EXCEPTION_INTERCEPT_MESSAGE  X64ExceptionIntercept;

trunk/src/VBox/VMM/VMMAll/NEMAllNativeTemplate-win.cpp.h

@@ -1422 +1422 @@
 
     /*
-     * Whatever we do, we must clear pending event ejection upon resume.
+     * Whatever we do, we must clear pending event injection upon resume.
      */
     if (pMsg->Header.ExecutionState.InterruptionPending)
@@ -1562 +1562 @@
 
 /**
+ * Deals with CPUID intercept message.
+ *
+ * @returns Strict VBox status code.
+ * @param   pVCpu           The cross context per CPU structure.
+ * @param   pMsg            The message.
+ * @param   pCtx            The register context.
+ */
+NEM_TMPL_STATIC VBOXSTRICTRC nemHCWinHandleMessageCpuId(PVMCPU pVCpu, HV_X64_CPUID_INTERCEPT_MESSAGE const *pMsg, PCPUMCTX pCtx)
+{
+    //Assert(   pMsg->AccessInfo.AccessSize == 1
+    //       || pMsg->AccessInfo.AccessSize == 2
+    //       || pMsg->AccessInfo.AccessSize == 4);
+    //Assert(   pMsg->Header.InterceptAccessType == HV_INTERCEPT_ACCESS_READ
+    //       || pMsg->Header.InterceptAccessType == HV_INTERCEPT_ACCESS_WRITE);
+    AssertMsg(pMsg->Header.InstructionLength < 0x10, ("%#x\n", pMsg->Header.InstructionLength));
+
+    /*
+     * Soak up state and execute the instruction.
+     *
+     * Note! If this grows slightly more complicated, combine into an IEMExecDecodedCpuId
+     *       function and make everyone use it.
+     */
+    /** @todo Combine implementations into IEMExecDecodedCpuId as this will
+     *        only get weirder with nested VT-x and AMD-V support. */
+    nemHCWinCopyStateFromX64Header(pVCpu, pCtx, &pMsg->Header);
+
+    /* Copy in the low register values (top is always cleared). */
+    pCtx->rax = (uint32_t)pMsg->Rax;
+    pCtx->rcx = (uint32_t)pMsg->Rcx;
+    pCtx->rdx = (uint32_t)pMsg->Rdx;
+    pCtx->rbx = (uint32_t)pMsg->Rbx;
+    pCtx->fExtrn &= ~(CPUMCTX_EXTRN_RAX | CPUMCTX_EXTRN_RCX | CPUMCTX_EXTRN_RDX | CPUMCTX_EXTRN_RBX);
+
+    /* Get the correct values. */
+    CPUMGetGuestCpuId(pVCpu, pCtx->eax, pCtx->ecx, &pCtx->eax, &pCtx->ebx, &pCtx->ecx, &pCtx->edx);
+
+    Log4(("CpuIdExit/%u: %04x:%08RX64: rax=%08RX64 / rcx=%08RX64 / rdx=%08RX64 / rbx=%08RX64 -> %08RX32 / %08RX32 / %08RX32 / %08RX32 (hv: %08RX64 / %08RX64 / %08RX64 / %08RX64)\n",
+          pVCpu->idCpu, pMsg->Header.CsSegment.Selector, pMsg->Header.Rip,
+          pMsg->Rax,                           pMsg->Rcx,              pMsg->Rdx,              pMsg->Rbx,
+          pCtx->eax,                           pCtx->ecx,              pCtx->edx,              pCtx->ebx,
+          pMsg->DefaultResultRax, pMsg->DefaultResultRcx, pMsg->DefaultResultRdx, pMsg->DefaultResultRbx));
+
+    /* Move RIP and we're done. */
+    nemHCWinAdvanceGuestRipAndClearRF(pVCpu, pCtx, &pMsg->Header);
+
+    return VINF_SUCCESS;
+}
+
+
+
+
+/**
  * Deals with unrecoverable exception (triple fault).
  *
@@ -1635 +1687 @@
                 return nemHCWinHandleMessageInterruptWindow(pVM, pVCpu, &pMsg->X64InterruptWindow, pCtx, pGVCpu);
 
+            case HvMessageTypeX64CpuidIntercept:
+                Assert(pMsg->Header.PayloadSize == sizeof(pMsg->X64CpuIdIntercept));
+                return nemHCWinHandleMessageCpuId(pVCpu, &pMsg->X64CpuIdIntercept, pCtx);
+
             case HvMessageTypeUnrecoverableException:
                 Assert(pMsg->Header.PayloadSize == sizeof(pMsg->X64InterceptHeader));
@@ -1647 +1703 @@
 
             case HvMessageTypeX64MsrIntercept:
-            case HvMessageTypeX64CpuidIntercept:
             case HvMessageTypeX64ExceptionIntercept:
             case HvMessageTypeX64ApicEoi:
@@ -1657 +1712 @@
             case HvMessageTimerExpired:
                 LogRel(("Unexpected msg:\n%.*Rhxd\n", (int)sizeof(*pMsg), pMsg));
-                AssertLogRelMsgFailedReturn(("Unexpected message on CPU #%u: #x\n", pVCpu->idCpu, pMsg->Header.MessageType),
+                AssertLogRelMsgFailedReturn(("Unexpected message on CPU #%u: %#x\n", pVCpu->idCpu, pMsg->Header.MessageType),
                                             VERR_INTERNAL_ERROR_2);
 
             default:
                 LogRel(("Unknown msg:\n%.*Rhxd\n", (int)sizeof(*pMsg), pMsg));
-                AssertLogRelMsgFailedReturn(("Unknown message on CPU #%u: #x\n", pVCpu->idCpu, pMsg->Header.MessageType),
+                AssertLogRelMsgFailedReturn(("Unknown message on CPU #%u: %#x\n", pVCpu->idCpu, pMsg->Header.MessageType),
                                             VERR_INTERNAL_ERROR_2);
         }

trunk/src/VBox/VMM/VMMR3/NEMR3Native-win.cpp

@@ -81 +81 @@
 typedef HRESULT (WINAPI *PFNWHVGETCAPABILITY_17110)(WHV_CAPABILITY_CODE, void *, uint32_t, uint32_t *);
 typedef HRESULT (WINAPI *PFNWHVSETPARTITIONPROPERTY_17110)(WHV_PARTITION_HANDLE, WHV_PARTITION_PROPERTY_CODE, void *, uint32_t);
+# define WHvCapabilityCodeExceptionExitBitmap ((WHV_CAPABILITY_CODE)0x00000003)
 #endif
 
@@ -622 +623 @@
         LogRel(("NEM: Warning! Unknown feature definitions: %#RX64\n", Caps.Features.AsUINT64));
     /** @todo RECHECK: WHV_CAPABILITY_FEATURES typedef. */
+
+    /*
+     * Check supported exception exit bitmap bits.
+     * We don't currently require this, so we just log failure.
+     */
+    RT_ZERO(Caps);
+    hrc = WHvGetCapabilityWrapper(WHvCapabilityCodeExceptionExitBitmap, &Caps, sizeof(Caps));
+    if (SUCCEEDED(hrc))
+        LogRel(("NEM: Warning! Supported exception exit bitmap: %#RX64\n", Caps.Features.AsUINT64));
+    else
+        LogRel(("NEM: Warning! WHvGetCapability/WHvCapabilityCodeExceptionExitBitmap failed: %Rhrc (Last=%#x/%u)",
+                hrc, RTNtLastStatusValue(), RTNtLastErrorValue()));
 
     /*
@@ -747 +760 @@
     }
 
+    /*
+     * For proper operation, we require CPUID exits.
+     */
+    if (!pVM->nem.s.fExtendedCpuIdExit)
+        return RTErrInfoSetF(pErrInfo, VERR_NEM_INIT_FAILED, "Missing required extended CPUID exit support");
+
 #undef NEM_LOG_REL_CAP_EX
 #undef NEM_LOG_REL_CAP_SUB_EX
@@ -1069 +1088 @@
     {
         RT_ZERO(Property);
-#if 0
-        Property.ExtendedVmExits.X64CpuidExit  = pVM->nem.s.fExtendedCpuIdExit;
+        Property.ExtendedVmExits.X64CpuidExit  = pVM->nem.s.fExtendedCpuIdExit; /** @todo Register fixed results and restrict cpuid exits */
+#if 0 /** @todo handle some MSRs too. */
         Property.ExtendedVmExits.X64MsrExit    = pVM->nem.s.fExtendedMsrExit;
         Property.ExtendedVmExits.ExceptionExit = pVM->nem.s.fExtendedXcptExit;