Changeset 72851 in vbox for trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp
- Timestamp:
- Jul 4, 2018 5:36:58 AM (6 years ago)
- File:
-
- 1 edited
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trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp
r72850 r72851 160 160 (a_pVCpu)->cpum.GstCtx.fExtrn, (a_fExtrnMbz))) 161 161 162 163 162 /** Helper macro for VM-exit handlers called unexpectedly. */ 164 #define HMVMX_ RETURN_UNEXPECTED_EXIT() \163 #define HMVMX_UNEXPECTED_EXIT_RET(a_pVCpu, a_pVmxTransient) \ 165 164 do { \ 166 pVCpu->hm.s.u32HMError = pVmxTransient->uExitReason; \165 (a_pVCpu)->hm.s.u32HMError = (a_pVmxTransient)->uExitReason; \ 167 166 return VERR_VMX_UNEXPECTED_EXIT; \ 168 167 } while (0) … … 11158 11157 { 11159 11158 AssertMsgFailed(("Unexpected NMI-window exit.\n")); 11160 HMVMX_ RETURN_UNEXPECTED_EXIT();11159 HMVMX_UNEXPECTED_EXIT_RET(pVCpu, pVmxTransient); 11161 11160 } 11162 11161 … … 11280 11279 11281 11280 AssertMsgFailed(("hmR0VmxExitGetsec: unexpected VM-exit when CR4.SMXE is 0.\n")); 11282 HMVMX_ RETURN_UNEXPECTED_EXIT();11281 HMVMX_UNEXPECTED_EXIT_RET(pVCpu, pVmxTransient); 11283 11282 } 11284 11283 … … 11517 11516 HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(); 11518 11517 AssertMsgFailed(("Unexpected RSM VM-exit. pVCpu=%p pMixedCtx=%p\n", pVCpu, pMixedCtx)); 11519 HMVMX_ RETURN_UNEXPECTED_EXIT();11518 HMVMX_UNEXPECTED_EXIT_RET(pVCpu, pVmxTransient); 11520 11519 } 11521 11520 … … 11537 11536 HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(); 11538 11537 AssertMsgFailed(("Unexpected SMI VM-exit. pVCpu=%p pMixedCtx=%p\n", pVCpu, pMixedCtx)); 11539 HMVMX_ RETURN_UNEXPECTED_EXIT();11538 HMVMX_UNEXPECTED_EXIT_RET(pVCpu, pVmxTransient); 11540 11539 } 11541 11540 … … 11549 11548 HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(); 11550 11549 AssertMsgFailed(("Unexpected IO SMI VM-exit. pVCpu=%p pMixedCtx=%p\n", pVCpu, pMixedCtx)); 11551 HMVMX_ RETURN_UNEXPECTED_EXIT();11550 HMVMX_UNEXPECTED_EXIT_RET(pVCpu, pVmxTransient); 11552 11551 } 11553 11552 … … 11565 11564 HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(); 11566 11565 AssertMsgFailed(("Unexpected SIPI VM-exit. pVCpu=%p pMixedCtx=%p\n", pVCpu, pMixedCtx)); 11567 HMVMX_ RETURN_UNEXPECTED_EXIT();11566 HMVMX_UNEXPECTED_EXIT_RET(pVCpu, pVmxTransient); 11568 11567 } 11569 11568 … … 11745 11744 NOREF(pVmxTransient); 11746 11745 AssertMsgFailed(("Unexpected MSR-load exit. pVCpu=%p pMixedCtx=%p\n", pVCpu, pMixedCtx)); NOREF(pMixedCtx); 11747 HMVMX_ RETURN_UNEXPECTED_EXIT();11746 HMVMX_UNEXPECTED_EXIT_RET(pVCpu, pVmxTransient); 11748 11747 } 11749 11748 … … 11757 11756 NOREF(pVmxTransient); 11758 11757 AssertMsgFailed(("Unexpected machine-check event exit. pVCpu=%p pMixedCtx=%p\n", pVCpu, pMixedCtx)); NOREF(pMixedCtx); 11759 HMVMX_ RETURN_UNEXPECTED_EXIT();11758 HMVMX_UNEXPECTED_EXIT_RET(pVCpu, pVmxTransient); 11760 11759 } 11761 11760 … … 11787 11786 return VERR_EM_INTERPRETER; 11788 11787 AssertMsgFailed(("Unexpected XDTR access. pVCpu=%p pMixedCtx=%p\n", pVCpu, pMixedCtx)); 11789 HMVMX_ RETURN_UNEXPECTED_EXIT();11788 HMVMX_UNEXPECTED_EXIT_RET(pVCpu, pVmxTransient); 11790 11789 } 11791 11790 … … 11802 11801 return VERR_EM_INTERPRETER; 11803 11802 AssertMsgFailed(("Unexpected RDRAND exit. pVCpu=%p pMixedCtx=%p\n", pVCpu, pMixedCtx)); 11804 HMVMX_ RETURN_UNEXPECTED_EXIT();11803 HMVMX_UNEXPECTED_EXIT_RET(pVCpu, pVmxTransient); 11805 11804 } 11806 11805 … … 11832 11831 AssertMsgFailed(("Unexpected RDMSR for an MSR in the auto-load/store area in the VMCS. ecx=%#RX32\n", 11833 11832 pMixedCtx->ecx)); 11834 HMVMX_ RETURN_UNEXPECTED_EXIT();11833 HMVMX_UNEXPECTED_EXIT_RET(pVCpu, pVmxTransient); 11835 11834 } 11836 11835 if (hmR0VmxIsLazyGuestMsr(pVCpu, pMixedCtx->ecx)) … … 11843 11842 { 11844 11843 AssertMsgFailed(("Unexpected RDMSR for a passthru lazy-restore MSR. ecx=%#RX32\n", pMixedCtx->ecx)); 11845 HMVMX_ RETURN_UNEXPECTED_EXIT();11844 HMVMX_UNEXPECTED_EXIT_RET(pVCpu, pVmxTransient); 11846 11845 } 11847 11846 } … … 11951 11950 { 11952 11951 AssertMsgFailed(("Unexpected WRMSR for an MSR in the VMCS. ecx=%#RX32\n", pMixedCtx->ecx)); 11953 HMVMX_ RETURN_UNEXPECTED_EXIT();11952 HMVMX_UNEXPECTED_EXIT_RET(pVCpu, pVmxTransient); 11954 11953 } 11955 11954 … … 11964 11963 AssertMsgFailed(("Unexpected WRMSR for an MSR in the auto-load/store area in the VMCS. ecx=%#RX32\n", 11965 11964 pMixedCtx->ecx)); 11966 HMVMX_ RETURN_UNEXPECTED_EXIT();11965 HMVMX_UNEXPECTED_EXIT_RET(pVCpu, pVmxTransient); 11967 11966 } 11968 11967 } … … 11977 11976 { 11978 11977 AssertMsgFailed(("Unexpected WRMSR for passthru, lazy-restore MSR. ecx=%#RX32\n", pMixedCtx->ecx)); 11979 HMVMX_ RETURN_UNEXPECTED_EXIT();11978 HMVMX_UNEXPECTED_EXIT_RET(pVCpu, pVmxTransient); 11980 11979 } 11981 11980 } … … 12577 12576 { 12578 12577 AssertMsgFailed(("Unexpected MOV DRx exit. pVCpu=%p pMixedCtx=%p\n", pVCpu, pMixedCtx)); 12579 HMVMX_ RETURN_UNEXPECTED_EXIT();12578 HMVMX_UNEXPECTED_EXIT_RET(pVCpu, pVmxTransient); 12580 12579 } 12581 12580
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