VirtualBox

Changeset 73282 in vbox


Ignore:
Timestamp:
Jul 20, 2018 8:04:26 PM (7 years ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
123889
Message:

NEM/win: Kicked out VINF/VERR_NEM_UPDATE_APIC_BASE and VINF/VERR_NEM_CHANGE_PGM_MODE and associated complications. bugref:9044

Location:
trunk
Files:
5 edited

Legend:

Unmodified
Added
Removed
  • trunk/include/VBox/err.h

    r73277 r73282  
    28272827/** Get register caller must flush the TLB. */
    28282828#define VINF_NEM_FLUSH_TLB                          (6809)
    2829 /** Get register caller must change the CPU mode (not an error). */
    2830 #define VERR_NEM_CHANGE_PGM_MODE                    (-6810)
    2831 /** Get register caller must change the CPU mode. */
    2832 #define VINF_NEM_CHANGE_PGM_MODE                    (6810)
    2833 /** Get register caller must update the APIC base (not an error). */
    2834 #define VERR_NEM_UPDATE_APIC_BASE                   (-6811)
    2835 /** Get register caller must update the APIC base. */
    2836 #define VINF_NEM_UPDATE_APIC_BASE                   (6811)
     2829
     2830
    28372831/** NEM failed to set TSC. */
    28382832#define VERR_NEM_SET_TSC                            (-6812)
  • trunk/src/VBox/VMM/VMMAll/NEMAllNativeTemplate-win.cpp.h

    r73281 r73282  
    497497        if (rc == VERR_NEM_FLUSH_TLB)
    498498            return PGMFlushTLB(pVCpu, pVCpu->cpum.GstCtx.cr3, true /*fGlobal*/);
    499         if (rc == VERR_NEM_CHANGE_PGM_MODE)
    500             return PGMChangeMode(pVCpu, pVCpu->cpum.GstCtx.cr0, pVCpu->cpum.GstCtx.cr4, pVCpu->cpum.GstCtx.msrEFER);
    501499        AssertLogRelRCReturn(rc, rc);
    502500        return rc;
     
    18341832#if defined(IN_RING0) && defined(NEM_WIN_TEMPLATE_MODE_OWN_RUN_API)
    18351833/**
    1836  * Wrapper around nemR0WinImportState that converts VERR_NEM_CHANGE_PGM_MODE and
    1837  * VERR_NEM_FLUSH_TBL into informational status codes and logs+asserts statuses.
     1834 * Wrapper around nemR0WinImportState that converts VERR_NEM_FLUSH_TLB
     1835 * into informational status codes and logs+asserts statuses.
    18381836 *
    18391837 * @returns VBox strict status code.
     
    18531851    }
    18541852
    1855     if (rc == VERR_NEM_CHANGE_PGM_MODE || rc == VERR_NEM_FLUSH_TLB || rc == VERR_NEM_UPDATE_APIC_BASE)
     1853    if (rc == VERR_NEM_FLUSH_TLB)
    18561854    {
    18571855        Log4(("%s/%u: nemR0WinImportState -> %Rrc\n", pszCaller, pGVCpu->idCpu, -rc));
     
    43634361            if (RT_SUCCESS(rc2))
    43644362                pVCpu->cpum.GstCtx.fExtrn &= ~fImport;
    4365             else if (rc2 == VERR_NEM_CHANGE_PGM_MODE || rc2 == VERR_NEM_FLUSH_TLB || rc2 == VERR_NEM_UPDATE_APIC_BASE)
     4363            else if (rc2 == VERR_NEM_FLUSH_TLB)
    43664364            {
    43674365                pVCpu->cpum.GstCtx.fExtrn &= ~fImport;
  • trunk/src/VBox/VMM/VMMR0/NEMR0Native-win.cpp

    r73281 r73282  
    19811981        iReg++;
    19821982    }
    1983     bool fUpdateApicBase = false;
    19841983    if (fWhat & CPUMCTX_EXTRN_OTHER_MSRS)
    19851984    {
     
    19911990                  pVCpu->idCpu, uOldBase, paValues[iReg].Reg64, paValues[iReg].Reg64 ^ uOldBase));
    19921991            int rc2 = APICSetBaseMsr(pVCpu, paValues[iReg].Reg64);
    1993             /** @todo fix me VINF_CPUM_R3_MSR_WRITE / APICSetBaseMsr */
    1994             if (rc2 == VINF_CPUM_R3_MSR_WRITE)
    1995             {
    1996                 pVCpu->nem.s.uPendingApicBase = paValues[iReg].Reg64;
    1997                 fUpdateApicBase = true;
    1998             }
    1999             else
    2000                 AssertLogRelMsg(rc2 == VINF_SUCCESS, ("rc2=%Rrc [%#RX64]\n", rc2, paValues[iReg].Reg64));
     1992            AssertLogRelMsg(rc2 == VINF_SUCCESS, ("rc2=%Rrc [%#RX64]\n", rc2, paValues[iReg].Reg64));
    20011993        }
    20021994        iReg++;
     
    21662158
    21672159    /* Typical. */
    2168     if (!fMaybeChangedMode && !fFlushTlb && !fUpdateApicBase)
     2160    if (!fMaybeChangedMode && !fFlushTlb)
    21692161        return VINF_SUCCESS;
    21702162
     
    21762168    {
    21772169        rc = PGMChangeMode(pVCpu, pCtx->cr0, pCtx->cr4, pCtx->msrEFER);
    2178         if (rc == VINF_PGM_CHANGE_MODE)
    2179         {
    2180             LogFlow(("nemR0WinImportState: -> VERR_NEM_CHANGE_PGM_MODE!\n"));
    2181             return VERR_NEM_CHANGE_PGM_MODE;
    2182         }
    21832170        AssertMsg(rc == VINF_SUCCESS, ("rc=%Rrc\n", rc));
    21842171    }
     
    21872174    {
    21882175        LogFlow(("nemR0WinImportState: -> VERR_NEM_FLUSH_TLB!\n"));
     2176        /** @todo eliminate the VERR_NEM_FLUSH_TLB/VINF_NEM_FLUSH_TLB complication */
    21892177        rc = VERR_NEM_FLUSH_TLB; /* Calling PGMFlushTLB w/o long jump setup doesn't work, ring-3 does it. */
    2190     }
    2191 
    2192     if (fUpdateApicBase && rc == VINF_SUCCESS)
    2193     {
    2194         LogFlow(("nemR0WinImportState: -> VERR_NEM_UPDATE_APIC_BASE!\n"));
    2195         rc = VERR_NEM_UPDATE_APIC_BASE;
    21962178    }
    21972179
  • trunk/src/VBox/VMM/VMMR3/NEMR3Native-win.cpp

    r73281 r73282  
    11721172     */
    11731173    pVM->nem.s.fA20Enabled = true;
     1174#if 0
    11741175    for (VMCPUID iCpu = 0; iCpu < pVM->cCpus; iCpu++)
    11751176    {
    11761177        PNEMCPU pNemCpu = &pVM->aCpus[iCpu].nem.s;
    1177         pNemCpu->uPendingApicBase = UINT64_MAX;
    11781178    }
     1179#endif
    11791180
    11801181    /*
     
    16641665            {
    16651666                /*
    1666                  * We deal with VINF_NEM_CHANGE_PGM_MODE, VINF_NEM_FLUSH_TLB and
    1667                  * VINF_NEM_UPDATE_APIC_BASE  here, since we're running the risk of
     1667                 * We deal with VINF_NEM_FLUSH_TLB here, since we're running the risk of
    16681668                 * getting these while we already got another RC (I/O ports).
    1669                  *
    1670                  * The APIC base update and a PGM update can happen at the same time, so
    1671                  * we don't depend on the status code for that and always checks it first.
    16721669                 */
    1673                 /* APIC base: */
    1674                 if (pVCpu->nem.s.uPendingApicBase != UINT64_MAX)
    1675                 {
    1676                     LogFlow(("nemR3NativeRunGC: calling APICSetBaseMsr(,%RX64)...\n", pVCpu->nem.s.uPendingApicBase));
    1677                     int rc2 = APICSetBaseMsr(pVCpu, pVCpu->nem.s.uPendingApicBase);
    1678                     AssertLogRelMsg(rc2 == VINF_SUCCESS, ("rc2=%Rrc [%#RX64]\n", rc2, pVCpu->nem.s.uPendingApicBase));
    1679                     pVCpu->nem.s.uPendingApicBase = UINT64_MAX;
    1680                 }
    1681 
    16821670                /* Status codes: */
    16831671                VBOXSTRICTRC rcPending = pVCpu->nem.s.rcPending;
    16841672                pVCpu->nem.s.rcPending = VINF_SUCCESS;
    1685                 if (   rcStrict == VINF_NEM_CHANGE_PGM_MODE
    1686                     || rcStrict == VINF_PGM_CHANGE_MODE
    1687                     || rcPending == VINF_NEM_CHANGE_PGM_MODE )
     1673                if (rcStrict == VINF_NEM_FLUSH_TLB || rcPending == VINF_NEM_FLUSH_TLB)
    16881674                {
    1689                     LogFlow(("nemR3NativeRunGC: calling PGMChangeMode...\n"));
    1690                     int rc = PGMChangeMode(pVCpu, CPUMGetGuestCR0(pVCpu), CPUMGetGuestCR4(pVCpu), CPUMGetGuestEFER(pVCpu));
     1675                    LogFlow(("nemR3NativeRunGC: calling PGMFlushTLB...\n"));
     1676                    int rc = PGMFlushTLB(pVCpu, CPUMGetGuestCR3(pVCpu), true);
    16911677                    AssertRCReturn(rc, rc);
    1692                     if (   rcStrict == VINF_NEM_CHANGE_PGM_MODE
    1693                         || rcStrict == VINF_PGM_CHANGE_MODE
    1694                         || rcStrict == VINF_NEM_FLUSH_TLB)
     1678                    if (rcStrict == VINF_NEM_FLUSH_TLB)
    16951679                    {
    16961680                        if (   !VM_FF_IS_PENDING(pVM, VM_FF_HIGH_PRIORITY_POST_MASK | VM_FF_HP_R0_PRE_HM_MASK)
     
    17041688                    }
    17051689                }
    1706                 else if (rcStrict == VINF_NEM_FLUSH_TLB || rcPending == VINF_NEM_FLUSH_TLB)
    1707                 {
    1708                     LogFlow(("nemR3NativeRunGC: calling PGMFlushTLB...\n"));
    1709                     int rc = PGMFlushTLB(pVCpu, CPUMGetGuestCR3(pVCpu), true);
    1710                     AssertRCReturn(rc, rc);
    1711                     if (rcStrict == VINF_NEM_FLUSH_TLB || rcStrict == VINF_NEM_CHANGE_PGM_MODE)
    1712                     {
    1713                         if (   !VM_FF_IS_PENDING(pVM, VM_FF_HIGH_PRIORITY_POST_MASK | VM_FF_HP_R0_PRE_HM_MASK)
    1714                             && !VMCPU_FF_IS_PENDING(pVCpu,   (VMCPU_FF_HIGH_PRIORITY_POST_MASK | VMCPU_FF_HP_R0_PRE_HM_MASK)
    1715                                                            & ~VMCPU_FF_RESUME_GUEST_MASK))
    1716                         {
    1717                             VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_RESUME_GUEST_MASK);
    1718                             continue;
    1719                         }
    1720                         rcStrict = VINF_SUCCESS;
    1721                     }
    1722                 }
    1723                 else if (rcStrict == VINF_NEM_UPDATE_APIC_BASE || rcPending == VERR_NEM_UPDATE_APIC_BASE)
    1724                     continue;
    17251690                else
    17261691                    AssertMsg(rcPending == VINF_SUCCESS, ("rcPending=%Rrc\n", VBOXSTRICTRC_VAL(rcPending) ));
  • trunk/src/VBox/VMM/include/NEMInternal.h

    r72924 r73282  
    232232    /** Last copy of HV_X64_VP_EXECUTION_STATE::InterruptShadow. */
    233233    bool                        fLastInterruptShadow : 1;
    234     /** Pending APIC base value.
    235      * This is set to UINT64_MAX when not pending  */
    236     uint64_t                    uPendingApicBase;
    237234# ifdef NEM_WIN_WITH_RING0_RUNLOOP
    238     /** Pending VINF_NEM_CHANGE_PGM_MODE, VINF_NEM_FLUSH_TLB or VINF_NEM_UPDATE_APIC_BASE. */
     235    /** Pending VINF_NEM_FLUSH_TLB. */
    239236    int32_t                     rcPending;
    240237# else
Note: See TracChangeset for help on using the changeset viewer.

© 2025 Oracle Support Privacy / Do Not Sell My Info Terms of Use Trademark Policy Automated Access Etiquette