Changeset 73282 in vbox
- Timestamp:
- Jul 20, 2018 8:04:26 PM (7 years ago)
- svn:sync-xref-src-repo-rev:
- 123889
- Location:
- trunk
- Files:
-
- 5 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/include/VBox/err.h
r73277 r73282 2827 2827 /** Get register caller must flush the TLB. */ 2828 2828 #define VINF_NEM_FLUSH_TLB (6809) 2829 /** Get register caller must change the CPU mode (not an error). */ 2830 #define VERR_NEM_CHANGE_PGM_MODE (-6810) 2831 /** Get register caller must change the CPU mode. */ 2832 #define VINF_NEM_CHANGE_PGM_MODE (6810) 2833 /** Get register caller must update the APIC base (not an error). */ 2834 #define VERR_NEM_UPDATE_APIC_BASE (-6811) 2835 /** Get register caller must update the APIC base. */ 2836 #define VINF_NEM_UPDATE_APIC_BASE (6811) 2829 2830 2837 2831 /** NEM failed to set TSC. */ 2838 2832 #define VERR_NEM_SET_TSC (-6812) -
trunk/src/VBox/VMM/VMMAll/NEMAllNativeTemplate-win.cpp.h
r73281 r73282 497 497 if (rc == VERR_NEM_FLUSH_TLB) 498 498 return PGMFlushTLB(pVCpu, pVCpu->cpum.GstCtx.cr3, true /*fGlobal*/); 499 if (rc == VERR_NEM_CHANGE_PGM_MODE)500 return PGMChangeMode(pVCpu, pVCpu->cpum.GstCtx.cr0, pVCpu->cpum.GstCtx.cr4, pVCpu->cpum.GstCtx.msrEFER);501 499 AssertLogRelRCReturn(rc, rc); 502 500 return rc; … … 1834 1832 #if defined(IN_RING0) && defined(NEM_WIN_TEMPLATE_MODE_OWN_RUN_API) 1835 1833 /** 1836 * Wrapper around nemR0WinImportState that converts VERR_NEM_ CHANGE_PGM_MODE and1837 * VERR_NEM_FLUSH_TBLinto informational status codes and logs+asserts statuses.1834 * Wrapper around nemR0WinImportState that converts VERR_NEM_FLUSH_TLB 1835 * into informational status codes and logs+asserts statuses. 1838 1836 * 1839 1837 * @returns VBox strict status code. … … 1853 1851 } 1854 1852 1855 if (rc == VERR_NEM_ CHANGE_PGM_MODE || rc == VERR_NEM_FLUSH_TLB || rc == VERR_NEM_UPDATE_APIC_BASE)1853 if (rc == VERR_NEM_FLUSH_TLB) 1856 1854 { 1857 1855 Log4(("%s/%u: nemR0WinImportState -> %Rrc\n", pszCaller, pGVCpu->idCpu, -rc)); … … 4363 4361 if (RT_SUCCESS(rc2)) 4364 4362 pVCpu->cpum.GstCtx.fExtrn &= ~fImport; 4365 else if (rc2 == VERR_NEM_ CHANGE_PGM_MODE || rc2 == VERR_NEM_FLUSH_TLB || rc2 == VERR_NEM_UPDATE_APIC_BASE)4363 else if (rc2 == VERR_NEM_FLUSH_TLB) 4366 4364 { 4367 4365 pVCpu->cpum.GstCtx.fExtrn &= ~fImport; -
trunk/src/VBox/VMM/VMMR0/NEMR0Native-win.cpp
r73281 r73282 1981 1981 iReg++; 1982 1982 } 1983 bool fUpdateApicBase = false;1984 1983 if (fWhat & CPUMCTX_EXTRN_OTHER_MSRS) 1985 1984 { … … 1991 1990 pVCpu->idCpu, uOldBase, paValues[iReg].Reg64, paValues[iReg].Reg64 ^ uOldBase)); 1992 1991 int rc2 = APICSetBaseMsr(pVCpu, paValues[iReg].Reg64); 1993 /** @todo fix me VINF_CPUM_R3_MSR_WRITE / APICSetBaseMsr */ 1994 if (rc2 == VINF_CPUM_R3_MSR_WRITE) 1995 { 1996 pVCpu->nem.s.uPendingApicBase = paValues[iReg].Reg64; 1997 fUpdateApicBase = true; 1998 } 1999 else 2000 AssertLogRelMsg(rc2 == VINF_SUCCESS, ("rc2=%Rrc [%#RX64]\n", rc2, paValues[iReg].Reg64)); 1992 AssertLogRelMsg(rc2 == VINF_SUCCESS, ("rc2=%Rrc [%#RX64]\n", rc2, paValues[iReg].Reg64)); 2001 1993 } 2002 1994 iReg++; … … 2166 2158 2167 2159 /* Typical. */ 2168 if (!fMaybeChangedMode && !fFlushTlb && !fUpdateApicBase)2160 if (!fMaybeChangedMode && !fFlushTlb) 2169 2161 return VINF_SUCCESS; 2170 2162 … … 2176 2168 { 2177 2169 rc = PGMChangeMode(pVCpu, pCtx->cr0, pCtx->cr4, pCtx->msrEFER); 2178 if (rc == VINF_PGM_CHANGE_MODE)2179 {2180 LogFlow(("nemR0WinImportState: -> VERR_NEM_CHANGE_PGM_MODE!\n"));2181 return VERR_NEM_CHANGE_PGM_MODE;2182 }2183 2170 AssertMsg(rc == VINF_SUCCESS, ("rc=%Rrc\n", rc)); 2184 2171 } … … 2187 2174 { 2188 2175 LogFlow(("nemR0WinImportState: -> VERR_NEM_FLUSH_TLB!\n")); 2176 /** @todo eliminate the VERR_NEM_FLUSH_TLB/VINF_NEM_FLUSH_TLB complication */ 2189 2177 rc = VERR_NEM_FLUSH_TLB; /* Calling PGMFlushTLB w/o long jump setup doesn't work, ring-3 does it. */ 2190 }2191 2192 if (fUpdateApicBase && rc == VINF_SUCCESS)2193 {2194 LogFlow(("nemR0WinImportState: -> VERR_NEM_UPDATE_APIC_BASE!\n"));2195 rc = VERR_NEM_UPDATE_APIC_BASE;2196 2178 } 2197 2179 -
trunk/src/VBox/VMM/VMMR3/NEMR3Native-win.cpp
r73281 r73282 1172 1172 */ 1173 1173 pVM->nem.s.fA20Enabled = true; 1174 #if 0 1174 1175 for (VMCPUID iCpu = 0; iCpu < pVM->cCpus; iCpu++) 1175 1176 { 1176 1177 PNEMCPU pNemCpu = &pVM->aCpus[iCpu].nem.s; 1177 pNemCpu->uPendingApicBase = UINT64_MAX;1178 1178 } 1179 #endif 1179 1180 1180 1181 /* … … 1664 1665 { 1665 1666 /* 1666 * We deal with VINF_NEM_CHANGE_PGM_MODE, VINF_NEM_FLUSH_TLB and 1667 * VINF_NEM_UPDATE_APIC_BASE here, since we're running the risk of 1667 * We deal with VINF_NEM_FLUSH_TLB here, since we're running the risk of 1668 1668 * getting these while we already got another RC (I/O ports). 1669 *1670 * The APIC base update and a PGM update can happen at the same time, so1671 * we don't depend on the status code for that and always checks it first.1672 1669 */ 1673 /* APIC base: */1674 if (pVCpu->nem.s.uPendingApicBase != UINT64_MAX)1675 {1676 LogFlow(("nemR3NativeRunGC: calling APICSetBaseMsr(,%RX64)...\n", pVCpu->nem.s.uPendingApicBase));1677 int rc2 = APICSetBaseMsr(pVCpu, pVCpu->nem.s.uPendingApicBase);1678 AssertLogRelMsg(rc2 == VINF_SUCCESS, ("rc2=%Rrc [%#RX64]\n", rc2, pVCpu->nem.s.uPendingApicBase));1679 pVCpu->nem.s.uPendingApicBase = UINT64_MAX;1680 }1681 1682 1670 /* Status codes: */ 1683 1671 VBOXSTRICTRC rcPending = pVCpu->nem.s.rcPending; 1684 1672 pVCpu->nem.s.rcPending = VINF_SUCCESS; 1685 if ( rcStrict == VINF_NEM_CHANGE_PGM_MODE 1686 || rcStrict == VINF_PGM_CHANGE_MODE 1687 || rcPending == VINF_NEM_CHANGE_PGM_MODE ) 1673 if (rcStrict == VINF_NEM_FLUSH_TLB || rcPending == VINF_NEM_FLUSH_TLB) 1688 1674 { 1689 LogFlow(("nemR3NativeRunGC: calling PGM ChangeMode...\n"));1690 int rc = PGM ChangeMode(pVCpu, CPUMGetGuestCR0(pVCpu), CPUMGetGuestCR4(pVCpu), CPUMGetGuestEFER(pVCpu));1675 LogFlow(("nemR3NativeRunGC: calling PGMFlushTLB...\n")); 1676 int rc = PGMFlushTLB(pVCpu, CPUMGetGuestCR3(pVCpu), true); 1691 1677 AssertRCReturn(rc, rc); 1692 if ( rcStrict == VINF_NEM_CHANGE_PGM_MODE 1693 || rcStrict == VINF_PGM_CHANGE_MODE 1694 || rcStrict == VINF_NEM_FLUSH_TLB) 1678 if (rcStrict == VINF_NEM_FLUSH_TLB) 1695 1679 { 1696 1680 if ( !VM_FF_IS_PENDING(pVM, VM_FF_HIGH_PRIORITY_POST_MASK | VM_FF_HP_R0_PRE_HM_MASK) … … 1704 1688 } 1705 1689 } 1706 else if (rcStrict == VINF_NEM_FLUSH_TLB || rcPending == VINF_NEM_FLUSH_TLB)1707 {1708 LogFlow(("nemR3NativeRunGC: calling PGMFlushTLB...\n"));1709 int rc = PGMFlushTLB(pVCpu, CPUMGetGuestCR3(pVCpu), true);1710 AssertRCReturn(rc, rc);1711 if (rcStrict == VINF_NEM_FLUSH_TLB || rcStrict == VINF_NEM_CHANGE_PGM_MODE)1712 {1713 if ( !VM_FF_IS_PENDING(pVM, VM_FF_HIGH_PRIORITY_POST_MASK | VM_FF_HP_R0_PRE_HM_MASK)1714 && !VMCPU_FF_IS_PENDING(pVCpu, (VMCPU_FF_HIGH_PRIORITY_POST_MASK | VMCPU_FF_HP_R0_PRE_HM_MASK)1715 & ~VMCPU_FF_RESUME_GUEST_MASK))1716 {1717 VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_RESUME_GUEST_MASK);1718 continue;1719 }1720 rcStrict = VINF_SUCCESS;1721 }1722 }1723 else if (rcStrict == VINF_NEM_UPDATE_APIC_BASE || rcPending == VERR_NEM_UPDATE_APIC_BASE)1724 continue;1725 1690 else 1726 1691 AssertMsg(rcPending == VINF_SUCCESS, ("rcPending=%Rrc\n", VBOXSTRICTRC_VAL(rcPending) )); -
trunk/src/VBox/VMM/include/NEMInternal.h
r72924 r73282 232 232 /** Last copy of HV_X64_VP_EXECUTION_STATE::InterruptShadow. */ 233 233 bool fLastInterruptShadow : 1; 234 /** Pending APIC base value.235 * This is set to UINT64_MAX when not pending */236 uint64_t uPendingApicBase;237 234 # ifdef NEM_WIN_WITH_RING0_RUNLOOP 238 /** Pending VINF_NEM_ CHANGE_PGM_MODE, VINF_NEM_FLUSH_TLB or VINF_NEM_UPDATE_APIC_BASE. */235 /** Pending VINF_NEM_FLUSH_TLB. */ 239 236 int32_t rcPending; 240 237 # else
Note:
See TracChangeset
for help on using the changeset viewer.