VirtualBox

Changeset 73869 in vbox for trunk


Ignore:
Timestamp:
Aug 24, 2018 9:03:00 AM (6 years ago)
Author:
vboxsync
Message:

VMM/IEM: Nested VMX: bugref:9180 Added VMCS map.

File:
1 edited

Legend:

Unmodified
Added
Removed

  • trunk/src/VBox/VMM/VMMAll/IEMAllCImplVmxInstr.cpp.h

    r73798 r73869  
    2929
    3030#ifdef VBOX_WITH_NESTED_HWVIRT_VMX
     31/**
     32 * Map of VMCS field encodings to their virtual-VMCS structure offsets.
     33 *
     34 * The first array dimension is VMCS field encoding of Width OR'ed with Type and the
     35 * second dimension is the Index, see VMXVMCSFIELDENC.
     36 */
     37uint16_t const g_aoffVmcsMap[16][VMX_V_VMCS_MAX_INDEX + 1] =
     38{
     39    /* VMX_VMCS_ENC_WIDTH_16BIT | VMX_VMCS_ENC_TYPE_CONTROL: */
     40    {
     41        /*     0 */ RT_OFFSETOF(VMXVVMCS, u16Vpid),
     42        /*     1 */ RT_OFFSETOF(VMXVVMCS, u16PostIntNotifyVector),
     43        /*     2 */ RT_OFFSETOF(VMXVVMCS, u16EptpIndex),
     44        /*  3-10 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
     45        /* 11-18 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
     46        /* 19-25 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX
     47    },
     48    /* VMX_VMCS_ENC_WIDTH_16BIT | VMX_VMCS_ENC_TYPE_VMEXIT_INFO: */
     49    {
     50        /*   0-7 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
     51        /*  8-15 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
     52        /* 16-23 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
     53        /* 24-25 */ UINT16_MAX, UINT16_MAX
     54    },
     55    /* VMX_VMCS_ENC_WIDTH_16BIT | VMX_VMCS_ENC_TYPE_GUEST_STATE: */
     56    {
     57        /*     0 */ RT_OFFSET(VMXVVMCS, GuestEs),
     58        /*     1 */ RT_OFFSET(VMXVVMCS, GuestCs),
     59        /*     2 */ RT_OFFSET(VMXVVMCS, GuestSs),
     60        /*     3 */ RT_OFFSET(VMXVVMCS, GuestDs),
     61        /*     4 */ RT_OFFSET(VMXVVMCS, GuestFs),
     62        /*     5 */ RT_OFFSET(VMXVVMCS, GuestGs),
     63        /*     6 */ RT_OFFSET(VMXVVMCS, GuestLdtr),
     64        /*     7 */ RT_OFFSET(VMXVVMCS, GuestTr),
     65        /*     8 */ RT_OFFSET(VMXVVMCS, u16GuestIntStatus),
     66        /*     9 */ RT_OFFSET(VMXVVMCS, u16PmlIndex),
     67        /* 10-17 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
     68        /* 18-25 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX
     69    },
     70    /* VMX_VMCS_ENC_WIDTH_16BIT | VMX_VMCS_ENC_TYPE_HOST_STATE: */
     71    {
     72        /*     0 */ RT_OFFSET(VMXVVMCS, HostEs),
     73        /*     1 */ RT_OFFSET(VMXVVMCS, HostCs),
     74        /*     2 */ RT_OFFSET(VMXVVMCS, HostSs),
     75        /*     3 */ RT_OFFSET(VMXVVMCS, HostDs),
     76        /*     4 */ RT_OFFSET(VMXVVMCS, HostFs),
     77        /*     5 */ RT_OFFSET(VMXVVMCS, HostGs),
     78        /*     6 */ RT_OFFSET(VMXVVMCS, HostTr),
     79        /*  7-14 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
     80        /* 15-22 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
     81        /* 23-25 */ UINT16_MAX, UINT16_MAX, UINT16_MAX
     82    },
     83    /* VMX_VMCS_ENC_WIDTH_64BIT | VMX_VMCS_ENC_TYPE_CONTROL: */
     84    {
     85        /*     0 */ RT_OFFSETOF(VMXVVMCS, u64AddrIoBitmapA),
     86        /*     1 */ RT_OFFSETOF(VMXVVMCS, u64AddrIoBitmapB),
     87        /*     2 */ RT_OFFSETOF(VMXVVMCS, u64AddrMsrBitmap),
     88        /*     3 */ RT_OFFSETOF(VMXVVMCS, u64AddrVmExitMsrStore),
     89        /*     4 */ RT_OFFSETOF(VMXVVMCS, u64AddrVmExitMsrLoad),
     90        /*     5 */ RT_OFFSETOF(VMXVVMCS, u64AddrVmEntryMsrLoad),
     91        /*     6 */ RT_OFFSETOF(VMXVVMCS, u64ExecVmcsPtr),
     92        /*     7 */ RT_OFFSETOF(VMXVVMCS, u64AddrPml),
     93        /*     8 */ RT_OFFSETOF(VMXVVMCS, u64TscOffset),
     94        /*     9 */ RT_OFFSETOF(VMXVVMCS, u64AddrVirtApic),
     95        /*    10 */ RT_OFFSETOF(VMXVVMCS, u64AddrApicAccess),
     96        /*    11 */ RT_OFFSETOF(VMXVVMCS, u64AddrPostedIntDesc),
     97        /*    12 */ RT_OFFSETOF(VMXVVMCS, u64VmFuncCtls),
     98        /*    13 */ RT_OFFSETOF(VMXVVMCS, u64EptpPtr),
     99        /*    14 */ RT_OFFSETOF(VMXVVMCS, u64EoiExitBitmap0),
     100        /*    15 */ RT_OFFSETOF(VMXVVMCS, u64EoiExitBitmap1),
     101        /*    16 */ RT_OFFSETOF(VMXVVMCS, u64EoiExitBitmap2),
     102        /*    17 */ RT_OFFSETOF(VMXVVMCS, u64EoiExitBitmap3),
     103        /*    18 */ RT_OFFSETOF(VMXVVMCS, u64AddrEptpList),
     104        /*    19 */ RT_OFFSETOF(VMXVVMCS, u64AddrVmreadBitmap),
     105        /*    20 */ RT_OFFSETOF(VMXVVMCS, u64AddrVmwriteBitmap),
     106        /*    21 */ RT_OFFSETOF(VMXVVMCS, u64AddrXcptVeInfo),
     107        /*    22 */ RT_OFFSETOF(VMXVVMCS, u64AddrXssBitmap),
     108        /*    23 */ RT_OFFSETOF(VMXVVMCS, u64AddrEnclsBitmap),
     109        /*    24 */ UINT16_MAX,
     110        /*    25 */ RT_OFFSETOF(VMXVVMCS, u64TscMultiplier)
     111    },
     112    /* VMX_VMCS_ENC_WIDTH_64BIT | VMX_VMCS_ENC_TYPE_VMEXIT_INFO: */
     113    {
     114        /*     0 */ RT_OFFSET(VMXVVMCS, u64GuestPhysAddr),
     115        /*   1-8 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX
     116        /*  9-16 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
     117        /* 17-24 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
     118        /*    25 */ UINT16_MAX
     119    },
     120    /* VMX_VMCS_ENC_WIDTH_64BIT | VMX_VMCS_ENC_TYPE_GUEST_STATE: */
     121    {
     122        /*     0 */ RT_OFFSET(VMXVVMCS, u64VmcsLinkPtr),
     123        /*     1 */ RT_OFFSET(VMXVVMCS, u64GuestDebugCtlMsr),
     124        /*     2 */ RT_OFFSET(VMXVVMCS, u64GuestPatMsr),
     125        /*     3 */ RT_OFFSET(VMXVVMCS, u64GuestEferMsr),
     126        /*     4 */ RT_OFFSET(VMXVVMCS, u64GuestPerfGlobalCtlMsr),
     127        /*     5 */ RT_OFFSET(VMXVVMCS, u64GuestPdpte0),
     128        /*     6 */ RT_OFFSET(VMXVVMCS, u64GuestPdpte1),
     129        /*     7 */ RT_OFFSET(VMXVVMCS, u64GuestPdpte2),
     130        /*     8 */ RT_OFFSET(VMXVVMCS, u64GuestPdpte3),
     131        /*     9 */ RT_OFFSET(VMXVVMCS, u64GuestBndcfgsMsr),
     132        /* 10-17 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX
     133        /* 18-25 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX
     134    },
     135    /* VMX_VMCS_ENC_WIDTH_64BIT | VMX_VMCS_ENC_TYPE_HOST_STATE: */
     136    {
     137        /*     0 */ RT_OFFSET(VMXVVMCS, u64HostPatMsr),
     138        /*     1 */ RT_OFFSET(VMXVVMCS, u64HostEferMsr),
     139        /*     2 */ RT_OFFSET(VMXVVMCS, u64HostPerfGlobalCtlMsr),
     140        /*  3-10 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
     141        /* 11-18 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
     142        /* 19-25 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX
     143    },
     144    /* VMX_VMCS_ENC_WIDTH_32BIT | VMX_VMCS_ENC_TYPE_CONTROL: */
     145    {
     146        /*     0 */ RT_OFFSET(VMXVVMCS, u32PinCtls),
     147        /*     1 */ RT_OFFSET(VMXVVMCS, u32ProcCtls),
     148        /*     2 */ RT_OFFSET(VMXVVMCS, u32XcptBitmap),
     149        /*     3 */ RT_OFFSET(VMXVVMCS, u32XcptPFMask),
     150        /*     4 */ RT_OFFSET(VMXVVMCS, u32XcptPFMatch),
     151        /*     5 */ RT_OFFSET(VMXVVMCS, u32Cr3TargetCount),
     152        /*     6 */ RT_OFFSET(VMXVVMCS, u32ExitCtls),
     153        /*     7 */ RT_OFFSET(VMXVVMCS, u32ExitMsrStoreCount),
     154        /*     8 */ RT_OFFSET(VMXVVMCS, u32ExitMsrLoadCount),
     155        /*     9 */ RT_OFFSET(VMXVVMCS, u32EntryCtls),
     156        /*    10 */ RT_OFFSET(VMXVVMCS, u32EntryMsrLoadCount),
     157        /*    11 */ RT_OFFSET(VMXVVMCS, u32EntryIntInfo),
     158        /*    12 */ RT_OFFSET(VMXVVMCS, u32EntryXcptErrCode),
     159        /*    13 */ RT_OFFSET(VMXVVMCS, u32EntryInstrLen),
     160        /*    14 */ RT_OFFSET(VMXVVMCS, u32TprTreshold),
     161        /*    15 */ RT_OFFSET(VMXVVMCS, u32ProcCtls2),
     162        /*    16 */ RT_OFFSET(VMXVVMCS, u32PleGap),
     163        /*    17 */ RT_OFFSET(VMXVVMCS, u32PleWindow),
     164        /* 18-25 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX
     165    },
     166    /* VMX_VMCS_ENC_WIDTH_32BIT | VMX_VMCS_ENC_TYPE_VMEXIT_INFO: */
     167    {
     168        /*     0 */ RT_OFFSET(VMXVVMCS, u32RoVmInstrError),
     169        /*     1 */ RT_OFFSET(VMXVVMCS, u32RoVmExitReason),
     170        /*     2 */ RT_OFFSET(VMXVVMCS, u32RoVmExitIntInfo),
     171        /*     3 */ RT_OFFSET(VMXVVMCS, u32RoVmExitErrCode),
     172        /*     4 */ RT_OFFSET(VMXVVMCS, u32RoIdtVectoringInfo),
     173        /*     5 */ RT_OFFSET(VMXVVMCS, u32RoIdtVectoringErrCode),
     174        /*     6 */ RT_OFFSET(VMXVVMCS, u32RoVmExitInstrLen),
     175        /*     7 */ RT_OFFSET(VMXVVMCS, u32RoVmExitInstrInfo),
     176        /*  8-15 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
     177        /* 16-23 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
     178        /* 24-25 */ UINT16_MAX, UINT16_MAX
     179    },
     180    /* VMX_VMCS_ENC_WIDTH_32BIT | VMX_VMCS_ENC_TYPE_GUEST_STATE: */
     181    {
     182        /*     0 */ RT_OFFSET(VMXVVMCS, u32GuestEsLimit),
     183        /*     1 */ RT_OFFSET(VMXVVMCS, u32GuestCsLimit),
     184        /*     2 */ RT_OFFSET(VMXVVMCS, u32GuestSsLimit),
     185        /*     3 */ RT_OFFSET(VMXVVMCS, u32GuestDsLimit),
     186        /*     4 */ RT_OFFSET(VMXVVMCS, u32GuestEsLimit),
     187        /*     5 */ RT_OFFSET(VMXVVMCS, u32GuestFsLimit),
     188        /*     6 */ RT_OFFSET(VMXVVMCS, u32GuestGsLimit),
     189        /*     7 */ RT_OFFSET(VMXVVMCS, u32GuestLdtrLimit),
     190        /*     8 */ RT_OFFSET(VMXVVMCS, u32GuestTrLimit),
     191        /*     9 */ RT_OFFSET(VMXVVMCS, u32GuestGdtrLimit),
     192        /*    10 */ RT_OFFSET(VMXVVMCS, u32GuestIdtrLimit),
     193        /*    11 */ RT_OFFSET(VMXVVMCS, u32GuestEsAttr),
     194        /*    12 */ RT_OFFSET(VMXVVMCS, u32GuestCsAttr),
     195        /*    13 */ RT_OFFSET(VMXVVMCS, u32GuestSsAttr),
     196        /*    14 */ RT_OFFSET(VMXVVMCS, u32GuestDsAttr),
     197        /*    15 */ RT_OFFSET(VMXVVMCS, u32GuestFsAttr),
     198        /*    16 */ RT_OFFSET(VMXVVMCS, u32GuestGsAttr),
     199        /*    17 */ RT_OFFSET(VMXVVMCS, u32GuestLdtrAttr),
     200        /*    18 */ RT_OFFSET(VMXVVMCS, u32GuestTrAttr),
     201        /*    19 */ RT_OFFSET(VMXVVMCS, u32GuestIntrState),
     202        /*    20 */ RT_OFFSET(VMXVVMCS, u32GuestActivityState),
     203        /*    21 */ RT_OFFSET(VMXVVMCS, u32GuestSmBase),
     204        /*    22 */ RT_OFFSET(VMXVVMCS, u32GuestSysenterCS),
     205        /*    23 */ RT_OFFSET(VMXVVMCS, u32PreemptTimer),
     206        /* 24-25 */ UINT16_MAX, UINT16_MAX
     207    },
     208    /* VMX_VMCS_ENC_WIDTH_32BIT | VMX_VMCS_ENC_TYPE_HOST_STATE: */
     209    {
     210        /*     0 */ RT_OFFSET(VMXVVMCS, u32HostSysenterCs),
     211        /*   1-8 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX
     212        /*  9-16 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
     213        /* 17-24 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
     214        /*    25 */ UINT16_MAX
     215    },
     216    /* VMX_VMCS_ENC_WIDTH_NATURAL | VMX_VMCS_ENC_TYPE_CONTROL: */
     217    {
     218        /*     0 */ RT_OFFSET(VMXVVMCS, u64Cr0Mask),
     219        /*     1 */ RT_OFFSET(VMXVVMCS, u64Cr4Mask),
     220        /*     2 */ RT_OFFSET(VMXVVMCS, u64Cr0ReadShadow),
     221        /*     3 */ RT_OFFSET(VMXVVMCS, u64Cr4ReadShadow),
     222        /*     4 */ RT_OFFSET(VMXVVMCS, u64Cr3Target0),
     223        /*     5 */ RT_OFFSET(VMXVVMCS, u64Cr3Target1),
     224        /*     6 */ RT_OFFSET(VMXVVMCS, u64Cr3Target2),
     225        /*     7 */ RT_OFFSET(VMXVVMCS, u64Cr3Target3),
     226        /*  8-15 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
     227        /* 16-23 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
     228        /* 24-25 */ UINT16_MAX, UINT16_MAX
     229    },
     230    /* VMX_VMCS_ENC_WIDTH_NATURAL | VMX_VMCS_ENC_TYPE_VMEXIT_INFO: */
     231    {
     232        /*     0 */ RT_OFFSET(VMXVVMCS, u64ExitQual),
     233        /*     1 */ RT_OFFSET(VMXVVMCS, u64IoRcx),
     234        /*     2 */ RT_OFFSET(VMXVVMCS, u64IoRsi),
     235        /*     3 */ RT_OFFSET(VMXVVMCS, u64IoRdi),
     236        /*     4 */ RT_OFFSET(VMXVVMCS, u64IoRip),
     237        /*     5 */ RT_OFFSET(VMXVVMCS, u64GuestLinearAddr),
     238        /*  6-13 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
     239        /* 14-21 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
     240        /* 22-25 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX
     241    },
     242    /* VMX_VMCS_ENC_WIDTH_NATURAL | VMX_VMCS_ENC_TYPE_GUEST_STATE: */
     243    {
     244        /*     0 */ RT_OFFSET(VMXVVMCS, u64GuestCr0),
     245        /*     1 */ RT_OFFSET(VMXVVMCS, u64GuestCr3),
     246        /*     2 */ RT_OFFSET(VMXVVMCS, u64GuestCr4),
     247        /*     3 */ RT_OFFSET(VMXVVMCS, u64GuestEsBase),
     248        /*     4 */ RT_OFFSET(VMXVVMCS, u64GuestCsBase),
     249        /*     5 */ RT_OFFSET(VMXVVMCS, u64GuestSsBase),
     250        /*     6 */ RT_OFFSET(VMXVVMCS, u64GuestDsBase),
     251        /*     7 */ RT_OFFSET(VMXVVMCS, u64GuestFsBase),
     252        /*     8 */ RT_OFFSET(VMXVVMCS, u64GuestGsBase),
     253        /*     9 */ RT_OFFSET(VMXVVMCS, u64GuestLdtrBase),
     254        /*    10 */ RT_OFFSET(VMXVVMCS, u64GuestTrBase),
     255        /*    11 */ RT_OFFSET(VMXVVMCS, u64GuestGdtrBase),
     256        /*    12 */ RT_OFFSET(VMXVVMCS, u64GuestIdtrBase),
     257        /*    13 */ RT_OFFSET(VMXVVMCS, u64GuestDr7),
     258        /*    14 */ RT_OFFSET(VMXVVMCS, u64GuestRsp),
     259        /*    15 */ RT_OFFSET(VMXVVMCS, u64GuestRip),
     260        /*    16 */ RT_OFFSET(VMXVVMCS, u64GuestRFlags),
     261        /*    17 */ RT_OFFSET(VMXVVMCS, u64GuestPendingDbgXcpt),
     262        /*    18 */ RT_OFFSET(VMXVVMCS, u64GuestSysenterEsp),
     263        /*    19 */ RT_OFFSET(VMXVVMCS, u64GuestSysenterEip),
     264        /* 20-25 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX
     265    },
     266    /* VMX_VMCS_ENC_WIDTH_NATURAL | VMX_VMCS_ENC_TYPE_HOST_STATE: */
     267    {
     268        /*     0 */ RT_OFFSET(VMXVVMCS, u64HostCr0),
     269        /*     1 */ RT_OFFSET(VMXVVMCS, u64HostCr3),
     270        /*     2 */ RT_OFFSET(VMXVVMCS, u64HostCr4),
     271        /*     3 */ RT_OFFSET(VMXVVMCS, u64HostFsBase),
     272        /*     4 */ RT_OFFSET(VMXVVMCS, u64HostGsBase),
     273        /*     5 */ RT_OFFSET(VMXVVMCS, u64HostTrBase),
     274        /*     6 */ RT_OFFSET(VMXVVMCS, u64HostGdtrBase),
     275        /*     7 */ RT_OFFSET(VMXVVMCS, u64HostIdtrBase),
     276        /*     8 */ RT_OFFSET(VMXVVMCS, u64HostSysenterEsp),
     277        /*     9 */ RT_OFFSET(VMXVVMCS, u64HostSysenterEip),
     278        /*    10 */ RT_OFFSET(VMXVVMCS, u64HostRsp),
     279        /*    11 */ RT_OFFSET(VMXVVMCS, u64HostRip),
     280        /* 12-19 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
     281        /* 20-25 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX
     282    }
     283};
     284
    31285
    32286/**
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