VirtualBox

Changeset 76018 in vbox for trunk/src/VBox/Devices


Ignore:
Timestamp:
Dec 6, 2018 3:14:02 PM (6 years ago)
Author:
vboxsync
Message:

Audio/HDA: Cleaned up setting the stream registers at one defined place (hdaR3StreamInit()).

Location:
trunk/src/VBox/Devices/Audio
Files:
3 edited

Legend:

Unmodified
Added
Removed
  • trunk/src/VBox/Devices/Audio/DevHDA.cpp

    r75980 r76018  
    12641264    DEVHDA_LOCK_RETURN(pThis, VINF_IOM_R3_MMIO_WRITE);
    12651265
    1266     PHDASTREAM pStream = hdaGetStreamFromSD(pThis, HDA_SD_NUM_FROM_REG(pThis, CBL, iReg));
    1267     if (pStream)
    1268     {
    1269         pStream->u32CBL = u32Value;
    1270         LogFlowFunc(("[SD%RU8] CBL=%RU32\n", pStream->u8SD, u32Value));
    1271     }
    1272     else
    1273         LogFunc(("[SD%RU8] Warning: Changing SDCBL on non-attached stream (0x%x)\n",
    1274                  HDA_SD_NUM_FROM_REG(pThis, CTL, iReg), u32Value));
    1275 
    12761266    int rc = hdaRegWriteU32(pThis, iReg, u32Value);
    12771267    AssertRCSuccess(rc);
     
    16041594    DEVHDA_LOCK_RETURN(pThis, VINF_IOM_R3_MMIO_WRITE);
    16051595
    1606     if (HDA_REG_IND(pThis, iReg) == u32Value) /* Value already set? */
    1607     { /* nothing to do */ }
    1608     else
    1609     {
    1610         uint8_t    uSD     = HDA_SD_NUM_FROM_REG(pThis, LVI, iReg);
     1596#ifdef HDA_USE_DMA_ACCESS_HANDLER
     1597    uint8_t uSD = HDA_SD_NUM_FROM_REG(pThis, LVI, iReg);
     1598
     1599    if (hdaGetDirFromSD(uSD) == PDMAUDIODIR_OUT)
     1600    {
    16111601        PHDASTREAM pStream = hdaGetStreamFromSD(pThis, uSD);
    1612         if (pStream)
    1613         {
    1614             /** @todo Validate LVI. */
    1615             pStream->u16LVI = u32Value;
    1616             LogFunc(("[SD%RU8] Updating LVI to %RU16\n", uSD, pStream->u16LVI));
    1617 
    1618 #ifdef HDA_USE_DMA_ACCESS_HANDLER
    1619             if (hdaGetDirFromSD(uSD) == PDMAUDIODIR_OUT)
    1620             {
    1621                 /* Try registering the DMA handlers.
    1622                  * As we can't be sure in which order LVI + BDL base are set, try registering in both routines. */
    1623                 if (hdaR3StreamRegisterDMAHandlers(pThis, pStream))
    1624                     LogFunc(("[SD%RU8] DMA logging enabled\n", pStream->u8SD));
    1625             }
     1602
     1603        /* Try registering the DMA handlers.
     1604         * As we can't be sure in which order LVI + BDL base are set, try registering in both routines. */
     1605        if (   pStream
     1606            && hdaR3StreamRegisterDMAHandlers(pThis, pStream))
     1607        {
     1608            LogFunc(("[SD%RU8] DMA logging enabled\n", pStream->u8SD));
     1609        }
     1610    }
    16261611#endif
    1627         }
    1628         else
    1629             AssertMsgFailed(("[SD%RU8] Warning: Changing SDLVI on non-attached stream (0x%x)\n", uSD, u32Value));
    1630 
    1631         int rc2 = hdaRegWriteU16(pThis, iReg, u32Value);
    1632         AssertRC(rc2);
    1633     }
     1612
     1613    int rc2 = hdaRegWriteU16(pThis, iReg, u32Value);
     1614    AssertRC(rc2);
    16341615
    16351616    DEVHDA_UNLOCK(pThis);
     
    17111692    }
    17121693
    1713     PHDASTREAM pStream = hdaGetStreamFromSD(pThis, uSD);
    1714     if (!pStream)
    1715     {
    1716         AssertMsgFailed(("[SD%RU8] Warning: Changing FIFOS on non-attached stream (0x%x)\n", uSD, u32Value));
    1717 
    1718         int rc = hdaRegWriteU16(pThis, iReg, u32Value);
    1719         DEVHDA_UNLOCK(pThis);
    1720         return rc;
    1721     }
    1722 
    1723     uint32_t u32FIFOS = 0;
     1694    uint32_t u32FIFOS;
    17241695
    17251696    switch(u32Value)
     
    17411712    }
    17421713
    1743     if (u32FIFOS)
    1744     {
    1745         pStream->u16FIFOS = u32FIFOS + 1;
    1746         LogFunc(("[SD%RU8] Updating FIFOS to %RU32 bytes\n", uSD, pStream->u16FIFOS));
    1747 
    1748         int rc2 = hdaRegWriteU16(pThis, iReg, u32FIFOS);
    1749         AssertRC(rc2);
    1750     }
     1714    int rc2 = hdaRegWriteU16(pThis, iReg, u32FIFOS);
     1715    AssertRC(rc2);
    17511716
    17521717    DEVHDA_UNLOCK(pThis);
     
    20362001static int hdaRegWriteSDFMT(PHDASTATE pThis, uint32_t iReg, uint32_t u32Value)
    20372002{
    2038     DEVHDA_LOCK(pThis);
    2039 
    2040 # ifdef LOG_ENABLED
    2041     if (!hdaGetStreamFromSD(pThis, HDA_SD_NUM_FROM_REG(pThis, FMT, iReg)))
    2042         LogFunc(("[SD%RU8] Warning: Changing SDFMT on non-attached stream (0x%x)\n",
    2043                  HDA_SD_NUM_FROM_REG(pThis, FMT, iReg), u32Value));
    2044 # endif
    2045 
     2003    DEVHDA_LOCK_RETURN(pThis, VINF_IOM_R3_MMIO_WRITE);
    20462004
    20472005    /* Write the wanted stream format into the register in any case.
     
    20562014
    20572015    DEVHDA_UNLOCK(pThis);
    2058     return VINF_SUCCESS; /* Never return failure. */
     2016    return VINF_SUCCESS; /* Always return success to the MMIO handler. */
    20592017}
    20602018
     
    20652023    DEVHDA_LOCK(pThis);
    20662024
     2025# ifdef HDA_USE_DMA_ACCESS_HANDLER
     2026    if (hdaGetDirFromSD(uSD) == PDMAUDIODIR_OUT)
     2027    {
     2028        PHDASTREAM pStream = hdaGetStreamFromSD(pThis, uSD);
     2029
     2030        /* Try registering the DMA handlers.
     2031         * As we can't be sure in which order LVI + BDL base are set, try registering in both routines. */
     2032        if (   pStream
     2033            && hdaR3StreamRegisterDMAHandlers(pThis, pStream))
     2034        {
     2035            LogFunc(("[SD%RU8] DMA logging enabled\n", pStream->u8SD));
     2036        }
     2037    }
     2038# else
     2039    RT_NOREF(uSD);
     2040# endif
     2041
    20672042    int rc2 = hdaRegWriteU32(pThis, iReg, u32Value);
    20682043    AssertRC(rc2);
    2069 
    2070     PHDASTREAM pStream = hdaGetStreamFromSD(pThis, uSD);
    2071     if (!pStream)
    2072     {
    2073         DEVHDA_UNLOCK(pThis);
    2074         return VINF_SUCCESS;
    2075     }
    2076 
    2077     /* Update BDL base. */
    2078     pStream->u64BDLBase = RT_MAKE_U64(HDA_STREAM_REG(pThis, BDPL, uSD),
    2079                                       HDA_STREAM_REG(pThis, BDPU, uSD));
    2080 
    2081 # ifdef HDA_USE_DMA_ACCESS_HANDLER
    2082     if (hdaGetDirFromSD(uSD) == PDMAUDIODIR_OUT)
    2083     {
    2084         /* Try registering the DMA handlers.
    2085          * As we can't be sure in which order LVI + BDL base are set, try registering in both routines. */
    2086         if (hdaR3StreamRegisterDMAHandlers(pThis, pStream))
    2087             LogFunc(("[SD%RU8] DMA logging enabled\n", pStream->u8SD));
    2088     }
    2089 # endif
    2090 
    2091     LogFlowFunc(("[SD%RU8] BDLBase=0x%x\n", pStream->u8SD, pStream->u64BDLBase));
    20922044
    20932045    DEVHDA_UNLOCK(pThis);
  • trunk/src/VBox/Devices/Audio/HDAStream.cpp

    r75983 r76018  
    203203    const uint32_t u32CBL     = HDA_STREAM_REG(pThis, CBL, uSD);
    204204    const uint16_t u16FIFOS   = HDA_STREAM_REG(pThis, FIFOS, uSD) + 1;
    205     const uint32_t u32FMT     = HDA_STREAM_REG(pThis, FMT, uSD);
     205    const uint16_t u16FMT     = HDA_STREAM_REG(pThis, FMT, uSD);
    206206
    207207    /* Is the bare minimum set of registers configured for the stream?
     
    211211        || !u32CBL
    212212        || !u16FIFOS
    213         || !u32FMT)
     213        || !u16FMT)
    214214    {
    215215        LogFunc(("[SD%RU8] Registers not set up yet, skipping (re-)initialization\n", uSD));
     
    218218
    219219    PDMAUDIOPCMPROPS Props;
    220     int rc = hdaR3SDFMTToPCMProps(u32FMT, &Props);
     220    int rc = hdaR3SDFMTToPCMProps(u16FMT, &Props);
    221221    if (RT_FAILURE(rc))
    222222    {
     
    262262        && u32CBL     == pStream->u32CBL
    263263        && u16FIFOS   == pStream->u16FIFOS
    264         && DrvAudioHlpPCMPropsAreEqual(&Props, &pStream->State.Cfg.Props))
     264        && u16FMT     == pStream->u16FMT)
    265265    {
    266266        LogFunc(("[SD%RU8] No format change, skipping (re-)initialization\n", uSD));
     
    269269
    270270    pStream->u8SD       = uSD;
     271
     272    /* Update all register copies so that we later know that something has changed. */
    271273    pStream->u64BDLBase = u64BDLBase;
    272274    pStream->u16LVI     = u16LVI;
    273275    pStream->u32CBL     = u32CBL;
    274276    pStream->u16FIFOS   = u16FIFOS;
     277    pStream->u16FMT     = u16FMT;
    275278
    276279    PPDMAUDIOSTREAMCFG pCfg = &pStream->State.Cfg;
  • trunk/src/VBox/Devices/Audio/HDAStream.h

    r75983 r76018  
    201201    uint8_t                  u8Channel;
    202202    uint8_t                  Padding0[6];
    203     /** DMA base address (SDnBDPU - SDnBDPL). */
     203    /** DMA base address (SDnBDPU - SDnBDPL).
     204     *  Will be updated in hdaR3StreamInit(). */
    204205    uint64_t                 u64BDLBase;
    205206    /** Cyclic Buffer Length (SDnCBL).
    206      *  Represents the size of the ring buffer. */
     207     *  Represents the size of the ring buffer.
     208     *  Will be updated in hdaR3StreamInit(). */
    207209    uint32_t                 u32CBL;
    208     /** Format (SDnFMT). */
     210    /** Format (SDnFMT).
     211     *  Will be updated in hdaR3StreamInit(). */
    209212    uint16_t                 u16FMT;
    210213    /** FIFO Size (FIFOS).
    211214     *  Maximum number of bytes that may have been DMA'd into
    212      *  memory but not yet transmitted on the link. */
     215     *  memory but not yet transmitted on the link.
     216     *
     217     *  Will be updated in hdaR3StreamInit(). */
    213218    uint16_t                 u16FIFOS;
    214219    /** FIFO Watermark. */
    215220    uint16_t                 u16FIFOW;
    216     /** Last Valid Index (SDnLVI). */
     221    /** Last Valid Index (SDnLVI).
     222     *  Will be updated in hdaR3StreamInit(). */
    217223    uint16_t                 u16LVI;
    218224    uint16_t                 Padding1[2];
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