VirtualBox

Ignore:
Timestamp:
Dec 26, 2018 3:49:56 AM (6 years ago)
Author:
vboxsync
Message:

VMM/HM: Made vmx/svm VCPU state as a union, saves some space now that SVM bits have grown with nested-SVM and other cleanup.

File:
1 edited

Legend:

Unmodified
Added
Removed

  • trunk/src/VBox/VMM/VMMR0/HMR0.cpp

    r76469 r76482  
    8383{
    8484    /** Per CPU globals. */
    85     HMGLOBALCPUINFO                 aCpuInfo[RTCPUSET_MAX_CPUS];
     85    HMPHYSCPU                       aCpuInfo[RTCPUSET_MAX_CPUS];
    8686
    8787    /** @name Ring-0 method table for AMD-V and VT-x specific operations.
    8888     * @{ */
    89     DECLR0CALLBACKMEMBER(int,  pfnEnterSession, (PVMCPU pVCpu, PHMGLOBALCPUINFO pHostCpu));
     89    DECLR0CALLBACKMEMBER(int,  pfnEnterSession, (PVMCPU pVCpu));
    9090    DECLR0CALLBACKMEMBER(void, pfnThreadCtxCallback, (RTTHREADCTXEVENT enmEvent, PVMCPU pVCpu, bool fGlobalInit));
    9191    DECLR0CALLBACKMEMBER(int,  pfnExportHostState, (PVMCPU pVCpu));
    9292    DECLR0CALLBACKMEMBER(VBOXSTRICTRC, pfnRunGuestCode, (PVMCPU pVCpu));
    93     DECLR0CALLBACKMEMBER(int,  pfnEnableCpu, (PHMGLOBALCPUINFO pHostCpu, PVM pVM, void *pvCpuPage, RTHCPHYS HCPhysCpuPage,
     93    DECLR0CALLBACKMEMBER(int,  pfnEnableCpu, (PHMPHYSCPU pHostCpu, PVM pVM, void *pvCpuPage, RTHCPHYS HCPhysCpuPage,
    9494                                              bool fEnabledByHost, PCSUPHWVIRTMSRS pHwvirtMsrs));
    95     DECLR0CALLBACKMEMBER(int,  pfnDisableCpu, (PHMGLOBALCPUINFO pHostCpu, void *pvCpuPage, RTHCPHYS HCPhysCpuPage));
     95    DECLR0CALLBACKMEMBER(int,  pfnDisableCpu, (void *pvCpuPage, RTHCPHYS HCPhysCpuPage));
    9696    DECLR0CALLBACKMEMBER(int,  pfnInitVM, (PVM pVM));
    9797    DECLR0CALLBACKMEMBER(int,  pfnTermVM, (PVM pVM));
    … …  
    227227 * @{ */
    228228
    229 static DECLCALLBACK(int) hmR0DummyEnter(PVMCPU pVCpu, PHMGLOBALCPUINFO pHostCpu)
    230 {
    231     RT_NOREF2(pVCpu, pHostCpu);
     229static DECLCALLBACK(int) hmR0DummyEnter(PVMCPU pVCpu)
     230{
     231    RT_NOREF1(pVCpu);
    232232    return VINF_SUCCESS;
    233233}
    … …  
    238238}
    239239
    240 static DECLCALLBACK(int) hmR0DummyEnableCpu(PHMGLOBALCPUINFO pHostCpu, PVM pVM, void *pvCpuPage, RTHCPHYS HCPhysCpuPage,
     240static DECLCALLBACK(int) hmR0DummyEnableCpu(PHMPHYSCPU pHostCpu, PVM pVM, void *pvCpuPage, RTHCPHYS HCPhysCpuPage,
    241241                                            bool fEnabledBySystem, PCSUPHWVIRTMSRS pHwvirtMsrs)
    242242{
    … …  
    245245}
    246246
    247 static DECLCALLBACK(int) hmR0DummyDisableCpu(PHMGLOBALCPUINFO pHostCpu, void *pvCpuPage, RTHCPHYS HCPhysCpuPage)
    248 {
    249     RT_NOREF3(pHostCpu, pvCpuPage, HCPhysCpuPage);
     247static DECLCALLBACK(int) hmR0DummyDisableCpu(void *pvCpuPage, RTHCPHYS HCPhysCpuPage)
     248{
     249    RT_NOREF2(pvCpuPage, HCPhysCpuPage);
    250250    return VINF_SUCCESS;
    251251}
    … …  
    789789static int hmR0EnableCpu(PVM pVM, RTCPUID idCpu)
    790790{
    791     PHMGLOBALCPUINFO pHostCpu = &g_HmR0.aCpuInfo[idCpu];
     791    PHMPHYSCPU pHostCpu = &g_HmR0.aCpuInfo[idCpu];
    792792
    793793    Assert(idCpu == (RTCPUID)RTMpCpuIdToSetIndex(idCpu)); /** @todo fix idCpu == index assumption (rainy day) */
    … …  
    975975static int hmR0DisableCpu(RTCPUID idCpu)
    976976{
    977     PHMGLOBALCPUINFO pHostCpu = &g_HmR0.aCpuInfo[idCpu];
     977    PHMPHYSCPU pHostCpu = &g_HmR0.aCpuInfo[idCpu];
    978978
    979979    Assert(!g_HmR0.hwvirt.u.vmx.fSupported || !g_HmR0.hwvirt.u.vmx.fUsingSUPR0EnableVTx);
    … …  
    992992    if (pHostCpu->fConfigured)
    993993    {
    994         rc = g_HmR0.pfnDisableCpu(pHostCpu, pHostCpu->pvMemObj, pHostCpu->HCPhysMemObj);
     994        rc = g_HmR0.pfnDisableCpu(pHostCpu->pvMemObj, pHostCpu->HCPhysMemObj);
    995995        AssertRCReturn(rc, rc);
    996996
    … …  
    13231323    int              rc       = VINF_SUCCESS;
    13241324    RTCPUID const    idCpu    = RTMpCpuId();
    1325     PHMGLOBALCPUINFO pHostCpu = &g_HmR0.aCpuInfo[idCpu];
     1325    PHMPHYSCPU      pHostCpu = &g_HmR0.aCpuInfo[idCpu];
    13261326    AssertPtr(pHostCpu);
    13271327
    … …  
    13581358    /* Load the bare minimum state required for entering HM. */
    13591359    int rc = hmR0EnterCpu(pVCpu);
    1360     AssertRCReturn(rc, rc);
     1360    if (RT_SUCCESS(rc))
     1361    {
     1362        if (g_HmR0.hwvirt.u.vmx.fSupported)
     1363        {
     1364            Assert((pVCpu->hm.s.fCtxChanged & (HM_CHANGED_HOST_CONTEXT | HM_CHANGED_VMX_HOST_GUEST_SHARED_STATE))
     1365                                           == (HM_CHANGED_HOST_CONTEXT | HM_CHANGED_VMX_HOST_GUEST_SHARED_STATE));
     1366        }
     1367        else
     1368        {
     1369            Assert((pVCpu->hm.s.fCtxChanged & (HM_CHANGED_HOST_CONTEXT | HM_CHANGED_SVM_HOST_GUEST_SHARED_STATE))
     1370                                           == (HM_CHANGED_HOST_CONTEXT | HM_CHANGED_SVM_HOST_GUEST_SHARED_STATE));
     1371        }
    13611372
    13621373#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE
    1363     AssertReturn(!VMMR0ThreadCtxHookIsEnabled(pVCpu), VERR_HM_IPE_5);
    1364     bool fStartedSet = PGMR0DynMapStartOrMigrateAutoSet(pVCpu);
     1374        AssertReturn(!VMMR0ThreadCtxHookIsEnabled(pVCpu), VERR_HM_IPE_5);
     1375        bool const fStartedSet = PGMR0DynMapStartOrMigrateAutoSet(pVCpu);
    13651376#endif
    13661377
    1367     RTCPUID const    idCpu    = RTMpCpuId();
    1368     PHMGLOBALCPUINFO pHostCpu = &g_HmR0.aCpuInfo[idCpu];
    1369     Assert(pHostCpu);
    1370     if (g_HmR0.hwvirt.u.vmx.fSupported)
    1371     {
    1372         Assert((pVCpu->hm.s.fCtxChanged & (HM_CHANGED_HOST_CONTEXT | HM_CHANGED_VMX_HOST_GUEST_SHARED_STATE))
    1373                                        == (HM_CHANGED_HOST_CONTEXT | HM_CHANGED_VMX_HOST_GUEST_SHARED_STATE));
    1374     }
    1375     else
    1376     {
    1377         Assert((pVCpu->hm.s.fCtxChanged & (HM_CHANGED_HOST_CONTEXT | HM_CHANGED_SVM_HOST_GUEST_SHARED_STATE))
    1378                                        == (HM_CHANGED_HOST_CONTEXT | HM_CHANGED_SVM_HOST_GUEST_SHARED_STATE));
    1379     }
    1380 
    1381     rc = g_HmR0.pfnEnterSession(pVCpu, pHostCpu);
    1382     AssertMsgRCReturn(rc, ("rc=%Rrc pVCpu=%p HostCpuId=%u\n", rc, pVCpu, idCpu), rc);
    1383 
    1384     /* Exports the host-state as we may be resuming code after a longjmp and quite
    1385        possibly now be scheduled on a different CPU. */
    1386     rc = g_HmR0.pfnExportHostState(pVCpu);
    1387     AssertMsgRCReturn(rc, ("rc=%Rrc pVCpu=%p HostCpuId=%u\n", rc, pVCpu, idCpu), rc);
     1378        /* Keep track of the CPU owning the VMCS for debugging scheduling weirdness and ring-3 calls. */
     1379        rc = g_HmR0.pfnEnterSession(pVCpu);
     1380        AssertMsgRCReturnStmt(rc, ("rc=%Rrc pVCpu=%p\n", rc, pVCpu),  pVCpu->hm.s.idEnteredCpu = NIL_RTCPUID, rc);
     1381
     1382        /* Exports the host-state as we may be resuming code after a longjmp and quite
     1383           possibly now be scheduled on a different CPU. */
     1384        rc = g_HmR0.pfnExportHostState(pVCpu);
     1385        AssertMsgRCReturnStmt(rc, ("rc=%Rrc pVCpu=%p\n", rc, pVCpu),  pVCpu->hm.s.idEnteredCpu = NIL_RTCPUID, rc);
    13881386
    13891387#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE
    1390     if (fStartedSet)
    1391         PGMRZDynMapReleaseAutoSet(pVCpu);
     1388        if (fStartedSet)
     1389            PGMRZDynMapReleaseAutoSet(pVCpu);
    13921390#endif
    1393 
    1394     /* Keep track of the CPU owning the VMCS for debugging scheduling weirdness and ring-3 calls. */
    1395     if (RT_FAILURE(rc))
    1396         pVCpu->hm.s.idEnteredCpu = NIL_RTCPUID;
     1391    }
    13971392    return rc;
    13981393}
    … …  
    14131408    VMCPU_ASSERT_EMT_RETURN(pVCpu, VERR_HM_WRONG_CPU);
    14141409
    1415     RTCPUID const    idCpu    = RTMpCpuId();
    1416     PHMGLOBALCPUINFO pHostCpu = &g_HmR0.aCpuInfo[idCpu];
     1410    RTCPUID const idCpu    = RTMpCpuId();
     1411    PCHMPHYSCPU  pHostCpu = &g_HmR0.aCpuInfo[idCpu];
    14171412
    14181413    if (   !g_HmR0.fGlobalInit
    … …  
    14701465    if (!RTThreadPreemptIsEnabled(NIL_RTTHREAD))
    14711466    {
    1472         PHMGLOBALCPUINFO pHostCpu = &g_HmR0.aCpuInfo[RTMpCpuId()];
     1467        PCHMPHYSCPU pHostCpu = &g_HmR0.aCpuInfo[RTMpCpuId()];
    14731468        Assert(!VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL));
    14741469        Assert(pHostCpu->fConfigured);
    … …  
    16091604 * @returns The cpu structure pointer.
    16101605 */
    1611 VMMR0_INT_DECL(PHMGLOBALCPUINFO) hmR0GetCurrentCpu(void)
     1606VMMR0_INT_DECL(PHMPHYSCPU) hmR0GetCurrentCpu(void)
    16121607{
    16131608    Assert(!RTThreadPreemptIsEnabled(NIL_RTTHREAD));
    … …  
    16921687
    16931688    /* Ok, disable VT-x. */
    1694     PHMGLOBALCPUINFO pHostCpu = hmR0GetCurrentCpu();
     1689    PCHMPHYSCPU pHostCpu = hmR0GetCurrentCpu();
    16951690    AssertReturn(   pHostCpu
    16961691                 && pHostCpu->hMemObj != NIL_RTR0MEMOBJ
    … …  
    17001695
    17011696    *pfVTxDisabled = true;
    1702     return VMXR0DisableCpu(pHostCpu, pHostCpu->pvMemObj, pHostCpu->HCPhysMemObj);
     1697    return VMXR0DisableCpu(pHostCpu->pvMemObj, pHostCpu->HCPhysMemObj);
    17031698}
    17041699
    … …  
    17261721        Assert(g_HmR0.fGlobalInit);
    17271722
    1728         PHMGLOBALCPUINFO pHostCpu = hmR0GetCurrentCpu();
     1723        PHMPHYSCPU pHostCpu = hmR0GetCurrentCpu();
    17291724        AssertReturnVoid(   pHostCpu
    17301725                         && pHostCpu->hMemObj != NIL_RTR0MEMOBJ
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