Changeset 7657 in vbox

Timestamp:

Mar 31, 2008 1:26:24 PM (17 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

29167

Message:

Renamed 4M to BIG

Location:

trunk/src/VBox/VMM

Files:

• PGMGst.h (modified) (3 diffs)
• PGMMap.cpp (modified) (3 diffs)
• VMMAll/PGMAllBth.h (modified) (7 diffs)
• VMMAll/PGMAllGst.h (modified) (5 diffs)

trunk/src/VBox/VMM/PGMGst.h

@@ -30 +30 @@
 #undef GST_BIG_PAGE_OFFSET_MASK
 #undef GST_PDE_PG_MASK
-#undef GST_PDE4M_PG_MASK
+#undef GST_PDE_BIG_PG_MASK
 #undef GST_PD_SHIFT
 #undef GST_PD_MASK
@@ -49 +49 @@
 # define GST_BIG_PAGE_OFFSET_MASK   X86_PAGE_4M_OFFSET_MASK
 # define GST_PDE_PG_MASK            X86_PDE_PG_MASK
-# define GST_PDE4M_PG_MASK          X86_PDE4M_PG_MASK
+# define GST_PDE_BIG_PG_MASK        X86_PDE4M_PG_MASK
 # define GST_PD_SHIFT               X86_PD_SHIFT
 # define GST_PD_MASK                X86_PD_MASK
@@ -67 +67 @@
 # define GST_BIG_PAGE_OFFSET_MASK   X86_PAGE_2M_OFFSET_MASK
 # define GST_PDE_PG_MASK            X86_PDE_PAE_PG_MASK
-# define GST_PDE4M_PG_MASK          X86_PDE4M_PAE_PG_MASK
+# define GST_PDE_BIG_PG_MASK        X86_PDE2M_PAE_PG_MASK
 # define GST_PD_SHIFT               X86_PD_PAE_SHIFT
 # define GST_PD_MASK                X86_PD_PAE_MASK

trunk/src/VBox/VMM/PGMMap.cpp

@@ -465 +465 @@
  *
  * @remark  This API shall not be used to anything but mapping the switcher code.
- */
+z */
 PGMR3DECL(int) PGMR3MapIntermediate(PVM pVM, RTUINTPTR Addr, RTHCPHYS HCPhys, unsigned cbPages)
 {
@@ -734 +734 @@
         return;
 
+    Assert(PGMGetGuestMode(pVM) <= PGMMODE_32_BIT);
+
     /*
      * Init the page tables and insert them into the page directories.
@@ -954 +956 @@
     if (pVM->pgm.s.fMappingsFixed)
         return false;
+
+    Assert(PGMGetGuestMode(pVM) <= PGMMODE_32_BIT);
 
     /*

trunk/src/VBox/VMM/VMMAll/PGMAllBth.h

@@ -242 +242 @@
         if (    PdeSrc.b.u1Size
             &&  (cr4 & X86_CR4_PSE))
-            GCPhys = (PdeSrc.u & GST_PDE4M_PG_MASK)
+            GCPhys = (PdeSrc.u & GST_PDE_BIG_PG_MASK)
                     | ((RTGCPHYS)pvFault & (GST_BIG_PAGE_OFFSET_MASK ^ PAGE_OFFSET_MASK));
         else
@@ -908 +908 @@
             /* Before freeing the page, check if anything really changed. */
             PPGMPOOLPAGE    pShwPage = pgmPoolGetPageByHCPhys(pVM, PdeDst.u & SHW_PDE_PG_MASK);
-            RTGCPHYS        GCPhys   = PdeSrc.u & GST_PDE4M_PG_MASK;
+            RTGCPHYS        GCPhys   = PdeSrc.u & GST_PDE_BIG_PG_MASK;
 #  if PGM_SHW_TYPE != PGM_TYPE_32BIT
             GCPhys |= GCPtrPage & (1 << X86_PD_PAE_SHIFT);
@@ -1273 +1273 @@
     else
     {
-        GCPhys = PdeSrc.u & GST_PDE4M_PG_MASK;
+        GCPhys = PdeSrc.u & GST_PDE_BIG_PG_MASK;
 # if PGM_SHW_TYPE != PGM_TYPE_32BIT
         GCPhys |= GCPtrPage & X86_PAGE_2M_SIZE;
@@ -1388 +1388 @@
                  */
                 /* Calculate the GC physical address of this 4KB shadow page. */
-                RTGCPHYS GCPhys = (PdeSrc.u & GST_PDE4M_PG_MASK) | ((RTGCUINTPTR)GCPtrPage & GST_BIG_PAGE_OFFSET_MASK);
+                RTGCPHYS GCPhys = (PdeSrc.u & GST_PDE_BIG_PG_MASK) | ((RTGCUINTPTR)GCPtrPage & GST_BIG_PAGE_OFFSET_MASK);
                 /* Find ram range. */
                 PPGMPAGE pPage;
@@ -1908 +1908 @@
         else
         {
-            GCPhys = PdeSrc.u & GST_PDE4M_PG_MASK;
+            GCPhys = PdeSrc.u & GST_PDE_BIG_PG_MASK;
 # if PGM_SHW_TYPE == PGM_TYPE_PAE && PGM_GST_TYPE == PGM_TYPE_32BIT
             GCPhys |= GCPtrPage & RT_BIT(X86_PAGE_2M_SHIFT);
@@ -2666 +2666 @@
                     else
                     {
-                        GCPhys = PdeSrc.u & GST_PDE4M_PG_MASK;
+                        GCPhys = PdeSrc.u & GST_PDE_BIG_PG_MASK;
 #  if PGM_SHW_TYPE == PGM_TYPE_PAE && PGM_GST_TYPE == PGM_TYPE_32BIT
                         GCPhys |= i * X86_PAGE_2M_SIZE;
@@ -2996 +2996 @@
                     continue;
                 }
-                GCPhysGst = PdeSrc.u & GST_PDE4M_PG_MASK;
+                GCPhysGst = PdeSrc.u & GST_PDE_BIG_PG_MASK;
 # if PGM_SHW_TYPE == PGM_TYPE_PAE && PGM_GST_TYPE == PGM_TYPE_32BIT
                 GCPhysGst |= GCPtr & RT_BIT(X86_PAGE_2M_SHIFT);

trunk/src/VBox/VMM/VMMAll/PGMAllGst.h

@@ -31 +31 @@
 #undef GST_BIG_PAGE_OFFSET_MASK
 #undef GST_PDE_PG_MASK
-#undef GST_PDE4M_PG_MASK
+#undef GST_PDE_BIG_PG_MASK
 #undef GST_PD_SHIFT
 #undef GST_PD_MASK
@@ -52 +52 @@
 # define GST_BIG_PAGE_OFFSET_MASK   X86_PAGE_4M_OFFSET_MASK
 # define GST_PDE_PG_MASK            X86_PDE_PG_MASK
-# define GST_PDE4M_PG_MASK          X86_PDE4M_PG_MASK
+# define GST_PDE_BIG_PG_MASK        X86_PDE4M_PG_MASK
 # define GST_PD_SHIFT               X86_PD_SHIFT
 # define GST_PD_MASK                X86_PD_MASK
@@ -72 +72 @@
 # define GST_BIG_PAGE_OFFSET_MASK   X86_PAGE_2M_OFFSET_MASK
 # define GST_PDE_PG_MASK            X86_PDE_PAE_PG_MASK
-# define GST_PDE4M_PG_MASK          X86_PDE2M_PAE_PG_MASK
+# define GST_PDE_BIG_PG_MASK        X86_PDE2M_PAE_PG_MASK
 # define GST_PD_SHIFT               X86_PD_PAE_SHIFT
 # define GST_PD_MASK                X86_PD_PAE_MASK
@@ -203 +203 @@
                      | ((Pde.u & X86_PDE4M_PAT) >> X86_PDE4M_PAT_SHIFT);
         if (pGCPhys)
-            *pGCPhys = (Pde.u & GST_PDE4M_PG_MASK) | (GCPtr & (~GST_PDE4M_PG_MASK ^ ~GST_PTE_PG_MASK)); /** @todo pse36 */
+            *pGCPhys = (Pde.u & GST_PDE_BIG_PG_MASK) | (GCPtr & (~GST_PDE_BIG_PG_MASK ^ ~GST_PTE_PG_MASK)); /** @todo pse36 */
     }
     return VINF_SUCCESS;
@@ -289 +289 @@
              * 4MB Page table
              */
-            Pde.u = (Pde.u & (fMask | ((fMask & X86_PTE_PAT) << X86_PDE4M_PAT_SHIFT) | GST_PDE4M_PG_MASK | X86_PDE4M_PS)) /** @todo pse36 */
+            Pde.u = (Pde.u & (fMask | ((fMask & X86_PTE_PAT) << X86_PDE4M_PAT_SHIFT) | GST_PDE_BIG_PG_MASK | X86_PDE4M_PS)) /** @todo pse36 */
                   | (fFlags & ~GST_PTE_PG_MASK)
                   | ((fFlags & X86_PTE_PAT) << X86_PDE4M_PAT_SHIFT);