Changeset 7677 in vbox

Timestamp:

Apr 1, 2008 12:20:28 PM (17 years ago)

Author:

vboxsync

Message:

Cleanup

Location:

trunk

Files:

• include/VBox/x86.h (modified) (2 diffs)
• src/VBox/VMM/PGM.cpp (modified) (1 diff)
• src/VBox/VMM/PGMGst.h (modified) (3 diffs)
• src/VBox/VMM/VMMAll/PGMAllBth.h (modified) (9 diffs)
• src/VBox/VMM/VMMAll/PGMAllGst.h (modified) (2 diffs)
• src/VBox/VMM/VMMAll/PGMAllPool.cpp (modified) (1 diff)
• src/VBox/VMM/VMMAll/PGMAllShw.h (modified) (1 diff)

trunk/include/VBox/x86.h

@@ -837 +837 @@
 #define X86_PG_PAE_ENTRIES                  512
 /** Number of entries in a PAE PDPTE. */
-#define X86_PG_PAE_PDPTE_ENTRIES            4
+#define X86_PG_PAE_PDPE_ENTRIES             4
 
 /** Number of entries in an AMD64 PT/PD/PDPTR/L4/L5. */
 #define X86_PG_AMD64_ENTRIES                X86_PG_PAE_ENTRIES
 /** Number of entries in an AMD64 PDPTE. */
-#define X86_PG_AMD64_PDPTE_ENTRIES          512
+#define X86_PG_AMD64_PDPE_ENTRIES           512
 
 /** The size of a 4KB page. */
@@ -1485 +1485 @@
 {
     /** PDE Array. */
-    X86PDPE         a[X86_PG_AMD64_PDPTE_ENTRIES];
+    X86PDPE         a[X86_PG_AMD64_PDPE_ENTRIES];
 } X86PDPTR;
 /** Pointer to a page directory pointer table. */

trunk/src/VBox/VMM/PGM.cpp

@@ -3165 +3165 @@
 
     int rc = VINF_SUCCESS;
-    const unsigned c = fLongMode ? ELEMENTS(pPDPTR->a) : X86_PG_PAE_PDPTE_ENTRIES;
+    const unsigned c = fLongMode ? ELEMENTS(pPDPTR->a) : X86_PG_PAE_PDPE_ENTRIES;
     for (unsigned i = 0; i < c; i++)
     {

trunk/src/VBox/VMM/PGMGst.h

@@ -36 +36 @@
 #undef GST_PT_SHIFT
 #undef GST_PT_MASK
-
-#if PGM_GST_TYPE == PGM_TYPE_32BIT
+#undef GST_TOTAL_PD_ENTRIES
+#undef GST_CR3_PAGE_MASK
+#undef GST_PDPE_ENTRIES
+
+#if PGM_GST_TYPE == PGM_TYPE_32BIT \
+ || PGM_GST_TYPE == PGM_TYPE_REAL \
+ || PGM_GST_TYPE == PGM_TYPE_PROT
 # define GSTPT                      X86PT
 # define PGSTPT                     PX86PT
@@ -52 +57 @@
 # define GST_PD_SHIFT               X86_PD_SHIFT
 # define GST_PD_MASK                X86_PD_MASK
+# define GST_TOTAL_PD_ENTRIES       X86_PG_ENTRIES
 # define GST_PTE_PG_MASK            X86_PTE_PG_MASK
 # define GST_PT_SHIFT               X86_PT_SHIFT
 # define GST_PT_MASK                X86_PT_MASK
-#else
+# define GST_CR3_PAGE_MASK          X86_CR3_PAGE_MASK
+#elif   PGM_GST_TYPE == PGM_TYPE_PAE \
+     || PGM_GST_TYPE == PGM_TYPE_AMD64
 # define GSTPT                      X86PTPAE
 # define PGSTPT                     PX86PTPAE
@@ -70 +78 @@
 # define GST_PD_SHIFT               X86_PD_PAE_SHIFT
 # define GST_PD_MASK                X86_PD_PAE_MASK
+# if PGM_GST_TYPE == PGM_TYPE_PAE
+#  define GST_TOTAL_PD_ENTRIES      (X86_PG_PAE_ENTRIES * X86_PG_PAE_PDPE_ENTRIES)
+#  define GST_PDPE_ENTRIES          X86_PG_PAE_PDPE_ENTRIES
+# else
+#  define GST_TOTAL_PD_ENTRIES      (X86_PG_AMD64_ENTRIES * X86_PG_AMD64_PDPE_ENTRIES)
+#  define GST_PDPE_ENTRIES          X86_PG_AMD64_PDPE_ENTRIES
+# endif
 # define GST_PTE_PG_MASK            X86_PTE_PAE_PG_MASK
 # define GST_PT_SHIFT               X86_PT_PAE_SHIFT
 # define GST_PT_MASK                X86_PT_PAE_MASK
+# define GST_CR3_PAGE_MASK          X86_CR3_PAE_PAGE_MASK
 #endif
 

trunk/src/VBox/VMM/VMMAll/PGMAllBth.h

@@ -1928 +1928 @@
             if (fPageTable)
                 PdeDst.u = pShwPage->Core.Key
-                         | (PdeSrc.u & ~(X86_PDE_PAE_PG_MASK | X86_PDE_AVL_MASK | X86_PDE_PCD | X86_PDE_PWT | X86_PDE_PS | X86_PDE4M_G | X86_PDE4M_D));
+                         | (PdeSrc.u & ~(GST_PDE_PG_MASK | X86_PDE_AVL_MASK | X86_PDE_PCD | X86_PDE_PWT | X86_PDE_PS | X86_PDE4M_G | X86_PDE4M_D));
             else
             {
                 PdeDst.u = pShwPage->Core.Key
-                         | (PdeSrc.u & ~(X86_PDE_PAE_PG_MASK | X86_PDE_AVL_MASK | X86_PDE_PCD | X86_PDE_PWT | X86_PDE_PS | X86_PDE4M_G | X86_PDE4M_D));
+                         | (PdeSrc.u & ~(GST_PDE_PG_MASK | X86_PDE_AVL_MASK | X86_PDE_PCD | X86_PDE_PWT | X86_PDE_PS | X86_PDE4M_G | X86_PDE4M_D));
 # ifdef PGM_SYNC_DIRTY_BIT /* (see explanation and assumptions further down.) */
                 if (!PdeSrc.b.u1Dirty && PdeSrc.b.u1Write)
@@ -1974 +1974 @@
                  * Start by syncing the page directory entry so CSAM's TLB trick works.
                  */
-                PdeDst.u = (PdeDst.u & (X86_PDE_PAE_PG_MASK | X86_PDE_AVL_MASK))
-                         | (PdeSrc.u & ~(X86_PDE_PAE_PG_MASK | X86_PDE_AVL_MASK | X86_PDE_PCD | X86_PDE_PWT | X86_PDE_PS | X86_PDE4M_G | X86_PDE4M_D));
+                PdeDst.u = (PdeDst.u & (SHW_PDE_PG_MASK | X86_PDE_AVL_MASK))
+                         | (PdeSrc.u & ~(GST_PDE_PG_MASK | X86_PDE_AVL_MASK | X86_PDE_PCD | X86_PDE_PWT | X86_PDE_PS | X86_PDE4M_G | X86_PDE4M_D));
                 *pPdeDst = PdeDst;
 
@@ -2060 +2060 @@
              * Start by syncing the page directory entry.
              */
-            PdeDst.u = (PdeDst.u & (X86_PDE_PAE_PG_MASK | (X86_PDE_AVL_MASK & ~PGM_PDFLAGS_TRACK_DIRTY)))
-                     | (PdeSrc.u & ~(X86_PDE_PAE_PG_MASK | X86_PDE_AVL_MASK | X86_PDE_PCD | X86_PDE_PWT | X86_PDE_PS | X86_PDE4M_G | X86_PDE4M_D));
+            PdeDst.u = (PdeDst.u & (SHW_PDE_PG_MASK | (X86_PDE_AVL_MASK & ~PGM_PDFLAGS_TRACK_DIRTY)))
+                     | (PdeSrc.u & ~(GST_PDE_PG_MASK | X86_PDE_AVL_MASK | X86_PDE_PCD | X86_PDE_PWT | X86_PDE_PS | X86_PDE4M_G | X86_PDE4M_D));
 
 # ifdef PGM_SYNC_DIRTY_BIT
@@ -2088 +2088 @@
             /* Get address and flags from the source PDE. */
             SHWPTE PteDstBase;
-            PteDstBase.u = PdeSrc.u & ~(X86_PTE_PAE_PG_MASK | X86_PTE_AVL_MASK | X86_PTE_PAT | X86_PTE_PCD | X86_PTE_PWT);
+            PteDstBase.u = PdeSrc.u & ~(GST_PDE_PG_MASK | X86_PTE_AVL_MASK | X86_PTE_PAT | X86_PTE_PCD | X86_PTE_PWT);
 
             /* Loop thru the entries in the shadow PT. */
@@ -2349 +2349 @@
 #if (PGM_GST_TYPE == PGM_TYPE_32BIT ||  PGM_GST_TYPE == PGM_TYPE_REAL ||  PGM_GST_TYPE == PGM_TYPE_PROT || PGM_GST_TYPE == PGM_TYPE_PAE) && PGM_SHW_TYPE != PGM_TYPE_AMD64
 
-#  ifndef IN_RING0
+# ifndef IN_RING0
     if (!(fPage & X86_PTE_US))
     {
@@ -2359 +2359 @@
         CSAMMarkPage(pVM, (RTGCPTR)GCPtrPage, true);
     }
-#  endif
+# endif
     /*
      * Get guest PD and index.
@@ -2573 +2573 @@
         iPdNoMapping  = ~0U;
     }
-#  if PGM_GST_TYPE == PGM_TYPE_PAE
-    for (unsigned iPDPTRE = 0; iPDPTRE < X86_PG_PAE_PDPTE_ENTRIES; iPDPTRE++)
-#  elif PGM_GST_TYPE == PGM_TYPE_AMD64
-    for (unsigned iPDPTRE = 0; iPDPTRE < X86_PG_AMD64_PDPTE_ENTRIES; iPDPTRE++)
-#  endif
+#  if PGM_GST_TYPE == PGM_TYPE_PAE || PGM_GST_TYPE == PGM_TYPE_AMD64
+    for (unsigned iPDPTRE = 0; iPDPTRE < GST_PDPE_ENTRIES; iPDPTRE++)
     {
-#  if PGM_GST_TYPE == PGM_TYPE_PAE || PGM_GST_TYPE == PGM_TYPE_AMD64
         unsigned        iPDSrc;
 #   if PGM_SHW_TYPE == PGM_TYPE_PAE 
@@ -2596 +2592 @@
             continue;
         }
+#  else
+   {
 #  endif /* if PGM_GST_TYPE == PGM_TYPE_PAE || PGM_GST_TYPE == PGM_TYPE_AMD64 */
         for (unsigned iPD = 0; iPD < ELEMENTS(pPDSrc->a); iPD++)
@@ -3244 +3242 @@
                  * Big Page.
                  */
-                uint64_t fIgnoreFlags = X86_PDE_AVL_MASK | X86_PDE_PAE_PG_MASK | X86_PDE4M_G | X86_PDE4M_D | X86_PDE4M_PS | X86_PDE4M_PWT | X86_PDE4M_PCD;
+                uint64_t fIgnoreFlags = X86_PDE_AVL_MASK | GST_PDE_PG_MASK | X86_PDE4M_G | X86_PDE4M_D | X86_PDE4M_PS | X86_PDE4M_PWT | X86_PDE4M_PCD;
                 if (!PdeSrc.b.u1Dirty && PdeSrc.b.u1Write)
                 {

trunk/src/VBox/VMM/VMMAll/PGMAllGst.h

@@ -39 +39 @@
 #undef GST_TOTAL_PD_ENTRIES
 #undef GST_CR3_PAGE_MASK
+#undef GST_PDPE_ENTRIES
 
 #if PGM_GST_TYPE == PGM_TYPE_32BIT \
@@ -79 +80 @@
 # define GST_PD_MASK                X86_PD_PAE_MASK
 # if PGM_GST_TYPE == PGM_TYPE_PAE
-#  define GST_TOTAL_PD_ENTRIES       (X86_PG_PAE_ENTRIES * X86_PG_PAE_PDPTE_ENTRIES)
+#  define GST_TOTAL_PD_ENTRIES      (X86_PG_PAE_ENTRIES * X86_PG_PAE_PDPE_ENTRIES)
+#  define GST_PDPE_ENTRIES          X86_PG_PAE_PDPE_ENTRIES
 # else
-#  define GST_TOTAL_PD_ENTRIES       (X86_PG_AMD64_ENTRIES * X86_PG_AMD64_PDPTE_ENTRIES)
+#  define GST_TOTAL_PD_ENTRIES      (X86_PG_AMD64_ENTRIES * X86_PG_AMD64_PDPE_ENTRIES)
+#  define GST_PDPE_ENTRIES          X86_PG_AMD64_PDPE_ENTRIES
 # endif
 # define GST_PTE_PG_MASK            X86_PTE_PAE_PG_MASK

trunk/src/VBox/VMM/VMMAll/PGMAllPool.cpp

@@ -2989 +2989 @@
 
             case PGMPOOLKIND_ROOT_PAE_PD:
-                for (unsigned iPage = 0; iPage < X86_PG_PAE_ENTRIES * X86_PG_PAE_PDPTE_ENTRIES; iPage++)
+                for (unsigned iPage = 0; iPage < X86_PG_PAE_ENTRIES * X86_PG_PAE_PDPE_ENTRIES; iPage++)
                     if ((u.pau64[iPage] & (PGM_PDFLAGS_MAPPING | X86_PDE_P)) == X86_PDE_P)
                         u.pau64[iPage] = 0;

trunk/src/VBox/VMM/VMMAll/PGMAllShw.h

@@ -73 +73 @@
 # define SHW_PDPTR_SHIFT        X86_PDPTR_SHIFT
 # define SHW_PDPTR_MASK         X86_PDPTR_MASK
+# define SHW_TOTAL_PD_ENTRIES   (X86_PG_AMD64_ENTRIES*X86_PG_AMD64_PDPE_ENTRIES)
 # define SHW_POOL_ROOT_IDX      PGMPOOL_IDX_PML4
 #else /* 32 bits PAE mode */
 # define SHW_PDPTR_SHIFT        X86_PDPTR_SHIFT
 # define SHW_PDPTR_MASK         X86_PDPTR_MASK_32
-# define SHW_TOTAL_PD_ENTRIES   (X86_PG_PAE_ENTRIES*X86_PG_PAE_PDPTE_ENTRIES)
+# define SHW_TOTAL_PD_ENTRIES   (X86_PG_PAE_ENTRIES*X86_PG_PAE_PDPE_ENTRIES)
 # define SHW_POOL_ROOT_IDX      PGMPOOL_IDX_PAE_PD
 #endif