Changeset 7677 in vbox for trunk/src/VBox/VMM/VMMAll/PGMAllBth.h
- Timestamp:
- Apr 1, 2008 12:20:28 PM (17 years ago)
- File:
-
- 1 edited
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trunk/src/VBox/VMM/VMMAll/PGMAllBth.h
r7676 r7677 1928 1928 if (fPageTable) 1929 1929 PdeDst.u = pShwPage->Core.Key 1930 | (PdeSrc.u & ~( X86_PDE_PAE_PG_MASK | X86_PDE_AVL_MASK | X86_PDE_PCD | X86_PDE_PWT | X86_PDE_PS | X86_PDE4M_G | X86_PDE4M_D));1930 | (PdeSrc.u & ~(GST_PDE_PG_MASK | X86_PDE_AVL_MASK | X86_PDE_PCD | X86_PDE_PWT | X86_PDE_PS | X86_PDE4M_G | X86_PDE4M_D)); 1931 1931 else 1932 1932 { 1933 1933 PdeDst.u = pShwPage->Core.Key 1934 | (PdeSrc.u & ~( X86_PDE_PAE_PG_MASK | X86_PDE_AVL_MASK | X86_PDE_PCD | X86_PDE_PWT | X86_PDE_PS | X86_PDE4M_G | X86_PDE4M_D));1934 | (PdeSrc.u & ~(GST_PDE_PG_MASK | X86_PDE_AVL_MASK | X86_PDE_PCD | X86_PDE_PWT | X86_PDE_PS | X86_PDE4M_G | X86_PDE4M_D)); 1935 1935 # ifdef PGM_SYNC_DIRTY_BIT /* (see explanation and assumptions further down.) */ 1936 1936 if (!PdeSrc.b.u1Dirty && PdeSrc.b.u1Write) … … 1974 1974 * Start by syncing the page directory entry so CSAM's TLB trick works. 1975 1975 */ 1976 PdeDst.u = (PdeDst.u & ( X86_PDE_PAE_PG_MASK | X86_PDE_AVL_MASK))1977 | (PdeSrc.u & ~( X86_PDE_PAE_PG_MASK | X86_PDE_AVL_MASK | X86_PDE_PCD | X86_PDE_PWT | X86_PDE_PS | X86_PDE4M_G | X86_PDE4M_D));1976 PdeDst.u = (PdeDst.u & (SHW_PDE_PG_MASK | X86_PDE_AVL_MASK)) 1977 | (PdeSrc.u & ~(GST_PDE_PG_MASK | X86_PDE_AVL_MASK | X86_PDE_PCD | X86_PDE_PWT | X86_PDE_PS | X86_PDE4M_G | X86_PDE4M_D)); 1978 1978 *pPdeDst = PdeDst; 1979 1979 … … 2060 2060 * Start by syncing the page directory entry. 2061 2061 */ 2062 PdeDst.u = (PdeDst.u & ( X86_PDE_PAE_PG_MASK | (X86_PDE_AVL_MASK & ~PGM_PDFLAGS_TRACK_DIRTY)))2063 | (PdeSrc.u & ~( X86_PDE_PAE_PG_MASK | X86_PDE_AVL_MASK | X86_PDE_PCD | X86_PDE_PWT | X86_PDE_PS | X86_PDE4M_G | X86_PDE4M_D));2062 PdeDst.u = (PdeDst.u & (SHW_PDE_PG_MASK | (X86_PDE_AVL_MASK & ~PGM_PDFLAGS_TRACK_DIRTY))) 2063 | (PdeSrc.u & ~(GST_PDE_PG_MASK | X86_PDE_AVL_MASK | X86_PDE_PCD | X86_PDE_PWT | X86_PDE_PS | X86_PDE4M_G | X86_PDE4M_D)); 2064 2064 2065 2065 # ifdef PGM_SYNC_DIRTY_BIT … … 2088 2088 /* Get address and flags from the source PDE. */ 2089 2089 SHWPTE PteDstBase; 2090 PteDstBase.u = PdeSrc.u & ~( X86_PTE_PAE_PG_MASK | X86_PTE_AVL_MASK | X86_PTE_PAT | X86_PTE_PCD | X86_PTE_PWT);2090 PteDstBase.u = PdeSrc.u & ~(GST_PDE_PG_MASK | X86_PTE_AVL_MASK | X86_PTE_PAT | X86_PTE_PCD | X86_PTE_PWT); 2091 2091 2092 2092 /* Loop thru the entries in the shadow PT. */ … … 2349 2349 #if (PGM_GST_TYPE == PGM_TYPE_32BIT || PGM_GST_TYPE == PGM_TYPE_REAL || PGM_GST_TYPE == PGM_TYPE_PROT || PGM_GST_TYPE == PGM_TYPE_PAE) && PGM_SHW_TYPE != PGM_TYPE_AMD64 2350 2350 2351 # 2351 # ifndef IN_RING0 2352 2352 if (!(fPage & X86_PTE_US)) 2353 2353 { … … 2359 2359 CSAMMarkPage(pVM, (RTGCPTR)GCPtrPage, true); 2360 2360 } 2361 # 2361 # endif 2362 2362 /* 2363 2363 * Get guest PD and index. … … 2573 2573 iPdNoMapping = ~0U; 2574 2574 } 2575 # if PGM_GST_TYPE == PGM_TYPE_PAE 2576 for (unsigned iPDPTRE = 0; iPDPTRE < X86_PG_PAE_PDPTE_ENTRIES; iPDPTRE++) 2577 # elif PGM_GST_TYPE == PGM_TYPE_AMD64 2578 for (unsigned iPDPTRE = 0; iPDPTRE < X86_PG_AMD64_PDPTE_ENTRIES; iPDPTRE++) 2579 # endif 2575 # if PGM_GST_TYPE == PGM_TYPE_PAE || PGM_GST_TYPE == PGM_TYPE_AMD64 2576 for (unsigned iPDPTRE = 0; iPDPTRE < GST_PDPE_ENTRIES; iPDPTRE++) 2580 2577 { 2581 # if PGM_GST_TYPE == PGM_TYPE_PAE || PGM_GST_TYPE == PGM_TYPE_AMD642582 2578 unsigned iPDSrc; 2583 2579 # if PGM_SHW_TYPE == PGM_TYPE_PAE … … 2596 2592 continue; 2597 2593 } 2594 # else 2595 { 2598 2596 # endif /* if PGM_GST_TYPE == PGM_TYPE_PAE || PGM_GST_TYPE == PGM_TYPE_AMD64 */ 2599 2597 for (unsigned iPD = 0; iPD < ELEMENTS(pPDSrc->a); iPD++) … … 3244 3242 * Big Page. 3245 3243 */ 3246 uint64_t fIgnoreFlags = X86_PDE_AVL_MASK | X86_PDE_PAE_PG_MASK | X86_PDE4M_G | X86_PDE4M_D | X86_PDE4M_PS | X86_PDE4M_PWT | X86_PDE4M_PCD;3244 uint64_t fIgnoreFlags = X86_PDE_AVL_MASK | GST_PDE_PG_MASK | X86_PDE4M_G | X86_PDE4M_D | X86_PDE4M_PS | X86_PDE4M_PWT | X86_PDE4M_PCD; 3247 3245 if (!PdeSrc.b.u1Dirty && PdeSrc.b.u1Write) 3248 3246 {
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