Changeset 80003 in vbox for trunk/src/VBox/VMM/VMMR3
- Timestamp:
- Jul 26, 2019 1:37:47 PM (6 years ago)
- svn:sync-xref-src-repo-rev:
- 132438
- Location:
- trunk/src/VBox/VMM/VMMR3
- Files:
-
- 1 deleted
- 4 edited
-
SELM.cpp (modified) (2 diffs)
-
VMM.cpp (modified) (13 diffs)
-
VMMGuruMeditation.cpp (modified) (3 diffs)
-
VMMSwitcher.cpp (deleted)
-
VMMTests.cpp (modified) (3 diffs)
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMR3/SELM.cpp
r76553 r80003 515 515 pVM->selm.s.Tss.cr3 = PGMGetHyperCR3(pVCpu); 516 516 pVM->selm.s.Tss.ss0 = pVM->selm.s.aHyperSel[SELM_HYPER_SEL_DS]; 517 pVM->selm.s.Tss.esp0 = VMMGetStackRC(pVCpu);517 pVM->selm.s.Tss.esp0 = 0;//VMMGetStackRC(pVCpu); 518 518 pVM->selm.s.Tss.cs = pVM->selm.s.aHyperSel[SELM_HYPER_SEL_CS]; 519 519 pVM->selm.s.Tss.ds = pVM->selm.s.aHyperSel[SELM_HYPER_SEL_DS]; … … 525 525 pVM->selm.s.TssTrap08.ss0 = pVM->selm.s.aHyperSel[SELM_HYPER_SEL_DS]; 526 526 pVM->selm.s.TssTrap08.ss = pVM->selm.s.aHyperSel[SELM_HYPER_SEL_DS]; 527 pVM->selm.s.TssTrap08.esp0 = VMMGetStackRC(pVCpu) - PAGE_SIZE / 2; /* upper half can be analysed this way. */527 pVM->selm.s.TssTrap08.esp0 = 0;//VMMGetStackRC(pVCpu) - PAGE_SIZE / 2; /* upper half can be analysed this way. */ 528 528 pVM->selm.s.TssTrap08.esp = pVM->selm.s.TssTrap08.esp0; 529 529 pVM->selm.s.TssTrap08.ebp = pVM->selm.s.TssTrap08.esp0; -
trunk/src/VBox/VMM/VMMR3/VMM.cpp
r78877 r80003 132 132 #include <VBox/vmm/tm.h> 133 133 #include "VMMInternal.h" 134 #include "VMMSwitcher.h"135 134 #include <VBox/vmm/vm.h> 136 135 #include <VBox/vmm/uvm.h> … … 199 198 * Assert alignment, sizes and order. 200 199 */ 201 AssertMsg(pVM->vmm.s.offVM == 0, ("Already initialized!\n"));202 200 AssertCompile(sizeof(pVM->vmm.s) <= sizeof(pVM->vmm.padding)); 203 AssertCompile( sizeof(pVM->aCpus[0].vmm.s) <= sizeof(pVM->aCpus[0].vmm.padding));201 AssertCompile(RT_SIZEOFMEMB(VMCPU, vmm.s) <= RT_SIZEOFMEMB(VMCPU, vmm.padding)); 204 202 205 203 /* 206 204 * Init basic VM VMM members. 207 205 */ 208 pVM->vmm.s.offVM = RT_UOFFSETOF(VM, vmm);209 206 pVM->vmm.s.pahEvtRendezvousEnterOrdered = NULL; 210 207 pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT; … … 287 284 * Init various sub-components. 288 285 */ 289 rc = vmmR3 SwitcherInit(pVM);286 rc = vmmR3InitStacks(pVM); 290 287 if (RT_SUCCESS(rc)) 291 288 { 292 rc = vmmR3InitStacks(pVM); 289 rc = vmmR3InitLoggers(pVM); 290 291 #ifdef VBOX_WITH_NMI 292 /* 293 * Allocate mapping for the host APIC. 294 */ 293 295 if (RT_SUCCESS(rc)) 294 296 { 295 rc = vmmR3InitLoggers(pVM); 296 297 #ifdef VBOX_WITH_NMI 297 rc = MMR3HyperReserve(pVM, PAGE_SIZE, "Host APIC", &pVM->vmm.s.GCPtrApicBase); 298 AssertRC(rc); 299 } 300 #endif 301 if (RT_SUCCESS(rc)) 302 { 298 303 /* 299 * Allocate mapping for the host APIC.304 * Debug info and statistics. 300 305 */ 301 if (RT_SUCCESS(rc)) 302 { 303 rc = MMR3HyperReserve(pVM, PAGE_SIZE, "Host APIC", &pVM->vmm.s.GCPtrApicBase); 304 AssertRC(rc); 305 } 306 #endif 307 if (RT_SUCCESS(rc)) 308 { 309 /* 310 * Debug info and statistics. 311 */ 312 DBGFR3InfoRegisterInternal(pVM, "fflags", "Displays the current Forced actions Flags.", vmmR3InfoFF); 313 vmmR3InitRegisterStats(pVM); 314 vmmInitFormatTypes(); 315 316 return VINF_SUCCESS; 317 } 318 } 319 /** @todo Need failure cleanup. */ 320 321 //more todo in here? 322 //if (RT_SUCCESS(rc)) 323 //{ 324 //} 325 //int rc2 = vmmR3TermCoreCode(pVM); 326 //AssertRC(rc2)); 327 } 306 DBGFR3InfoRegisterInternal(pVM, "fflags", "Displays the current Forced actions Flags.", vmmR3InfoFF); 307 vmmR3InitRegisterStats(pVM); 308 vmmInitFormatTypes(); 309 310 return VINF_SUCCESS; 311 } 312 } 313 /** @todo Need failure cleanup? */ 328 314 329 315 return rc; … … 373 359 #endif 374 360 pVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pbEMTStackR3); 375 pVCpu->vmm.s.pbEMTStackRC = MMHyperR3ToRC(pVM, pVCpu->vmm.s.pbEMTStackR3); 376 pVCpu->vmm.s.pbEMTStackBottomRC = pVCpu->vmm.s.pbEMTStackRC + VMM_STACK_SIZE; 377 AssertRelease(pVCpu->vmm.s.pbEMTStackRC); 378 379 CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC); 361 380 362 } 381 363 } … … 397 379 398 380 /* 399 * Allocate R C & R0 Logger instances (they arefinalized in the relocator).400 */ 401 #if def LOG_ENABLED381 * Allocate R0 Logger instance (finalized in the relocator). 382 */ 383 #if defined(LOG_ENABLED) && defined(VBOX_WITH_R0_LOGGING) 402 384 PRTLOGGER pLogger = RTLogDefaultInstance(); 403 385 if (pLogger) 404 386 { 405 if (VM_IS_RAW_MODE_ENABLED(pVM))406 {407 pVM->vmm.s.cbRCLogger = RT_UOFFSETOF_DYN(RTLOGGERRC, afGroups[pLogger->cGroups]);408 rc = MMR3HyperAllocOnceNoRel(pVM, pVM->vmm.s.cbRCLogger, 0, MM_TAG_VMM, (void **)&pVM->vmm.s.pRCLoggerR3);409 if (RT_FAILURE(rc))410 return rc;411 pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);412 }413 414 # ifdef VBOX_WITH_R0_LOGGING415 387 size_t const cbLogger = RTLogCalcSizeForR0(pLogger->cGroups, 0); 416 388 for (VMCPUID i = 0; i < pVM->cCpus; i++) … … 426 398 pVCpu->vmm.s.pR0LoggerR0 = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pR0LoggerR3); 427 399 } 428 # endif 429 } 430 #endif /* LOG_ENABLED */ 400 } 401 #endif /* LOG_ENABLED && VBOX_WITH_R0_LOGGING */ 431 402 432 403 /* … … 436 407 if (pRelLogger) 437 408 { 438 #ifdef VBOX_WITH_RC_RELEASE_LOGGING439 /*440 * Allocate RC release logger instances (finalized in the relocator).441 */442 if (VM_IS_RAW_MODE_ENABLED(pVM))443 {444 pVM->vmm.s.cbRCRelLogger = RT_UOFFSETOF_DYN(RTLOGGERRC, afGroups[pRelLogger->cGroups]);445 rc = MMR3HyperAllocOnceNoRel(pVM, pVM->vmm.s.cbRCRelLogger, 0, MM_TAG_VMM, (void **)&pVM->vmm.s.pRCRelLoggerR3);446 if (RT_FAILURE(rc))447 return rc;448 pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);449 }450 #endif451 452 409 /* 453 410 * Ring-0 release logger. … … 799 756 { 800 757 /* 801 * Set page attributes to r/w for stack pages.802 */803 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)804 {805 rc = PGMMapSetPage(pVM, pVM->aCpus[idCpu].vmm.s.pbEMTStackRC, VMM_STACK_SIZE,806 X86_PTE_P | X86_PTE_A | X86_PTE_D | X86_PTE_RW);807 AssertRCReturn(rc, rc);808 }809 810 /*811 758 * Create the EMT yield timer. 812 759 */ … … 816 763 rc = TMTimerSetMillies(pVM->vmm.s.pYieldTimer, pVM->vmm.s.cYieldEveryMillies); 817 764 AssertRCReturn(rc, rc); 818 819 #ifdef VBOX_WITH_NMI820 /*821 * Map the host APIC into GC - This is AMD/Intel + Host OS specific!822 */823 rc = PGMMap(pVM, pVM->vmm.s.GCPtrApicBase, 0xfee00000, PAGE_SIZE,824 X86_PTE_P | X86_PTE_RW | X86_PTE_PWT | X86_PTE_PCD | X86_PTE_A | X86_PTE_D);825 AssertRCReturn(rc, rc);826 #endif827 828 #ifdef VBOX_STRICT_VMM_STACK829 /*830 * Setup the stack guard pages: Two inaccessible pages at each sides of the831 * stack to catch over/under-flows.832 */833 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)834 {835 uint8_t *pbEMTStackR3 = pVM->aCpus[idCpu].vmm.s.pbEMTStackR3;836 837 memset(pbEMTStackR3 - PAGE_SIZE, 0xcc, PAGE_SIZE);838 MMR3HyperSetGuard(pVM, pbEMTStackR3 - PAGE_SIZE, PAGE_SIZE, true /*fSet*/);839 840 memset(pbEMTStackR3 + VMM_STACK_SIZE, 0xcc, PAGE_SIZE);841 MMR3HyperSetGuard(pVM, pbEMTStackR3 + VMM_STACK_SIZE, PAGE_SIZE, true /*fSet*/);842 }843 pVM->vmm.s.fStackGuardsStationed = true;844 #endif845 765 break; 846 766 } … … 945 865 pVM->vmm.s.hEvtRendezvousRecursionPopCaller = NIL_RTSEMEVENT; 946 866 947 #ifdef VBOX_STRICT_VMM_STACK948 /*949 * Make the two stack guard pages present again.950 */951 if (pVM->vmm.s.fStackGuardsStationed)952 {953 for (VMCPUID i = 0; i < pVM->cCpus; i++)954 {955 uint8_t *pbEMTStackR3 = pVM->aCpus[i].vmm.s.pbEMTStackR3;956 MMR3HyperSetGuard(pVM, pbEMTStackR3 - PAGE_SIZE, PAGE_SIZE, false /*fSet*/);957 MMR3HyperSetGuard(pVM, pbEMTStackR3 + VMM_STACK_SIZE, PAGE_SIZE, false /*fSet*/);958 }959 pVM->vmm.s.fStackGuardsStationed = false;960 }961 #endif962 963 867 vmmTermFormatTypes(); 964 868 return rc; … … 981 885 982 886 /* 983 * Recalc the RC address.984 */985 #ifdef VBOX_WITH_RAW_MODE986 pVM->vmm.s.pvCoreCodeRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pvCoreCodeR3);987 #endif988 989 /*990 * The stack.991 */992 for (VMCPUID i = 0; i < pVM->cCpus; i++)993 {994 PVMCPU pVCpu = &pVM->aCpus[i];995 996 CPUMSetHyperESP(pVCpu, CPUMGetHyperESP(pVCpu) + offDelta);997 998 pVCpu->vmm.s.pbEMTStackRC = MMHyperR3ToRC(pVM, pVCpu->vmm.s.pbEMTStackR3);999 pVCpu->vmm.s.pbEMTStackBottomRC = pVCpu->vmm.s.pbEMTStackRC + VMM_STACK_SIZE;1000 }1001 1002 /*1003 * All the switchers.1004 */1005 vmmR3SwitcherRelocate(pVM, offDelta);1006 1007 /*1008 * Get other RC entry points.1009 */1010 if (VM_IS_RAW_MODE_ENABLED(pVM))1011 {1012 int rc = PDMR3LdrGetSymbolRC(pVM, VMMRC_MAIN_MODULE_NAME, "CPUMGCResumeGuest", &pVM->vmm.s.pfnCPUMRCResumeGuest);1013 AssertReleaseMsgRC(rc, ("CPUMGCResumeGuest not found! rc=%Rra\n", rc));1014 1015 rc = PDMR3LdrGetSymbolRC(pVM, VMMRC_MAIN_MODULE_NAME, "CPUMGCResumeGuestV86", &pVM->vmm.s.pfnCPUMRCResumeGuestV86);1016 AssertReleaseMsgRC(rc, ("CPUMGCResumeGuestV86 not found! rc=%Rra\n", rc));1017 }1018 1019 /*1020 887 * Update the logger. 1021 888 */ … … 1032 899 VMMR3_INT_DECL(int) VMMR3UpdateLoggers(PVM pVM) 1033 900 { 1034 /*1035 * Simply clone the logger instance (for RC).1036 */1037 901 int rc = VINF_SUCCESS; 1038 RTRCPTR RCPtrLoggerFlush = 0;1039 1040 if ( pVM->vmm.s.pRCLoggerR31041 #ifdef VBOX_WITH_RC_RELEASE_LOGGING1042 || pVM->vmm.s.pRCRelLoggerR31043 #endif1044 )1045 {1046 Assert(VM_IS_RAW_MODE_ENABLED(pVM));1047 rc = PDMR3LdrGetSymbolRC(pVM, VMMRC_MAIN_MODULE_NAME, "vmmGCLoggerFlush", &RCPtrLoggerFlush);1048 AssertReleaseMsgRC(rc, ("vmmGCLoggerFlush not found! rc=%Rra\n", rc));1049 }1050 1051 if (pVM->vmm.s.pRCLoggerR3)1052 {1053 Assert(VM_IS_RAW_MODE_ENABLED(pVM));1054 RTRCPTR RCPtrLoggerWrapper = 0;1055 rc = PDMR3LdrGetSymbolRC(pVM, VMMRC_MAIN_MODULE_NAME, "vmmGCLoggerWrapper", &RCPtrLoggerWrapper);1056 AssertReleaseMsgRC(rc, ("vmmGCLoggerWrapper not found! rc=%Rra\n", rc));1057 1058 pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);1059 rc = RTLogCloneRC(NULL /* default */, pVM->vmm.s.pRCLoggerR3, pVM->vmm.s.cbRCLogger,1060 RCPtrLoggerWrapper, RCPtrLoggerFlush, RTLOGFLAGS_BUFFERED);1061 AssertReleaseMsgRC(rc, ("RTLogCloneRC failed! rc=%Rra\n", rc));1062 }1063 1064 #ifdef VBOX_WITH_RC_RELEASE_LOGGING1065 if (pVM->vmm.s.pRCRelLoggerR3)1066 {1067 Assert(VM_IS_RAW_MODE_ENABLED(pVM));1068 RTRCPTR RCPtrLoggerWrapper = 0;1069 rc = PDMR3LdrGetSymbolRC(pVM, VMMRC_MAIN_MODULE_NAME, "vmmGCRelLoggerWrapper", &RCPtrLoggerWrapper);1070 AssertReleaseMsgRC(rc, ("vmmGCRelLoggerWrapper not found! rc=%Rra\n", rc));1071 1072 pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);1073 rc = RTLogCloneRC(RTLogRelGetDefaultInstance(), pVM->vmm.s.pRCRelLoggerR3, pVM->vmm.s.cbRCRelLogger,1074 RCPtrLoggerWrapper, RCPtrLoggerFlush, RTLOGFLAGS_BUFFERED);1075 AssertReleaseMsgRC(rc, ("RTLogCloneRC failed! rc=%Rra\n", rc));1076 }1077 #endif /* VBOX_WITH_RC_RELEASE_LOGGING */1078 902 1079 903 #ifdef LOG_ENABLED … … 1118 942 } 1119 943 #endif 944 1120 945 return rc; 1121 946 } -
trunk/src/VBox/VMM/VMMR3/VMMGuruMeditation.cpp
r76553 r80003 377 377 * Dump the relevant hypervisor registers and stack. 378 378 */ 379 if (!VM_IS_RAW_MODE_ENABLED(pVM)) 379 if ( rcErr == VERR_VMM_RING0_ASSERTION /* fInRing3Call has already been cleared here. */ 380 || pVCpu->vmm.s.CallRing3JmpBufR0.fInRing3Call) 380 381 { 381 if ( rcErr == VERR_VMM_RING0_ASSERTION /* fInRing3Call has already been cleared here. */ 382 || pVCpu->vmm.s.CallRing3JmpBufR0.fInRing3Call) 383 { 384 /* Dump the jmpbuf. */ 385 pHlp->pfnPrintf(pHlp, 386 "!!\n" 387 "!! CallRing3JmpBuf:\n" 388 "!!\n"); 389 pHlp->pfnPrintf(pHlp, 390 "SavedEsp=%RHv SavedEbp=%RHv SpResume=%RHv SpCheck=%RHv\n", 391 pVCpu->vmm.s.CallRing3JmpBufR0.SavedEsp, 392 pVCpu->vmm.s.CallRing3JmpBufR0.SavedEbp, 393 pVCpu->vmm.s.CallRing3JmpBufR0.SpResume, 394 pVCpu->vmm.s.CallRing3JmpBufR0.SpCheck); 395 pHlp->pfnPrintf(pHlp, 396 "pvSavedStack=%RHv cbSavedStack=%#x fInRing3Call=%RTbool\n", 397 pVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack, 398 pVCpu->vmm.s.CallRing3JmpBufR0.cbSavedStack, 399 pVCpu->vmm.s.CallRing3JmpBufR0.fInRing3Call); 400 pHlp->pfnPrintf(pHlp, 401 "cbUsedMax=%#x cbUsedAvg=%#x cbUsedTotal=%#llx cUsedTotal=%#llx\n", 402 pVCpu->vmm.s.CallRing3JmpBufR0.cbUsedMax, 403 pVCpu->vmm.s.CallRing3JmpBufR0.cbUsedAvg, 404 pVCpu->vmm.s.CallRing3JmpBufR0.cbUsedTotal, 405 pVCpu->vmm.s.CallRing3JmpBufR0.cUsedTotal); 406 407 /* Dump the resume register frame on the stack. */ 408 PRTHCUINTPTR pBP; 382 /* Dump the jmpbuf. */ 383 pHlp->pfnPrintf(pHlp, 384 "!!\n" 385 "!! CallRing3JmpBuf:\n" 386 "!!\n"); 387 pHlp->pfnPrintf(pHlp, 388 "SavedEsp=%RHv SavedEbp=%RHv SpResume=%RHv SpCheck=%RHv\n", 389 pVCpu->vmm.s.CallRing3JmpBufR0.SavedEsp, 390 pVCpu->vmm.s.CallRing3JmpBufR0.SavedEbp, 391 pVCpu->vmm.s.CallRing3JmpBufR0.SpResume, 392 pVCpu->vmm.s.CallRing3JmpBufR0.SpCheck); 393 pHlp->pfnPrintf(pHlp, 394 "pvSavedStack=%RHv cbSavedStack=%#x fInRing3Call=%RTbool\n", 395 pVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack, 396 pVCpu->vmm.s.CallRing3JmpBufR0.cbSavedStack, 397 pVCpu->vmm.s.CallRing3JmpBufR0.fInRing3Call); 398 pHlp->pfnPrintf(pHlp, 399 "cbUsedMax=%#x cbUsedAvg=%#x cbUsedTotal=%#llx cUsedTotal=%#llx\n", 400 pVCpu->vmm.s.CallRing3JmpBufR0.cbUsedMax, 401 pVCpu->vmm.s.CallRing3JmpBufR0.cbUsedAvg, 402 pVCpu->vmm.s.CallRing3JmpBufR0.cbUsedTotal, 403 pVCpu->vmm.s.CallRing3JmpBufR0.cUsedTotal); 404 405 /* Dump the resume register frame on the stack. */ 406 PRTHCUINTPTR pBP; 409 407 #ifdef VMM_R0_SWITCH_STACK 410 411 408 pBP = (PRTHCUINTPTR)&pVCpu->vmm.s.pbEMTStackR3[ pVCpu->vmm.s.CallRing3JmpBufR0.SavedEbp 409 - MMHyperCCToR0(pVM, pVCpu->vmm.s.pbEMTStackR3)]; 412 410 #else 413 414 415 411 pBP = (PRTHCUINTPTR)&pVCpu->vmm.s.pbEMTStackR3[ pVCpu->vmm.s.CallRing3JmpBufR0.cbSavedStack 412 - pVCpu->vmm.s.CallRing3JmpBufR0.SpCheck 413 + pVCpu->vmm.s.CallRing3JmpBufR0.SavedEbp]; 416 414 #endif 417 415 #if HC_ARCH_BITS == 32 418 419 420 421 422 423 416 pHlp->pfnPrintf(pHlp, 417 "eax=volatile ebx=%08x ecx=volatile edx=volatile esi=%08x edi=%08x\n" 418 "eip=%08x esp=%08x ebp=%08x efl=%08x\n" 419 , 420 pBP[-3], pBP[-2], pBP[-1], 421 pBP[1], pVCpu->vmm.s.CallRing3JmpBufR0.SavedEbp - 8, pBP[0], pBP[-4]); 424 422 #else 425 423 # ifdef RT_OS_WINDOWS 426 427 428 429 430 431 432 433 434 435 436 437 424 pHlp->pfnPrintf(pHlp, 425 "rax=volatile rbx=%016RX64 rcx=volatile rdx=volatile\n" 426 "rsi=%016RX64 rdi=%016RX64 r8=volatile r9=volatile \n" 427 "r10=volatile r11=volatile r12=%016RX64 r13=%016RX64\n" 428 "r14=%016RX64 r15=%016RX64\n" 429 "rip=%016RX64 rsp=%016RX64 rbp=%016RX64 rfl=%08RX64\n" 430 , 431 pBP[-7], 432 pBP[-6], pBP[-5], 433 pBP[-4], pBP[-3], 434 pBP[-2], pBP[-1], 435 pBP[1], pVCpu->vmm.s.CallRing3JmpBufR0.SavedEbp - 16, pBP[0], pBP[-8]); 438 436 # else 439 440 441 442 443 444 445 446 447 448 449 437 pHlp->pfnPrintf(pHlp, 438 "rax=volatile rbx=%016RX64 rcx=volatile rdx=volatile\n" 439 "rsi=volatile rdi=volatile r8=volatile r9=volatile \n" 440 "r10=volatile r11=volatile r12=%016RX64 r13=%016RX64\n" 441 "r14=%016RX64 r15=%016RX64\n" 442 "rip=%016RX64 rsp=%016RX64 rbp=%016RX64 rflags=%08RX64\n" 443 , 444 pBP[-5], 445 pBP[-4], pBP[-3], 446 pBP[-2], pBP[-1], 447 pBP[1], pVCpu->vmm.s.CallRing3JmpBufR0.SavedEbp - 16, pBP[0], pBP[-6]); 450 448 # endif 451 449 #endif 452 450 453 /* Callstack. */454 DBGFADDRESS AddrPc, AddrBp, AddrSp;455 PCDBGFSTACKFRAME pFirstFrame;456 rc2 = DBGFR3StackWalkBeginEx(pVM->pUVM, pVCpu->idCpu, DBGFCODETYPE_RING0,457 DBGFR3AddrFromHostR0(&AddrBp, pVCpu->vmm.s.CallRing3JmpBufR0.SavedEbp),458 DBGFR3AddrFromHostR0(&AddrSp, pVCpu->vmm.s.CallRing3JmpBufR0.SpResume),459 DBGFR3AddrFromHostR0(&AddrPc, pVCpu->vmm.s.CallRing3JmpBufR0.SavedEipForUnwind),460 RTDBGRETURNTYPE_INVALID, &pFirstFrame);461 if (RT_SUCCESS(rc2))462 {463 pHlp->pfnPrintf(pHlp,464 "!!\n"465 "!! Call Stack:\n"466 "!!\n");467 #if HC_ARCH_BITS == 32468 pHlp->pfnPrintf(pHlp, "EBP Ret EBP Ret CS:EIP Arg0 Arg1 Arg2 Arg3 CS:EIP Symbol [line]\n");469 #else470 pHlp->pfnPrintf(pHlp, "RBP Ret RBP Ret RIP RIP Symbol [line]\n");471 #endif472 for (PCDBGFSTACKFRAME pFrame = pFirstFrame;473 pFrame;474 pFrame = DBGFR3StackWalkNext(pFrame))475 {476 #if HC_ARCH_BITS == 32477 pHlp->pfnPrintf(pHlp,478 "%RHv %RHv %04RX32:%RHv %RHv %RHv %RHv %RHv",479 (RTHCUINTPTR)pFrame->AddrFrame.off,480 (RTHCUINTPTR)pFrame->AddrReturnFrame.off,481 (RTHCUINTPTR)pFrame->AddrReturnPC.Sel,482 (RTHCUINTPTR)pFrame->AddrReturnPC.off,483 pFrame->Args.au32[0],484 pFrame->Args.au32[1],485 pFrame->Args.au32[2],486 pFrame->Args.au32[3]);487 pHlp->pfnPrintf(pHlp, " %RTsel:%08RHv", pFrame->AddrPC.Sel, pFrame->AddrPC.off);488 #else489 pHlp->pfnPrintf(pHlp,490 "%RHv %RHv %RHv %RHv",491 (RTHCUINTPTR)pFrame->AddrFrame.off,492 (RTHCUINTPTR)pFrame->AddrReturnFrame.off,493 (RTHCUINTPTR)pFrame->AddrReturnPC.off,494 (RTHCUINTPTR)pFrame->AddrPC.off);495 #endif496 if (pFrame->pSymPC)497 {498 RTGCINTPTR offDisp = pFrame->AddrPC.FlatPtr - pFrame->pSymPC->Value;499 if (offDisp > 0)500 pHlp->pfnPrintf(pHlp, " %s+%llx", pFrame->pSymPC->szName, (int64_t)offDisp);501 else if (offDisp < 0)502 pHlp->pfnPrintf(pHlp, " %s-%llx", pFrame->pSymPC->szName, -(int64_t)offDisp);503 else504 pHlp->pfnPrintf(pHlp, " %s", pFrame->pSymPC->szName);505 }506 if (pFrame->pLinePC)507 pHlp->pfnPrintf(pHlp, " [%s @ 0i%d]", pFrame->pLinePC->szFilename, pFrame->pLinePC->uLineNo);508 pHlp->pfnPrintf(pHlp, "\n");509 for (uint32_t iReg = 0; iReg < pFrame->cSureRegs; iReg++)510 {511 const char *pszName = pFrame->paSureRegs[iReg].pszName;512 if (!pszName)513 pszName = DBGFR3RegCpuName(pVM->pUVM, pFrame->paSureRegs[iReg].enmReg,514 pFrame->paSureRegs[iReg].enmType);515 char szValue[1024];516 szValue[0] = '\0';517 DBGFR3RegFormatValue(szValue, sizeof(szValue), &pFrame->paSureRegs[iReg].Value,518 pFrame->paSureRegs[iReg].enmType, false);519 pHlp->pfnPrintf(pHlp, " %-3s=%s\n", pszName, szValue);520 }521 }522 DBGFR3StackWalkEnd(pFirstFrame);523 }524 525 /* Symbols on the stack. */526 #ifdef VMM_R0_SWITCH_STACK527 uint32_t const iLast = VMM_STACK_SIZE / sizeof(uintptr_t);528 uint32_t iAddr = (uint32_t)( pVCpu->vmm.s.CallRing3JmpBufR0.SavedEsp529 - MMHyperCCToR0(pVM, pVCpu->vmm.s.pbEMTStackR3)) / sizeof(uintptr_t);530 if (iAddr > iLast)531 iAddr = 0;532 #else533 uint32_t const iLast = RT_MIN(pVCpu->vmm.s.CallRing3JmpBufR0.cbSavedStack, VMM_STACK_SIZE)534 / sizeof(uintptr_t);535 uint32_t iAddr = 0;536 #endif537 pHlp->pfnPrintf(pHlp,538 "!!\n"539 "!! Addresses on the stack (iAddr=%#x, iLast=%#x)\n"540 "!!\n",541 iAddr, iLast);542 uintptr_t const *paAddr = (uintptr_t const *)pVCpu->vmm.s.pbEMTStackR3;543 while (iAddr < iLast)544 {545 uintptr_t const uAddr = paAddr[iAddr];546 if (uAddr > X86_PAGE_SIZE)547 {548 DBGFADDRESS Addr;549 DBGFR3AddrFromFlat(pVM->pUVM, &Addr, uAddr);550 RTGCINTPTR offDisp = 0;551 PRTDBGSYMBOL pSym = DBGFR3AsSymbolByAddrA(pVM->pUVM, DBGF_AS_R0, &Addr,552 RTDBGSYMADDR_FLAGS_LESS_OR_EQUAL | RTDBGSYMADDR_FLAGS_SKIP_ABS_IN_DEFERRED,553 &offDisp, NULL);554 RTGCINTPTR offLineDisp;555 PRTDBGLINE pLine = DBGFR3AsLineByAddrA(pVM->pUVM, DBGF_AS_R0, &Addr, &offLineDisp, NULL);556 if (pLine || pSym)557 {558 pHlp->pfnPrintf(pHlp, "%#06x: %p =>", iAddr * sizeof(uintptr_t), uAddr);559 if (pSym)560 pHlp->pfnPrintf(pHlp, " %s + %#x", pSym->szName, (intptr_t)offDisp);561 if (pLine)562 pHlp->pfnPrintf(pHlp, " [%s:%u + %#x]\n", pLine->szFilename, pLine->uLineNo, offLineDisp);563 else564 pHlp->pfnPrintf(pHlp, "\n");565 RTDbgSymbolFree(pSym);566 RTDbgLineFree(pLine);567 }568 }569 iAddr++;570 }571 572 /* raw stack */573 Hlp.fRecSummary = false;574 pHlp->pfnPrintf(pHlp,575 "!!\n"576 "!! Raw stack (mind the direction).\n"577 "!! pbEMTStackR0=%RHv pbEMTStackBottomR0=%RHv VMM_STACK_SIZE=%#x\n"578 "!! pbEmtStackR3=%p\n"579 "!!\n"580 "%.*Rhxd\n",581 MMHyperCCToR0(pVM, pVCpu->vmm.s.pbEMTStackR3),582 MMHyperCCToR0(pVM, pVCpu->vmm.s.pbEMTStackR3) + VMM_STACK_SIZE,583 VMM_STACK_SIZE,584 pVCpu->vmm.s.pbEMTStackR3,585 VMM_STACK_SIZE, pVCpu->vmm.s.pbEMTStackR3);586 }587 else588 {589 pHlp->pfnPrintf(pHlp,590 "!! Skipping ring-0 registers and stack, rcErr=%Rrc\n", rcErr);591 }592 }593 else594 {595 /*596 * Try figure out where eip is.597 */598 /* core code? */599 if (uEIP - (RTGCUINTPTR)pVM->vmm.s.pvCoreCodeRC < pVM->vmm.s.cbCoreCode)600 pHlp->pfnPrintf(pHlp,601 "!! EIP is in CoreCode, offset %#x\n",602 uEIP - (RTGCUINTPTR)pVM->vmm.s.pvCoreCodeRC);603 else604 { /* ask PDM */ /** @todo ask DBGFR3Sym later? */605 char szModName[64];606 RTRCPTR RCPtrMod;607 char szNearSym1[260];608 RTRCPTR RCPtrNearSym1;609 char szNearSym2[260];610 RTRCPTR RCPtrNearSym2;611 int rc = PDMR3LdrQueryRCModFromPC(pVM, uEIP,612 &szModName[0], sizeof(szModName), &RCPtrMod,613 &szNearSym1[0], sizeof(szNearSym1), &RCPtrNearSym1,614 &szNearSym2[0], sizeof(szNearSym2), &RCPtrNearSym2);615 if (RT_SUCCESS(rc))616 pHlp->pfnPrintf(pHlp,617 "!! EIP in %s (%RRv) at rva %x near symbols:\n"618 "!! %RRv rva %RRv off %08x %s\n"619 "!! %RRv rva %RRv off -%08x %s\n",620 szModName, RCPtrMod, (unsigned)(uEIP - RCPtrMod),621 RCPtrNearSym1, RCPtrNearSym1 - RCPtrMod, (unsigned)(uEIP - RCPtrNearSym1), szNearSym1,622 RCPtrNearSym2, RCPtrNearSym2 - RCPtrMod, (unsigned)(RCPtrNearSym2 - uEIP), szNearSym2);623 else624 pHlp->pfnPrintf(pHlp,625 "!! EIP is not in any code known to VMM!\n");626 }627 628 /* Disassemble the instruction. */629 char szInstr[256];630 rc2 = DBGFR3DisasInstrEx(pVM->pUVM, pVCpu->idCpu, 0, 0,631 DBGF_DISAS_FLAGS_CURRENT_HYPER | DBGF_DISAS_FLAGS_DEFAULT_MODE,632 &szInstr[0], sizeof(szInstr), NULL);633 if (RT_SUCCESS(rc2))634 pHlp->pfnPrintf(pHlp,635 "!! %s\n", szInstr);636 637 /* Dump the hypervisor cpu state. */638 pHlp->pfnPrintf(pHlp,639 "!!\n"640 "!!\n"641 "!!\n");642 rc2 = DBGFR3Info(pVM->pUVM, "cpumhyper", "verbose", pHlp);643 fDoneHyper = true;644 645 451 /* Callstack. */ 452 DBGFADDRESS AddrPc, AddrBp, AddrSp; 646 453 PCDBGFSTACKFRAME pFirstFrame; 647 rc2 = DBGFR3StackWalkBegin(pVM->pUVM, pVCpu->idCpu, DBGFCODETYPE_HYPER, &pFirstFrame); 454 rc2 = DBGFR3StackWalkBeginEx(pVM->pUVM, pVCpu->idCpu, DBGFCODETYPE_RING0, 455 DBGFR3AddrFromHostR0(&AddrBp, pVCpu->vmm.s.CallRing3JmpBufR0.SavedEbp), 456 DBGFR3AddrFromHostR0(&AddrSp, pVCpu->vmm.s.CallRing3JmpBufR0.SpResume), 457 DBGFR3AddrFromHostR0(&AddrPc, pVCpu->vmm.s.CallRing3JmpBufR0.SavedEipForUnwind), 458 RTDBGRETURNTYPE_INVALID, &pFirstFrame); 648 459 if (RT_SUCCESS(rc2)) 649 460 { … … 651 462 "!!\n" 652 463 "!! Call Stack:\n" 653 "!!\n" 654 "EBP Ret EBP Ret CS:EIP Arg0 Arg1 Arg2 Arg3 CS:EIP Symbol [line]\n"); 464 "!!\n"); 465 #if HC_ARCH_BITS == 32 466 pHlp->pfnPrintf(pHlp, "EBP Ret EBP Ret CS:EIP Arg0 Arg1 Arg2 Arg3 CS:EIP Symbol [line]\n"); 467 #else 468 pHlp->pfnPrintf(pHlp, "RBP Ret RBP Ret RIP RIP Symbol [line]\n"); 469 #endif 655 470 for (PCDBGFSTACKFRAME pFrame = pFirstFrame; 656 471 pFrame; 657 472 pFrame = DBGFR3StackWalkNext(pFrame)) 658 473 { 474 #if HC_ARCH_BITS == 32 659 475 pHlp->pfnPrintf(pHlp, 660 "% 08RX32 %08RX32 %04RX32:%08RX32 %08RX32 %08RX32 %08RX32 %08RX32",661 ( uint32_t)pFrame->AddrFrame.off,662 ( uint32_t)pFrame->AddrReturnFrame.off,663 ( uint32_t)pFrame->AddrReturnPC.Sel,664 ( uint32_t)pFrame->AddrReturnPC.off,476 "%RHv %RHv %04RX32:%RHv %RHv %RHv %RHv %RHv", 477 (RTHCUINTPTR)pFrame->AddrFrame.off, 478 (RTHCUINTPTR)pFrame->AddrReturnFrame.off, 479 (RTHCUINTPTR)pFrame->AddrReturnPC.Sel, 480 (RTHCUINTPTR)pFrame->AddrReturnPC.off, 665 481 pFrame->Args.au32[0], 666 482 pFrame->Args.au32[1], 667 483 pFrame->Args.au32[2], 668 484 pFrame->Args.au32[3]); 669 pHlp->pfnPrintf(pHlp, " %RTsel:%08RGv", pFrame->AddrPC.Sel, pFrame->AddrPC.off); 485 pHlp->pfnPrintf(pHlp, " %RTsel:%08RHv", pFrame->AddrPC.Sel, pFrame->AddrPC.off); 486 #else 487 pHlp->pfnPrintf(pHlp, 488 "%RHv %RHv %RHv %RHv", 489 (RTHCUINTPTR)pFrame->AddrFrame.off, 490 (RTHCUINTPTR)pFrame->AddrReturnFrame.off, 491 (RTHCUINTPTR)pFrame->AddrReturnPC.off, 492 (RTHCUINTPTR)pFrame->AddrPC.off); 493 #endif 670 494 if (pFrame->pSymPC) 671 495 { … … 681 505 pHlp->pfnPrintf(pHlp, " [%s @ 0i%d]", pFrame->pLinePC->szFilename, pFrame->pLinePC->uLineNo); 682 506 pHlp->pfnPrintf(pHlp, "\n"); 507 for (uint32_t iReg = 0; iReg < pFrame->cSureRegs; iReg++) 508 { 509 const char *pszName = pFrame->paSureRegs[iReg].pszName; 510 if (!pszName) 511 pszName = DBGFR3RegCpuName(pVM->pUVM, pFrame->paSureRegs[iReg].enmReg, 512 pFrame->paSureRegs[iReg].enmType); 513 char szValue[1024]; 514 szValue[0] = '\0'; 515 DBGFR3RegFormatValue(szValue, sizeof(szValue), &pFrame->paSureRegs[iReg].Value, 516 pFrame->paSureRegs[iReg].enmType, false); 517 pHlp->pfnPrintf(pHlp, " %-3s=%s\n", pszName, szValue); 518 } 683 519 } 684 520 DBGFR3StackWalkEnd(pFirstFrame); 685 521 } 686 522 523 /* Symbols on the stack. */ 524 #ifdef VMM_R0_SWITCH_STACK 525 uint32_t const iLast = VMM_STACK_SIZE / sizeof(uintptr_t); 526 uint32_t iAddr = (uint32_t)( pVCpu->vmm.s.CallRing3JmpBufR0.SavedEsp 527 - MMHyperCCToR0(pVM, pVCpu->vmm.s.pbEMTStackR3)) / sizeof(uintptr_t); 528 if (iAddr > iLast) 529 iAddr = 0; 530 #else 531 uint32_t const iLast = RT_MIN(pVCpu->vmm.s.CallRing3JmpBufR0.cbSavedStack, VMM_STACK_SIZE) 532 / sizeof(uintptr_t); 533 uint32_t iAddr = 0; 534 #endif 535 pHlp->pfnPrintf(pHlp, 536 "!!\n" 537 "!! Addresses on the stack (iAddr=%#x, iLast=%#x)\n" 538 "!!\n", 539 iAddr, iLast); 540 uintptr_t const *paAddr = (uintptr_t const *)pVCpu->vmm.s.pbEMTStackR3; 541 while (iAddr < iLast) 542 { 543 uintptr_t const uAddr = paAddr[iAddr]; 544 if (uAddr > X86_PAGE_SIZE) 545 { 546 DBGFADDRESS Addr; 547 DBGFR3AddrFromFlat(pVM->pUVM, &Addr, uAddr); 548 RTGCINTPTR offDisp = 0; 549 PRTDBGSYMBOL pSym = DBGFR3AsSymbolByAddrA(pVM->pUVM, DBGF_AS_R0, &Addr, 550 RTDBGSYMADDR_FLAGS_LESS_OR_EQUAL | RTDBGSYMADDR_FLAGS_SKIP_ABS_IN_DEFERRED, 551 &offDisp, NULL); 552 RTGCINTPTR offLineDisp; 553 PRTDBGLINE pLine = DBGFR3AsLineByAddrA(pVM->pUVM, DBGF_AS_R0, &Addr, &offLineDisp, NULL); 554 if (pLine || pSym) 555 { 556 pHlp->pfnPrintf(pHlp, "%#06x: %p =>", iAddr * sizeof(uintptr_t), uAddr); 557 if (pSym) 558 pHlp->pfnPrintf(pHlp, " %s + %#x", pSym->szName, (intptr_t)offDisp); 559 if (pLine) 560 pHlp->pfnPrintf(pHlp, " [%s:%u + %#x]\n", pLine->szFilename, pLine->uLineNo, offLineDisp); 561 else 562 pHlp->pfnPrintf(pHlp, "\n"); 563 RTDbgSymbolFree(pSym); 564 RTDbgLineFree(pLine); 565 } 566 } 567 iAddr++; 568 } 569 687 570 /* raw stack */ 688 571 Hlp.fRecSummary = false; 689 572 pHlp->pfnPrintf(pHlp, 690 573 "!!\n" 691 "!! Raw stack (mind the direction). pbEMTStackRC=%RRv pbEMTStackBottomRC=%RRv\n" 574 "!! Raw stack (mind the direction).\n" 575 "!! pbEMTStackR0=%RHv pbEMTStackBottomR0=%RHv VMM_STACK_SIZE=%#x\n" 576 "!! pbEmtStackR3=%p\n" 692 577 "!!\n" 693 578 "%.*Rhxd\n", 694 pVCpu->vmm.s.pbEMTStackRC, pVCpu->vmm.s.pbEMTStackBottomRC, 579 MMHyperCCToR0(pVM, pVCpu->vmm.s.pbEMTStackR3), 580 MMHyperCCToR0(pVM, pVCpu->vmm.s.pbEMTStackR3) + VMM_STACK_SIZE, 581 VMM_STACK_SIZE, 582 pVCpu->vmm.s.pbEMTStackR3, 695 583 VMM_STACK_SIZE, pVCpu->vmm.s.pbEMTStackR3); 696 } /* !HMIsEnabled */ 584 } 585 else 586 { 587 pHlp->pfnPrintf(pHlp, 588 "!! Skipping ring-0 registers and stack, rcErr=%Rrc\n", rcErr); 589 } 697 590 break; 698 591 } -
trunk/src/VBox/VMM/VMMR3/VMMTests.cpp
r76553 r80003 45 45 46 46 47 #ifdef VBOX_WITH_RAW_MODE48 49 static void vmmR3TestClearStack(PVMCPU pVCpu)50 {51 /* We leave the first 64 bytes of the stack alone because of strict52 ring-0 long jump code uses it. */53 memset(pVCpu->vmm.s.pbEMTStackR3 + 64, 0xaa, VMM_STACK_SIZE - 64);54 }55 56 57 static int vmmR3ReportMsrRange(PVM pVM, uint32_t uMsr, uint64_t cMsrs, PRTSTREAM pReportStrm, uint32_t *pcMsrsFound)58 {59 /*60 * Preps.61 */62 RTRCPTR RCPtrEP;63 int rc = PDMR3LdrGetSymbolRC(pVM, VMMRC_MAIN_MODULE_NAME, "VMMRCTestReadMsrs", &RCPtrEP);64 AssertMsgRCReturn(rc, ("Failed to resolved VMMRC.rc::VMMRCEntry(), rc=%Rrc\n", rc), rc);65 66 uint32_t const cMsrsPerCall = 16384;67 uint32_t cbResults = cMsrsPerCall * sizeof(VMMTESTMSRENTRY);68 PVMMTESTMSRENTRY paResults;69 rc = MMHyperAlloc(pVM, cbResults, 0, MM_TAG_VMM, (void **)&paResults);70 AssertMsgRCReturn(rc, ("Error allocating %#x bytes off the hyper heap: %Rrc\n", cbResults, rc), rc);71 /*72 * The loop.73 */74 RTRCPTR RCPtrResults = MMHyperR3ToRC(pVM, paResults);75 uint32_t cMsrsFound = 0;76 uint32_t uLastMsr = uMsr;77 uint64_t uNsTsStart = RTTimeNanoTS();78 79 for (;;)80 {81 if ( pReportStrm82 && uMsr - uLastMsr > _64K83 && (uMsr & (_4M - 1)) == 0)84 {85 if (uMsr - uLastMsr < 16U*_1M)86 RTStrmFlush(pReportStrm);87 RTPrintf("... %#010x [%u ns/msr] ...\n", uMsr, (RTTimeNanoTS() - uNsTsStart) / uMsr);88 }89 90 /*RT_BZERO(paResults, cbResults);*/91 uint32_t const cBatch = RT_MIN(cMsrsPerCall, cMsrs);92 rc = VMMR3CallRC(pVM, RCPtrEP, 4, pVM->pVMRC, uMsr, cBatch, RCPtrResults);93 if (RT_FAILURE(rc))94 {95 RTPrintf("VMM: VMMR3CallRC failed rc=%Rrc, uMsr=%#x\n", rc, uMsr);96 break;97 }98 99 for (uint32_t i = 0; i < cBatch; i++)100 if (paResults[i].uMsr != UINT64_MAX)101 {102 if (paResults[i].uValue == 0)103 {104 if (pReportStrm)105 RTStrmPrintf(pReportStrm,106 " MVO(%#010llx, \"MSR\", UINT64_C(%#018llx)),\n", paResults[i].uMsr, paResults[i].uValue);107 RTPrintf("%#010llx = 0\n", paResults[i].uMsr);108 }109 else110 {111 if (pReportStrm)112 RTStrmPrintf(pReportStrm,113 " MVO(%#010llx, \"MSR\", UINT64_C(%#018llx)),\n", paResults[i].uMsr, paResults[i].uValue);114 RTPrintf("%#010llx = %#010x`%08x\n", paResults[i].uMsr,115 RT_HI_U32(paResults[i].uValue), RT_LO_U32(paResults[i].uValue));116 }117 cMsrsFound++;118 uLastMsr = paResults[i].uMsr;119 }120 121 /* Advance. */122 if (cMsrs <= cMsrsPerCall)123 break;124 cMsrs -= cMsrsPerCall;125 uMsr += cMsrsPerCall;126 }127 128 *pcMsrsFound += cMsrsFound;129 MMHyperFree(pVM, paResults);130 return rc;131 }132 133 134 /**135 * Produces a quick report of MSRs.136 *137 * @returns VBox status code.138 * @param pVM The cross context VM structure.139 * @param pReportStrm Pointer to the report output stream. Optional.140 * @param fWithCpuId Whether CPUID should be included.141 */142 static int vmmR3DoMsrQuickReport(PVM pVM, PRTSTREAM pReportStrm, bool fWithCpuId)143 {144 uint64_t uTsStart = RTTimeNanoTS();145 RTPrintf("=== MSR Quick Report Start ===\n");146 RTStrmFlush(g_pStdOut);147 if (fWithCpuId)148 {149 DBGFR3InfoStdErr(pVM->pUVM, "cpuid", "verbose");150 RTPrintf("\n");151 }152 if (pReportStrm)153 RTStrmPrintf(pReportStrm, "\n\n{\n");154 155 static struct { uint32_t uFirst, cMsrs; } const s_aRanges[] =156 {157 { 0x00000000, 0x00042000 },158 { 0x10000000, 0x00001000 },159 { 0x20000000, 0x00001000 },160 { 0x40000000, 0x00012000 },161 { 0x80000000, 0x00012000 },162 // Need 0xc0000000..0xc001106f (at least), but trouble on solaris w/ 10h and 0fh family cpus:163 // { 0xc0000000, 0x00022000 },164 { 0xc0000000, 0x00010000 },165 { 0xc0010000, 0x00001040 },166 { 0xc0011040, 0x00004040 }, /* should cause trouble... */167 };168 uint32_t cMsrsFound = 0;169 int rc = VINF_SUCCESS;170 for (unsigned i = 0; i < RT_ELEMENTS(s_aRanges) && RT_SUCCESS(rc); i++)171 {172 //if (i >= 3)173 //{174 //RTStrmFlush(g_pStdOut);175 //RTThreadSleep(40);176 //}177 rc = vmmR3ReportMsrRange(pVM, s_aRanges[i].uFirst, s_aRanges[i].cMsrs, pReportStrm, &cMsrsFound);178 }179 180 if (pReportStrm)181 RTStrmPrintf(pReportStrm, "}; /* %u (%#x) MSRs; rc=%Rrc */\n", cMsrsFound, cMsrsFound, rc);182 RTPrintf("Total %u (%#x) MSRs\n", cMsrsFound, cMsrsFound);183 RTPrintf("=== MSR Quick Report End (rc=%Rrc, %'llu ns) ===\n", rc, RTTimeNanoTS() - uTsStart);184 return rc;185 }186 187 188 /**189 * Performs a testcase.190 *191 * @returns return value from the test.192 * @param pVM The cross context VM structure.193 * @param enmTestcase The testcase operation to perform.194 * @param uVariation The testcase variation id.195 */196 static int vmmR3DoGCTest(PVM pVM, VMMRCOPERATION enmTestcase, unsigned uVariation)197 {198 PVMCPU pVCpu = &pVM->aCpus[0];199 200 RTRCPTR RCPtrEP;201 int rc = PDMR3LdrGetSymbolRC(pVM, VMMRC_MAIN_MODULE_NAME, "VMMRCEntry", &RCPtrEP);202 if (RT_FAILURE(rc))203 return rc;204 205 Log(("vmmR3DoGCTest: %d %#x\n", enmTestcase, uVariation));206 CPUMSetHyperState(pVCpu, pVM->vmm.s.pfnCallTrampolineRC, pVCpu->vmm.s.pbEMTStackBottomRC, 0, 0);207 vmmR3TestClearStack(pVCpu);208 CPUMPushHyper(pVCpu, uVariation);209 CPUMPushHyper(pVCpu, enmTestcase);210 CPUMPushHyper(pVCpu, pVM->pVMRC);211 CPUMPushHyper(pVCpu, 3 * sizeof(RTRCPTR)); /* stack frame size */212 CPUMPushHyper(pVCpu, RCPtrEP); /* what to call */213 Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));214 rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);215 216 # if 1217 /* flush the raw-mode logs. */218 # ifdef LOG_ENABLED219 PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;220 if ( pLogger221 && pLogger->offScratch > 0)222 RTLogFlushRC(NULL, pLogger);223 # endif224 # ifdef VBOX_WITH_RC_RELEASE_LOGGING225 PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;226 if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))227 RTLogFlushRC(RTLogRelGetDefaultInstance(), pRelLogger);228 # endif229 # endif230 231 Log(("vmmR3DoGCTest: rc=%Rrc iLastGZRc=%Rrc\n", rc, pVCpu->vmm.s.iLastGZRc));232 if (RT_LIKELY(rc == VINF_SUCCESS))233 rc = pVCpu->vmm.s.iLastGZRc;234 return rc;235 }236 237 238 /**239 * Performs a trap test.240 *241 * @returns Return value from the trap test.242 * @param pVM The cross context VM structure.243 * @param u8Trap The trap number to test.244 * @param uVariation The testcase variation.245 * @param rcExpect The expected result.246 * @param u32Eax The expected eax value.247 * @param pszFaultEIP The fault address. Pass NULL if this isn't available or doesn't apply.248 * @param pszDesc The test description.249 */250 static int vmmR3DoTrapTest(PVM pVM, uint8_t u8Trap, unsigned uVariation, int rcExpect, uint32_t u32Eax, const char *pszFaultEIP, const char *pszDesc)251 {252 PVMCPU pVCpu = &pVM->aCpus[0];253 254 RTPrintf("VMM: testing 0%x / %d - %s\n", u8Trap, uVariation, pszDesc);255 256 RTRCPTR RCPtrEP;257 int rc = PDMR3LdrGetSymbolRC(pVM, VMMRC_MAIN_MODULE_NAME, "VMMRCEntry", &RCPtrEP);258 if (RT_FAILURE(rc))259 return rc;260 261 CPUMSetHyperState(pVCpu, pVM->vmm.s.pfnCallTrampolineRC, pVCpu->vmm.s.pbEMTStackBottomRC, 0, 0);262 vmmR3TestClearStack(pVCpu);263 CPUMPushHyper(pVCpu, uVariation);264 CPUMPushHyper(pVCpu, u8Trap + VMMRC_DO_TESTCASE_TRAP_FIRST);265 CPUMPushHyper(pVCpu, pVM->pVMRC);266 CPUMPushHyper(pVCpu, 3 * sizeof(RTRCPTR)); /* stack frame size */267 CPUMPushHyper(pVCpu, RCPtrEP); /* what to call */268 Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));269 rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);270 if (RT_LIKELY(rc == VINF_SUCCESS))271 rc = pVCpu->vmm.s.iLastGZRc;272 bool fDump = false;273 if (rc != rcExpect)274 {275 RTPrintf("VMM: FAILURE - rc=%Rrc expected %Rrc\n", rc, rcExpect);276 if (rc != VERR_NOT_IMPLEMENTED)277 fDump = true;278 }279 else if ( rcExpect != VINF_SUCCESS280 && u8Trap != 8 /* double fault doesn't dare set TrapNo. */281 && u8Trap != 3 /* guest only, we're not in guest. */282 && u8Trap != 1 /* guest only, we're not in guest. */283 && u8Trap != TRPMGetTrapNo(pVCpu))284 {285 RTPrintf("VMM: FAILURE - Trap %#x expected %#x\n", TRPMGetTrapNo(pVCpu), u8Trap);286 fDump = true;287 }288 else if (pszFaultEIP)289 {290 RTRCPTR RCPtrFault;291 int rc2 = PDMR3LdrGetSymbolRC(pVM, VMMRC_MAIN_MODULE_NAME, pszFaultEIP, &RCPtrFault);292 if (RT_FAILURE(rc2))293 RTPrintf("VMM: FAILURE - Failed to resolve symbol '%s', %Rrc!\n", pszFaultEIP, rc);294 else if (RCPtrFault != CPUMGetHyperEIP(pVCpu))295 {296 RTPrintf("VMM: FAILURE - EIP=%08RX32 expected %RRv (%s)\n", CPUMGetHyperEIP(pVCpu), RCPtrFault, pszFaultEIP);297 fDump = true;298 }299 }300 else if (rcExpect != VINF_SUCCESS)301 {302 if (CPUMGetHyperSS(pVCpu) == SELMGetHyperDS(pVM))303 RTPrintf("VMM: FAILURE - ss=%x expected %x\n", CPUMGetHyperSS(pVCpu), SELMGetHyperDS(pVM));304 if (CPUMGetHyperES(pVCpu) == SELMGetHyperDS(pVM))305 RTPrintf("VMM: FAILURE - es=%x expected %x\n", CPUMGetHyperES(pVCpu), SELMGetHyperDS(pVM));306 if (CPUMGetHyperDS(pVCpu) == SELMGetHyperDS(pVM))307 RTPrintf("VMM: FAILURE - ds=%x expected %x\n", CPUMGetHyperDS(pVCpu), SELMGetHyperDS(pVM));308 if (CPUMGetHyperFS(pVCpu) == SELMGetHyperDS(pVM))309 RTPrintf("VMM: FAILURE - fs=%x expected %x\n", CPUMGetHyperFS(pVCpu), SELMGetHyperDS(pVM));310 if (CPUMGetHyperGS(pVCpu) == SELMGetHyperDS(pVM))311 RTPrintf("VMM: FAILURE - gs=%x expected %x\n", CPUMGetHyperGS(pVCpu), SELMGetHyperDS(pVM));312 if (CPUMGetHyperEDI(pVCpu) == 0x01234567)313 RTPrintf("VMM: FAILURE - edi=%x expected %x\n", CPUMGetHyperEDI(pVCpu), 0x01234567);314 if (CPUMGetHyperESI(pVCpu) == 0x42000042)315 RTPrintf("VMM: FAILURE - esi=%x expected %x\n", CPUMGetHyperESI(pVCpu), 0x42000042);316 if (CPUMGetHyperEBP(pVCpu) == 0xffeeddcc)317 RTPrintf("VMM: FAILURE - ebp=%x expected %x\n", CPUMGetHyperEBP(pVCpu), 0xffeeddcc);318 if (CPUMGetHyperEBX(pVCpu) == 0x89abcdef)319 RTPrintf("VMM: FAILURE - ebx=%x expected %x\n", CPUMGetHyperEBX(pVCpu), 0x89abcdef);320 if (CPUMGetHyperECX(pVCpu) == 0xffffaaaa)321 RTPrintf("VMM: FAILURE - ecx=%x expected %x\n", CPUMGetHyperECX(pVCpu), 0xffffaaaa);322 if (CPUMGetHyperEDX(pVCpu) == 0x77778888)323 RTPrintf("VMM: FAILURE - edx=%x expected %x\n", CPUMGetHyperEDX(pVCpu), 0x77778888);324 if (CPUMGetHyperEAX(pVCpu) == u32Eax)325 RTPrintf("VMM: FAILURE - eax=%x expected %x\n", CPUMGetHyperEAX(pVCpu), u32Eax);326 }327 if (fDump)328 VMMR3FatalDump(pVM, pVCpu, rc);329 return rc;330 }331 332 #endif /* VBOX_WITH_RAW_MODE */333 334 335 /* execute the switch. */336 VMMR3DECL(int) VMMDoTest(PVM pVM)337 {338 int rc = VINF_SUCCESS;339 340 #ifdef VBOX_WITH_RAW_MODE341 PVMCPU pVCpu = &pVM->aCpus[0];342 PUVM pUVM = pVM->pUVM;343 344 # ifdef NO_SUPCALLR0VMM345 RTPrintf("NO_SUPCALLR0VMM\n");346 return rc;347 # endif348 349 /*350 * Setup stack for calling VMMRCEntry().351 */352 RTRCPTR RCPtrEP;353 rc = PDMR3LdrGetSymbolRC(pVM, VMMRC_MAIN_MODULE_NAME, "VMMRCEntry", &RCPtrEP);354 if (RT_SUCCESS(rc))355 {356 RTPrintf("VMM: VMMRCEntry=%RRv\n", RCPtrEP);357 358 /*359 * Test various crashes which we must be able to recover from.360 */361 vmmR3DoTrapTest(pVM, 0x3, 0, VINF_EM_DBG_HYPER_ASSERTION, 0xf0f0f0f0, "vmmGCTestTrap3_FaultEIP", "int3");362 vmmR3DoTrapTest(pVM, 0x3, 1, VINF_EM_DBG_HYPER_ASSERTION, 0xf0f0f0f0, "vmmGCTestTrap3_FaultEIP", "int3 WP");363 364 # if 0//defined(DEBUG_bird) /* guess most people would like to skip these since they write to com1. */365 vmmR3DoTrapTest(pVM, 0x8, 0, VERR_TRPM_PANIC, 0x00000000, "vmmGCTestTrap8_FaultEIP", "#DF [#PG]");366 SELMR3Relocate(pVM); /* this resets the busy flag of the Trap 08 TSS */367 bool f;368 rc = CFGMR3QueryBool(CFGMR3GetRoot(pVM), "DoubleFault", &f);369 # if !defined(DEBUG_bird)370 if (RT_SUCCESS(rc) && f)371 # endif372 {373 /* see triple fault warnings in SELM and VMMRC.cpp. */374 vmmR3DoTrapTest(pVM, 0x8, 1, VERR_TRPM_PANIC, 0x00000000, "vmmGCTestTrap8_FaultEIP", "#DF [#PG] WP");375 SELMR3Relocate(pVM); /* this resets the busy flag of the Trap 08 TSS */376 }377 # endif378 379 vmmR3DoTrapTest(pVM, 0xd, 0, VERR_TRPM_DONT_PANIC, 0xf0f0f0f0, "vmmGCTestTrap0d_FaultEIP", "ltr #GP");380 /// @todo find a better \#GP case, on intel ltr will \#PF (busy update?) and not \#GP.381 //vmmR3DoTrapTest(pVM, 0xd, 1, VERR_TRPM_DONT_PANIC, 0xf0f0f0f0, "vmmGCTestTrap0d_FaultEIP", "ltr #GP WP");382 383 vmmR3DoTrapTest(pVM, 0xe, 0, VERR_TRPM_DONT_PANIC, 0x00000000, "vmmGCTestTrap0e_FaultEIP", "#PF (NULL)");384 vmmR3DoTrapTest(pVM, 0xe, 1, VERR_TRPM_DONT_PANIC, 0x00000000, "vmmGCTestTrap0e_FaultEIP", "#PF (NULL) WP");385 vmmR3DoTrapTest(pVM, 0xe, 2, VINF_SUCCESS, 0x00000000, NULL, "#PF w/Tmp Handler");386 /* This test is no longer relevant as fs and gs are loaded with NULL387 selectors and we will always return to HC if a #GP occurs while388 returning to guest code.389 vmmR3DoTrapTest(pVM, 0xe, 4, VINF_SUCCESS, 0x00000000, NULL, "#PF w/Tmp Handler and bad fs");390 */391 392 /*393 * Set a debug register and perform a context switch.394 */395 rc = vmmR3DoGCTest(pVM, VMMRC_DO_TESTCASE_NOP, 0);396 if (rc != VINF_SUCCESS)397 {398 RTPrintf("VMM: Nop test failed, rc=%Rrc not VINF_SUCCESS\n", rc);399 return RT_FAILURE(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS;400 }401 402 /* a harmless breakpoint */403 RTPrintf("VMM: testing hardware bp at 0x10000 (not hit)\n");404 DBGFADDRESS Addr;405 DBGFR3AddrFromFlat(pUVM, &Addr, 0x10000);406 RTUINT iBp0;407 rc = DBGFR3BpSetReg(pUVM, &Addr, 0, ~(uint64_t)0, X86_DR7_RW_EO, 1, &iBp0);408 AssertReleaseRC(rc);409 rc = vmmR3DoGCTest(pVM, VMMRC_DO_TESTCASE_NOP, 0);410 if (rc != VINF_SUCCESS)411 {412 RTPrintf("VMM: DR0=0x10000 test failed with rc=%Rrc!\n", rc);413 return RT_FAILURE(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS;414 }415 416 /* a bad one at VMMRCEntry */417 RTPrintf("VMM: testing hardware bp at VMMRCEntry (hit)\n");418 DBGFR3AddrFromFlat(pUVM, &Addr, RCPtrEP);419 RTUINT iBp1;420 rc = DBGFR3BpSetReg(pUVM, &Addr, 0, ~(uint64_t)0, X86_DR7_RW_EO, 1, &iBp1);421 AssertReleaseRC(rc);422 rc = vmmR3DoGCTest(pVM, VMMRC_DO_TESTCASE_NOP, 0);423 if (rc != VINF_EM_DBG_HYPER_BREAKPOINT)424 {425 RTPrintf("VMM: DR1=VMMRCEntry test failed with rc=%Rrc! expected VINF_EM_RAW_BREAKPOINT_HYPER\n", rc);426 return RT_FAILURE(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS;427 }428 429 /* resume the breakpoint */430 RTPrintf("VMM: resuming hyper after breakpoint\n");431 CPUMSetHyperEFlags(pVCpu, CPUMGetHyperEFlags(pVCpu) | X86_EFL_RF);432 rc = VMMR3ResumeHyper(pVM, pVCpu);433 if (rc != VINF_SUCCESS)434 {435 RTPrintf("VMM: failed to resume on hyper breakpoint, rc=%Rrc = KNOWN BUG\n", rc); /** @todo fix VMMR3ResumeHyper */436 return RT_FAILURE(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS;437 }438 439 /* engage the breakpoint again and try single stepping. */440 RTPrintf("VMM: testing hardware bp at VMMRCEntry + stepping\n");441 rc = vmmR3DoGCTest(pVM, VMMRC_DO_TESTCASE_NOP, 0);442 if (rc != VINF_EM_DBG_HYPER_BREAKPOINT)443 {444 RTPrintf("VMM: DR1=VMMRCEntry test failed with rc=%Rrc! expected VINF_EM_RAW_BREAKPOINT_HYPER\n", rc);445 return RT_FAILURE(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS;446 }447 448 RTGCUINTREG OldPc = CPUMGetHyperEIP(pVCpu);449 RTPrintf("%RGr=>", OldPc);450 unsigned i;451 for (i = 0; i < 8; i++)452 {453 CPUMSetHyperEFlags(pVCpu, CPUMGetHyperEFlags(pVCpu) | X86_EFL_TF | X86_EFL_RF);454 rc = VMMR3ResumeHyper(pVM, pVCpu);455 if (rc != VINF_EM_DBG_HYPER_STEPPED)456 {457 RTPrintf("\nVMM: failed to step on hyper breakpoint, rc=%Rrc\n", rc);458 return RT_FAILURE(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS;459 }460 RTGCUINTREG Pc = CPUMGetHyperEIP(pVCpu);461 RTPrintf("%RGr=>", Pc);462 if (Pc == OldPc)463 {464 RTPrintf("\nVMM: step failed, PC: %RGr -> %RGr\n", OldPc, Pc);465 return VERR_GENERAL_FAILURE;466 }467 OldPc = Pc;468 }469 RTPrintf("ok\n");470 471 /* done, clear it */472 if ( RT_FAILURE(DBGFR3BpClear(pUVM, iBp0))473 || RT_FAILURE(DBGFR3BpClear(pUVM, iBp1)))474 {475 RTPrintf("VMM: Failed to clear breakpoints!\n");476 return VERR_GENERAL_FAILURE;477 }478 rc = vmmR3DoGCTest(pVM, VMMRC_DO_TESTCASE_NOP, 0);479 if (rc != VINF_SUCCESS)480 {481 RTPrintf("VMM: NOP failed, rc=%Rrc\n", rc);482 return RT_FAILURE(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS;483 }484 485 /*486 * Interrupt masking. Failure may indiate NMI watchdog activity.487 */488 RTPrintf("VMM: interrupt masking...\n"); RTStrmFlush(g_pStdOut); RTThreadSleep(250);489 for (i = 0; i < 10000; i++)490 {491 uint64_t StartTick = ASMReadTSC();492 rc = vmmR3DoGCTest(pVM, VMMRC_DO_TESTCASE_INTERRUPT_MASKING, 0);493 if (rc != VINF_SUCCESS)494 {495 RTPrintf("VMM: Interrupt masking failed: rc=%Rrc\n", rc);496 return RT_FAILURE(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS;497 }498 uint64_t Ticks = ASMReadTSC() - StartTick;499 if (Ticks < (SUPGetCpuHzFromGip(g_pSUPGlobalInfoPage) / 10000))500 RTPrintf("Warning: Ticks=%RU64 (< %RU64)\n", Ticks, SUPGetCpuHzFromGip(g_pSUPGlobalInfoPage) / 10000);501 }502 503 /*504 * Interrupt forwarding.505 */506 CPUMSetHyperState(pVCpu, pVM->vmm.s.pfnCallTrampolineRC, pVCpu->vmm.s.pbEMTStackBottomRC, 0, 0);507 CPUMPushHyper(pVCpu, 0);508 CPUMPushHyper(pVCpu, VMMRC_DO_TESTCASE_HYPER_INTERRUPT);509 CPUMPushHyper(pVCpu, pVM->pVMRC);510 CPUMPushHyper(pVCpu, 3 * sizeof(RTRCPTR)); /* stack frame size */511 CPUMPushHyper(pVCpu, RCPtrEP); /* what to call */512 Log(("trampoline=%x\n", pVM->vmm.s.pfnCallTrampolineRC));513 514 /*515 * Switch and do da thing.516 */517 RTPrintf("VMM: interrupt forwarding...\n"); RTStrmFlush(g_pStdOut); RTThreadSleep(250);518 i = 0;519 uint64_t tsBegin = RTTimeNanoTS();520 uint64_t TickStart = ASMReadTSC();521 Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));522 do523 {524 rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);525 if (RT_LIKELY(rc == VINF_SUCCESS))526 rc = pVCpu->vmm.s.iLastGZRc;527 if (RT_FAILURE(rc))528 {529 Log(("VMM: GC returned fatal %Rra in iteration %d\n", rc, i));530 VMMR3FatalDump(pVM, pVCpu, rc);531 return rc;532 }533 i++;534 if (!(i % 32))535 Log(("VMM: iteration %d, esi=%08x edi=%08x ebx=%08x\n",536 i, CPUMGetHyperESI(pVCpu), CPUMGetHyperEDI(pVCpu), CPUMGetHyperEBX(pVCpu)));537 } while (rc == VINF_EM_RAW_INTERRUPT_HYPER);538 uint64_t TickEnd = ASMReadTSC();539 uint64_t tsEnd = RTTimeNanoTS();540 541 uint64_t Elapsed = tsEnd - tsBegin;542 uint64_t PerIteration = Elapsed / (uint64_t)i;543 uint64_t cTicksElapsed = TickEnd - TickStart;544 uint64_t cTicksPerIteration = cTicksElapsed / (uint64_t)i;545 546 RTPrintf("VMM: %8d interrupts in %11llu ns (%11llu ticks), %10llu ns/iteration (%11llu ticks)\n",547 i, Elapsed, cTicksElapsed, PerIteration, cTicksPerIteration);548 Log(("VMM: %8d interrupts in %11llu ns (%11llu ticks), %10llu ns/iteration (%11llu ticks)\n",549 i, Elapsed, cTicksElapsed, PerIteration, cTicksPerIteration));550 551 /*552 * These forced actions are not necessary for the test and trigger breakpoints too.553 */554 VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_TRPM_SYNC_IDT);555 VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_SELM_SYNC_TSS);556 557 /*558 * Profile switching.559 */560 RTPrintf("VMM: profiling switcher...\n");561 Log(("VMM: profiling switcher...\n"));562 uint64_t TickMin = UINT64_MAX;563 tsBegin = RTTimeNanoTS();564 TickStart = ASMReadTSC();565 Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));566 for (i = 0; i < 1000000; i++)567 {568 CPUMSetHyperState(pVCpu, pVM->vmm.s.pfnCallTrampolineRC, pVCpu->vmm.s.pbEMTStackBottomRC, 0, 0);569 CPUMPushHyper(pVCpu, 0);570 CPUMPushHyper(pVCpu, VMMRC_DO_TESTCASE_NOP);571 CPUMPushHyper(pVCpu, pVM->pVMRC);572 CPUMPushHyper(pVCpu, 3 * sizeof(RTRCPTR)); /* stack frame size */573 CPUMPushHyper(pVCpu, RCPtrEP); /* what to call */574 575 uint64_t TickThisStart = ASMReadTSC();576 rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);577 if (RT_LIKELY(rc == VINF_SUCCESS))578 rc = pVCpu->vmm.s.iLastGZRc;579 uint64_t TickThisElapsed = ASMReadTSC() - TickThisStart;580 if (RT_FAILURE(rc))581 {582 Log(("VMM: GC returned fatal %Rra in iteration %d\n", rc, i));583 VMMR3FatalDump(pVM, pVCpu, rc);584 return rc;585 }586 if (TickThisElapsed < TickMin)587 TickMin = TickThisElapsed;588 }589 TickEnd = ASMReadTSC();590 tsEnd = RTTimeNanoTS();591 592 Elapsed = tsEnd - tsBegin;593 PerIteration = Elapsed / (uint64_t)i;594 cTicksElapsed = TickEnd - TickStart;595 cTicksPerIteration = cTicksElapsed / (uint64_t)i;596 597 RTPrintf("VMM: %8d cycles in %11llu ns (%11lld ticks), %10llu ns/iteration (%11lld ticks) Min %11lld ticks\n",598 i, Elapsed, cTicksElapsed, PerIteration, cTicksPerIteration, TickMin);599 Log(("VMM: %8d cycles in %11llu ns (%11lld ticks), %10llu ns/iteration (%11lld ticks) Min %11lld ticks\n",600 i, Elapsed, cTicksElapsed, PerIteration, cTicksPerIteration, TickMin));601 602 rc = VINF_SUCCESS;603 604 # if 0 /* drop this for now as it causes trouble on AMDs (Opteron 2384 and possibly others). */605 /*606 * A quick MSR report.607 */608 vmmR3DoMsrQuickReport(pVM, NULL, true);609 # endif610 }611 else612 AssertMsgFailed(("Failed to resolved VMMRC.rc::VMMRCEntry(), rc=%Rrc\n", rc));613 #else /* !VBOX_WITH_RAW_MODE */614 RT_NOREF(pVM);615 #endif /* !VBOX_WITH_RAW_MODE */616 return rc;617 }618 619 47 #define SYNC_SEL(pHyperCtx, reg) \ 620 48 if (pHyperCtx->reg.Sel) \ … … 638 66 VMMR3DECL(int) VMMDoHmTest(PVM pVM) 639 67 { 68 #if 1 69 RTPrintf("FIXME!\n"); 70 RT_NOREF(pVM); 71 return 0; 72 #else 73 640 74 uint32_t i; 641 75 int rc; … … 758 192 759 193 return rc; 760 }761 762 763 #ifdef VBOX_WITH_RAW_MODE764 765 /**766 * Used by VMMDoBruteForceMsrs to dump the CPUID info of the host CPU as a767 * prefix to the MSR report.768 */769 static DECLCALLBACK(void) vmmDoPrintfVToStream(PCDBGFINFOHLP pHlp, const char *pszFormat, va_list va)770 {771 PRTSTREAM pOutStrm = ((PRTSTREAM *)pHlp)[-1];772 RTStrmPrintfV(pOutStrm, pszFormat, va);773 }774 775 /**776 * Used by VMMDoBruteForceMsrs to dump the CPUID info of the host CPU as a777 * prefix to the MSR report.778 */779 static DECLCALLBACK(void) vmmDoPrintfToStream(PCDBGFINFOHLP pHlp, const char *pszFormat, ...)780 {781 va_list va;782 va_start(va, pszFormat);783 vmmDoPrintfVToStream(pHlp, pszFormat, va);784 va_end(va);785 }786 787 #endif788 789 790 /**791 * Uses raw-mode to query all possible MSRs on the real hardware.792 *793 * This generates a msr-report.txt file (appending, no overwriting) as well as794 * writing the values and process to stdout.795 *796 * @returns VBox status code.797 * @param pVM The cross context VM structure.798 */799 VMMR3DECL(int) VMMDoBruteForceMsrs(PVM pVM)800 {801 #ifdef VBOX_WITH_RAW_MODE802 PRTSTREAM pOutStrm;803 int rc = RTStrmOpen("msr-report.txt", "a", &pOutStrm);804 if (RT_SUCCESS(rc))805 {806 /* Header */807 struct808 {809 PRTSTREAM pOutStrm;810 DBGFINFOHLP Hlp;811 } MyHlp = { pOutStrm, { vmmDoPrintfToStream, vmmDoPrintfVToStream } };812 DBGFR3Info(pVM->pUVM, "cpuid", "verbose", &MyHlp.Hlp);813 RTStrmPrintf(pOutStrm, "\n");814 815 uint32_t cMsrsFound = 0;816 vmmR3ReportMsrRange(pVM, 0, _4G, pOutStrm, &cMsrsFound);817 818 RTStrmPrintf(pOutStrm, "Total %u (%#x) MSRs\n", cMsrsFound, cMsrsFound);819 RTPrintf("Total %u (%#x) MSRs\n", cMsrsFound, cMsrsFound);820 821 RTStrmClose(pOutStrm);822 }823 return rc;824 #else825 RT_NOREF(pVM);826 return VERR_NOT_SUPPORTED;827 194 #endif 828 195 } 829 196 830 831 /**832 * Uses raw-mode to query all known MSRS on the real hardware.833 *834 * This generates a known-msr-report.txt file (appending, no overwriting) as835 * well as writing the values and process to stdout.836 *837 * @returns VBox status code.838 * @param pVM The cross context VM structure.839 */840 VMMR3DECL(int) VMMDoKnownMsrs(PVM pVM)841 {842 #ifdef VBOX_WITH_RAW_MODE843 PRTSTREAM pOutStrm;844 int rc = RTStrmOpen("known-msr-report.txt", "a", &pOutStrm);845 if (RT_SUCCESS(rc))846 {847 vmmR3DoMsrQuickReport(pVM, pOutStrm, false);848 RTStrmClose(pOutStrm);849 }850 return rc;851 #else852 RT_NOREF(pVM);853 return VERR_NOT_SUPPORTED;854 #endif855 }856 857 858 /**859 * MSR experimentation.860 *861 * @returns VBox status code.862 * @param pVM The cross context VM structure.863 */864 VMMR3DECL(int) VMMDoMsrExperiments(PVM pVM)865 {866 #ifdef VBOX_WITH_RAW_MODE867 /*868 * Preps.869 */870 RTRCPTR RCPtrEP;871 int rc = PDMR3LdrGetSymbolRC(pVM, VMMRC_MAIN_MODULE_NAME, "VMMRCTestTestWriteMsr", &RCPtrEP);872 AssertMsgRCReturn(rc, ("Failed to resolved VMMRC.rc::VMMRCEntry(), rc=%Rrc\n", rc), rc);873 874 uint64_t *pauValues;875 rc = MMHyperAlloc(pVM, 2 * sizeof(uint64_t), 0, MM_TAG_VMM, (void **)&pauValues);876 AssertMsgRCReturn(rc, ("Error allocating %#x bytes off the hyper heap: %Rrc\n", 2 * sizeof(uint64_t), rc), rc);877 RTRCPTR RCPtrValues = MMHyperR3ToRC(pVM, pauValues);878 879 /*880 * Do the experiments.881 */882 uint32_t uMsr = 0x00000277;883 uint64_t uValue = UINT64_C(0x0007010600070106);884 # if 0885 uValue &= ~(RT_BIT_64(17) | RT_BIT_64(16) | RT_BIT_64(15) | RT_BIT_64(14) | RT_BIT_64(13));886 uValue |= RT_BIT_64(13);887 rc = VMMR3CallRC(pVM, RCPtrEP, 6, pVM->pVMRC, uMsr, RT_LODWORD(uValue), RT_HIDWORD(uValue),888 RCPtrValues, RCPtrValues + sizeof(uint64_t));889 RTPrintf("uMsr=%#010x before=%#018llx written=%#018llx after=%#018llx rc=%Rrc\n",890 uMsr, pauValues[0], uValue, pauValues[1], rc);891 # elif 1892 const uint64_t uOrgValue = uValue;893 uint32_t cChanges = 0;894 for (int iBit = 63; iBit >= 58; iBit--)895 {896 uValue = uOrgValue & ~RT_BIT_64(iBit);897 rc = VMMR3CallRC(pVM, RCPtrEP, 6, pVM->pVMRC, uMsr, RT_LODWORD(uValue), RT_HIDWORD(uValue),898 RCPtrValues, RCPtrValues + sizeof(uint64_t));899 RTPrintf("uMsr=%#010x before=%#018llx written=%#018llx after=%#018llx rc=%Rrc\nclear bit=%u -> %s\n",900 uMsr, pauValues[0], uValue, pauValues[1], rc, iBit,901 (pauValues[0] ^ pauValues[1]) & RT_BIT_64(iBit) ? "changed" : "unchanged");902 cChanges += RT_BOOL(pauValues[0] ^ pauValues[1]);903 904 uValue = uOrgValue | RT_BIT_64(iBit);905 rc = VMMR3CallRC(pVM, RCPtrEP, 6, pVM->pVMRC, uMsr, RT_LODWORD(uValue), RT_HIDWORD(uValue),906 RCPtrValues, RCPtrValues + sizeof(uint64_t));907 RTPrintf("uMsr=%#010x before=%#018llx written=%#018llx after=%#018llx rc=%Rrc\nset bit=%u -> %s\n",908 uMsr, pauValues[0], uValue, pauValues[1], rc, iBit,909 (pauValues[0] ^ pauValues[1]) & RT_BIT_64(iBit) ? "changed" : "unchanged");910 cChanges += RT_BOOL(pauValues[0] ^ pauValues[1]);911 }912 RTPrintf("%u change(s)\n", cChanges);913 # else914 uint64_t fWriteable = 0;915 for (uint32_t i = 0; i <= 63; i++)916 {917 uValue = RT_BIT_64(i);918 # if 0919 if (uValue & (0x7))920 continue;921 # endif922 rc = VMMR3CallRC(pVM, RCPtrEP, 6, pVM->pVMRC, uMsr, RT_LODWORD(uValue), RT_HIDWORD(uValue),923 RCPtrValues, RCPtrValues + sizeof(uint64_t));924 RTPrintf("uMsr=%#010x before=%#018llx written=%#018llx after=%#018llx rc=%Rrc\n",925 uMsr, pauValues[0], uValue, pauValues[1], rc);926 if (RT_SUCCESS(rc))927 fWriteable |= RT_BIT_64(i);928 }929 930 uValue = 0;931 rc = VMMR3CallRC(pVM, RCPtrEP, 6, pVM->pVMRC, uMsr, RT_LODWORD(uValue), RT_HIDWORD(uValue),932 RCPtrValues, RCPtrValues + sizeof(uint64_t));933 RTPrintf("uMsr=%#010x before=%#018llx written=%#018llx after=%#018llx rc=%Rrc\n",934 uMsr, pauValues[0], uValue, pauValues[1], rc);935 936 uValue = UINT64_MAX;937 rc = VMMR3CallRC(pVM, RCPtrEP, 6, pVM->pVMRC, uMsr, RT_LODWORD(uValue), RT_HIDWORD(uValue),938 RCPtrValues, RCPtrValues + sizeof(uint64_t));939 RTPrintf("uMsr=%#010x before=%#018llx written=%#018llx after=%#018llx rc=%Rrc\n",940 uMsr, pauValues[0], uValue, pauValues[1], rc);941 942 uValue = fWriteable;943 rc = VMMR3CallRC(pVM, RCPtrEP, 6, pVM->pVMRC, uMsr, RT_LODWORD(uValue), RT_HIDWORD(uValue),944 RCPtrValues, RCPtrValues + sizeof(uint64_t));945 RTPrintf("uMsr=%#010x before=%#018llx written=%#018llx after=%#018llx rc=%Rrc [fWriteable]\n",946 uMsr, pauValues[0], uValue, pauValues[1], rc);947 948 # endif949 950 /*951 * Cleanups.952 */953 MMHyperFree(pVM, pauValues);954 return rc;955 #else956 RT_NOREF(pVM);957 return VERR_NOT_SUPPORTED;958 #endif959 }960
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