Changeset 80167 in vbox
- Timestamp:
- Aug 7, 2019 12:34:52 AM (5 years ago)
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 3 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMAll/PGMAll.cpp
r80163 r80167 52 52 DECLINLINE(int) pgmShwGetLongModePDPtr(PVMCPU pVCpu, RTGCPTR64 GCPtr, PX86PML4E *ppPml4e, PX86PDPT *ppPdpt, PX86PDPAE *ppPD); 53 53 DECLINLINE(int) pgmShwGetPaePoolPagePD(PVMCPU pVCpu, RTGCPTR GCPtr, PPGMPOOLPAGE *ppShwPde); 54 #ifndef IN_RC55 54 static int pgmShwSyncLongModePDPtr(PVMCPU pVCpu, RTGCPTR64 GCPtr, X86PGPAEUINT uGstPml4e, X86PGPAEUINT uGstPdpe, PX86PDPAE *ppPD); 56 55 static int pgmShwGetEPTPDPtr(PVMCPU pVCpu, RTGCPTR64 GCPtr, PEPTPDPT *ppPdpt, PEPTPD *ppPD); 57 #endif58 56 59 57 … … 190 188 191 189 192 #ifndef IN_RC /* AMD64 implies VT-x/AMD-V */193 190 /* 194 191 * Shadow - AMD64 mode 195 192 */ 196 # 197 # 198 # 193 #define PGM_SHW_TYPE PGM_TYPE_AMD64 194 #define PGM_SHW_NAME(name) PGM_SHW_NAME_AMD64(name) 195 #include "PGMAllShw.h" 199 196 200 197 /* Guest - protected mode (only used for AMD-V nested paging in 64 bits mode) */ 201 198 /** @todo retire this hack. */ 202 # define PGM_GST_TYPE PGM_TYPE_PROT 203 # define PGM_GST_NAME(name) PGM_GST_NAME_PROT(name) 204 # define PGM_BTH_NAME(name) PGM_BTH_NAME_AMD64_PROT(name) 205 # define BTH_PGMPOOLKIND_PT_FOR_PT PGMPOOLKIND_PAE_PT_FOR_PHYS 206 # define BTH_PGMPOOLKIND_ROOT PGMPOOLKIND_PAE_PD_PHYS 199 #define PGM_GST_TYPE PGM_TYPE_PROT 200 #define PGM_GST_NAME(name) PGM_GST_NAME_PROT(name) 201 #define PGM_BTH_NAME(name) PGM_BTH_NAME_AMD64_PROT(name) 202 #define BTH_PGMPOOLKIND_PT_FOR_PT PGMPOOLKIND_PAE_PT_FOR_PHYS 203 #define BTH_PGMPOOLKIND_ROOT PGMPOOLKIND_PAE_PD_PHYS 204 #include "PGMGstDefs.h" 205 #include "PGMAllBth.h" 206 #undef BTH_PGMPOOLKIND_PT_FOR_PT 207 #undef BTH_PGMPOOLKIND_ROOT 208 #undef PGM_BTH_NAME 209 #undef PGM_GST_TYPE 210 #undef PGM_GST_NAME 211 212 #ifdef VBOX_WITH_64_BITS_GUESTS 213 /* Guest - AMD64 mode */ 214 # define PGM_GST_TYPE PGM_TYPE_AMD64 215 # define PGM_GST_NAME(name) PGM_GST_NAME_AMD64(name) 216 # define PGM_BTH_NAME(name) PGM_BTH_NAME_AMD64_AMD64(name) 217 # define BTH_PGMPOOLKIND_PT_FOR_PT PGMPOOLKIND_PAE_PT_FOR_PAE_PT 218 # define BTH_PGMPOOLKIND_PT_FOR_BIG PGMPOOLKIND_PAE_PT_FOR_PAE_2MB 219 # define BTH_PGMPOOLKIND_ROOT PGMPOOLKIND_64BIT_PML4 207 220 # include "PGMGstDefs.h" 221 # include "PGMAllGst.h" 208 222 # include "PGMAllBth.h" 223 # undef BTH_PGMPOOLKIND_PT_FOR_BIG 209 224 # undef BTH_PGMPOOLKIND_PT_FOR_PT 210 225 # undef BTH_PGMPOOLKIND_ROOT … … 212 227 # undef PGM_GST_TYPE 213 228 # undef PGM_GST_NAME 214 215 # ifdef VBOX_WITH_64_BITS_GUESTS 216 /* Guest - AMD64 mode */ 217 # define PGM_GST_TYPE PGM_TYPE_AMD64 218 # define PGM_GST_NAME(name) PGM_GST_NAME_AMD64(name) 219 # define PGM_BTH_NAME(name) PGM_BTH_NAME_AMD64_AMD64(name) 220 # define BTH_PGMPOOLKIND_PT_FOR_PT PGMPOOLKIND_PAE_PT_FOR_PAE_PT 221 # define BTH_PGMPOOLKIND_PT_FOR_BIG PGMPOOLKIND_PAE_PT_FOR_PAE_2MB 222 # define BTH_PGMPOOLKIND_ROOT PGMPOOLKIND_64BIT_PML4 223 # include "PGMGstDefs.h" 224 # include "PGMAllGst.h" 225 # include "PGMAllBth.h" 226 # undef BTH_PGMPOOLKIND_PT_FOR_BIG 227 # undef BTH_PGMPOOLKIND_PT_FOR_PT 228 # undef BTH_PGMPOOLKIND_ROOT 229 # undef PGM_BTH_NAME 230 # undef PGM_GST_TYPE 231 # undef PGM_GST_NAME 232 # endif /* VBOX_WITH_64_BITS_GUESTS */ 233 234 # undef PGM_SHW_TYPE 235 # undef PGM_SHW_NAME 229 #endif /* VBOX_WITH_64_BITS_GUESTS */ 230 231 #undef PGM_SHW_TYPE 232 #undef PGM_SHW_NAME 236 233 237 234 … … 239 236 * Shadow - 32-bit nested paging mode. 240 237 */ 241 # define PGM_SHW_TYPEPGM_TYPE_NESTED_32BIT242 # define PGM_SHW_NAME(name)PGM_SHW_NAME_NESTED_32BIT(name)243 # 238 #define PGM_SHW_TYPE PGM_TYPE_NESTED_32BIT 239 #define PGM_SHW_NAME(name) PGM_SHW_NAME_NESTED_32BIT(name) 240 #include "PGMAllShw.h" 244 241 245 242 /* Guest - real mode */ 246 # define PGM_GST_TYPE PGM_TYPE_REAL 247 # define PGM_GST_NAME(name) PGM_GST_NAME_REAL(name) 248 # define PGM_BTH_NAME(name) PGM_BTH_NAME_NESTED_32BIT_REAL(name) 243 #define PGM_GST_TYPE PGM_TYPE_REAL 244 #define PGM_GST_NAME(name) PGM_GST_NAME_REAL(name) 245 #define PGM_BTH_NAME(name) PGM_BTH_NAME_NESTED_32BIT_REAL(name) 246 #include "PGMGstDefs.h" 247 #include "PGMAllBth.h" 248 #undef PGM_BTH_NAME 249 #undef PGM_GST_TYPE 250 #undef PGM_GST_NAME 251 252 /* Guest - protected mode */ 253 #define PGM_GST_TYPE PGM_TYPE_PROT 254 #define PGM_GST_NAME(name) PGM_GST_NAME_PROT(name) 255 #define PGM_BTH_NAME(name) PGM_BTH_NAME_NESTED_32BIT_PROT(name) 256 #include "PGMGstDefs.h" 257 #include "PGMAllBth.h" 258 #undef PGM_BTH_NAME 259 #undef PGM_GST_TYPE 260 #undef PGM_GST_NAME 261 262 /* Guest - 32-bit mode */ 263 #define PGM_GST_TYPE PGM_TYPE_32BIT 264 #define PGM_GST_NAME(name) PGM_GST_NAME_32BIT(name) 265 #define PGM_BTH_NAME(name) PGM_BTH_NAME_NESTED_32BIT_32BIT(name) 266 #include "PGMGstDefs.h" 267 #include "PGMAllBth.h" 268 #undef PGM_BTH_NAME 269 #undef PGM_GST_TYPE 270 #undef PGM_GST_NAME 271 272 /* Guest - PAE mode */ 273 #define PGM_GST_TYPE PGM_TYPE_PAE 274 #define PGM_GST_NAME(name) PGM_GST_NAME_PAE(name) 275 #define PGM_BTH_NAME(name) PGM_BTH_NAME_NESTED_32BIT_PAE(name) 276 #include "PGMGstDefs.h" 277 #include "PGMAllBth.h" 278 #undef PGM_BTH_NAME 279 #undef PGM_GST_TYPE 280 #undef PGM_GST_NAME 281 282 #ifdef VBOX_WITH_64_BITS_GUESTS 283 /* Guest - AMD64 mode */ 284 # define PGM_GST_TYPE PGM_TYPE_AMD64 285 # define PGM_GST_NAME(name) PGM_GST_NAME_AMD64(name) 286 # define PGM_BTH_NAME(name) PGM_BTH_NAME_NESTED_32BIT_AMD64(name) 249 287 # include "PGMGstDefs.h" 250 288 # include "PGMAllBth.h" … … 252 290 # undef PGM_GST_TYPE 253 291 # undef PGM_GST_NAME 292 #endif /* VBOX_WITH_64_BITS_GUESTS */ 293 294 #undef PGM_SHW_TYPE 295 #undef PGM_SHW_NAME 296 297 298 /* 299 * Shadow - PAE nested paging mode. 300 */ 301 #define PGM_SHW_TYPE PGM_TYPE_NESTED_PAE 302 #define PGM_SHW_NAME(name) PGM_SHW_NAME_NESTED_PAE(name) 303 #include "PGMAllShw.h" 304 305 /* Guest - real mode */ 306 #define PGM_GST_TYPE PGM_TYPE_REAL 307 #define PGM_GST_NAME(name) PGM_GST_NAME_REAL(name) 308 #define PGM_BTH_NAME(name) PGM_BTH_NAME_NESTED_PAE_REAL(name) 309 #include "PGMGstDefs.h" 310 #include "PGMAllBth.h" 311 #undef PGM_BTH_NAME 312 #undef PGM_GST_TYPE 313 #undef PGM_GST_NAME 254 314 255 315 /* Guest - protected mode */ 256 # define PGM_GST_TYPE PGM_TYPE_PROT 257 # define PGM_GST_NAME(name) PGM_GST_NAME_PROT(name) 258 # define PGM_BTH_NAME(name) PGM_BTH_NAME_NESTED_32BIT_PROT(name) 316 #define PGM_GST_TYPE PGM_TYPE_PROT 317 #define PGM_GST_NAME(name) PGM_GST_NAME_PROT(name) 318 #define PGM_BTH_NAME(name) PGM_BTH_NAME_NESTED_PAE_PROT(name) 319 #include "PGMGstDefs.h" 320 #include "PGMAllBth.h" 321 #undef PGM_BTH_NAME 322 #undef PGM_GST_TYPE 323 #undef PGM_GST_NAME 324 325 /* Guest - 32-bit mode */ 326 #define PGM_GST_TYPE PGM_TYPE_32BIT 327 #define PGM_GST_NAME(name) PGM_GST_NAME_32BIT(name) 328 #define PGM_BTH_NAME(name) PGM_BTH_NAME_NESTED_PAE_32BIT(name) 329 #include "PGMGstDefs.h" 330 #include "PGMAllBth.h" 331 #undef PGM_BTH_NAME 332 #undef PGM_GST_TYPE 333 #undef PGM_GST_NAME 334 335 /* Guest - PAE mode */ 336 #define PGM_GST_TYPE PGM_TYPE_PAE 337 #define PGM_GST_NAME(name) PGM_GST_NAME_PAE(name) 338 #define PGM_BTH_NAME(name) PGM_BTH_NAME_NESTED_PAE_PAE(name) 339 #include "PGMGstDefs.h" 340 #include "PGMAllBth.h" 341 #undef PGM_BTH_NAME 342 #undef PGM_GST_TYPE 343 #undef PGM_GST_NAME 344 345 #ifdef VBOX_WITH_64_BITS_GUESTS 346 /* Guest - AMD64 mode */ 347 # define PGM_GST_TYPE PGM_TYPE_AMD64 348 # define PGM_GST_NAME(name) PGM_GST_NAME_AMD64(name) 349 # define PGM_BTH_NAME(name) PGM_BTH_NAME_NESTED_PAE_AMD64(name) 259 350 # include "PGMGstDefs.h" 260 351 # include "PGMAllBth.h" … … 262 353 # undef PGM_GST_TYPE 263 354 # undef PGM_GST_NAME 355 #endif /* VBOX_WITH_64_BITS_GUESTS */ 356 357 #undef PGM_SHW_TYPE 358 #undef PGM_SHW_NAME 359 360 361 /* 362 * Shadow - AMD64 nested paging mode. 363 */ 364 #define PGM_SHW_TYPE PGM_TYPE_NESTED_AMD64 365 #define PGM_SHW_NAME(name) PGM_SHW_NAME_NESTED_AMD64(name) 366 #include "PGMAllShw.h" 367 368 /* Guest - real mode */ 369 #define PGM_GST_TYPE PGM_TYPE_REAL 370 #define PGM_GST_NAME(name) PGM_GST_NAME_REAL(name) 371 #define PGM_BTH_NAME(name) PGM_BTH_NAME_NESTED_AMD64_REAL(name) 372 #include "PGMGstDefs.h" 373 #include "PGMAllBth.h" 374 #undef PGM_BTH_NAME 375 #undef PGM_GST_TYPE 376 #undef PGM_GST_NAME 377 378 /* Guest - protected mode */ 379 #define PGM_GST_TYPE PGM_TYPE_PROT 380 #define PGM_GST_NAME(name) PGM_GST_NAME_PROT(name) 381 #define PGM_BTH_NAME(name) PGM_BTH_NAME_NESTED_AMD64_PROT(name) 382 #include "PGMGstDefs.h" 383 #include "PGMAllBth.h" 384 #undef PGM_BTH_NAME 385 #undef PGM_GST_TYPE 386 #undef PGM_GST_NAME 264 387 265 388 /* Guest - 32-bit mode */ 266 # define PGM_GST_TYPE PGM_TYPE_32BIT 267 # define PGM_GST_NAME(name) PGM_GST_NAME_32BIT(name) 268 # define PGM_BTH_NAME(name) PGM_BTH_NAME_NESTED_32BIT_32BIT(name) 389 #define PGM_GST_TYPE PGM_TYPE_32BIT 390 #define PGM_GST_NAME(name) PGM_GST_NAME_32BIT(name) 391 #define PGM_BTH_NAME(name) PGM_BTH_NAME_NESTED_AMD64_32BIT(name) 392 #include "PGMGstDefs.h" 393 #include "PGMAllBth.h" 394 #undef PGM_BTH_NAME 395 #undef PGM_GST_TYPE 396 #undef PGM_GST_NAME 397 398 /* Guest - PAE mode */ 399 #define PGM_GST_TYPE PGM_TYPE_PAE 400 #define PGM_GST_NAME(name) PGM_GST_NAME_PAE(name) 401 #define PGM_BTH_NAME(name) PGM_BTH_NAME_NESTED_AMD64_PAE(name) 402 #include "PGMGstDefs.h" 403 #include "PGMAllBth.h" 404 #undef PGM_BTH_NAME 405 #undef PGM_GST_TYPE 406 #undef PGM_GST_NAME 407 408 #ifdef VBOX_WITH_64_BITS_GUESTS 409 /* Guest - AMD64 mode */ 410 # define PGM_GST_TYPE PGM_TYPE_AMD64 411 # define PGM_GST_NAME(name) PGM_GST_NAME_AMD64(name) 412 # define PGM_BTH_NAME(name) PGM_BTH_NAME_NESTED_AMD64_AMD64(name) 269 413 # include "PGMGstDefs.h" 270 414 # include "PGMAllBth.h" … … 272 416 # undef PGM_GST_TYPE 273 417 # undef PGM_GST_NAME 274 275 /* Guest - PAE mode */ 276 # define PGM_GST_TYPE PGM_TYPE_PAE 277 # define PGM_GST_NAME(name) PGM_GST_NAME_PAE(name) 278 # define PGM_BTH_NAME(name) PGM_BTH_NAME_NESTED_32BIT_PAE(name) 279 # include "PGMGstDefs.h" 280 # include "PGMAllBth.h" 281 # undef PGM_BTH_NAME 282 # undef PGM_GST_TYPE 283 # undef PGM_GST_NAME 284 285 # ifdef VBOX_WITH_64_BITS_GUESTS 286 /* Guest - AMD64 mode */ 287 # define PGM_GST_TYPE PGM_TYPE_AMD64 288 # define PGM_GST_NAME(name) PGM_GST_NAME_AMD64(name) 289 # define PGM_BTH_NAME(name) PGM_BTH_NAME_NESTED_32BIT_AMD64(name) 290 # include "PGMGstDefs.h" 291 # include "PGMAllBth.h" 292 # undef PGM_BTH_NAME 293 # undef PGM_GST_TYPE 294 # undef PGM_GST_NAME 295 # endif /* VBOX_WITH_64_BITS_GUESTS */ 296 297 # undef PGM_SHW_TYPE 298 # undef PGM_SHW_NAME 299 300 301 /* 302 * Shadow - PAE nested paging mode. 303 */ 304 # define PGM_SHW_TYPE PGM_TYPE_NESTED_PAE 305 # define PGM_SHW_NAME(name) PGM_SHW_NAME_NESTED_PAE(name) 306 # include "PGMAllShw.h" 307 308 /* Guest - real mode */ 309 # define PGM_GST_TYPE PGM_TYPE_REAL 310 # define PGM_GST_NAME(name) PGM_GST_NAME_REAL(name) 311 # define PGM_BTH_NAME(name) PGM_BTH_NAME_NESTED_PAE_REAL(name) 312 # include "PGMGstDefs.h" 313 # include "PGMAllBth.h" 314 # undef PGM_BTH_NAME 315 # undef PGM_GST_TYPE 316 # undef PGM_GST_NAME 317 318 /* Guest - protected mode */ 319 # define PGM_GST_TYPE PGM_TYPE_PROT 320 # define PGM_GST_NAME(name) PGM_GST_NAME_PROT(name) 321 # define PGM_BTH_NAME(name) PGM_BTH_NAME_NESTED_PAE_PROT(name) 322 # include "PGMGstDefs.h" 323 # include "PGMAllBth.h" 324 # undef PGM_BTH_NAME 325 # undef PGM_GST_TYPE 326 # undef PGM_GST_NAME 327 328 /* Guest - 32-bit mode */ 329 # define PGM_GST_TYPE PGM_TYPE_32BIT 330 # define PGM_GST_NAME(name) PGM_GST_NAME_32BIT(name) 331 # define PGM_BTH_NAME(name) PGM_BTH_NAME_NESTED_PAE_32BIT(name) 332 # include "PGMGstDefs.h" 333 # include "PGMAllBth.h" 334 # undef PGM_BTH_NAME 335 # undef PGM_GST_TYPE 336 # undef PGM_GST_NAME 337 338 /* Guest - PAE mode */ 339 # define PGM_GST_TYPE PGM_TYPE_PAE 340 # define PGM_GST_NAME(name) PGM_GST_NAME_PAE(name) 341 # define PGM_BTH_NAME(name) PGM_BTH_NAME_NESTED_PAE_PAE(name) 342 # include "PGMGstDefs.h" 343 # include "PGMAllBth.h" 344 # undef PGM_BTH_NAME 345 # undef PGM_GST_TYPE 346 # undef PGM_GST_NAME 347 348 # ifdef VBOX_WITH_64_BITS_GUESTS 349 /* Guest - AMD64 mode */ 350 # define PGM_GST_TYPE PGM_TYPE_AMD64 351 # define PGM_GST_NAME(name) PGM_GST_NAME_AMD64(name) 352 # define PGM_BTH_NAME(name) PGM_BTH_NAME_NESTED_PAE_AMD64(name) 353 # include "PGMGstDefs.h" 354 # include "PGMAllBth.h" 355 # undef PGM_BTH_NAME 356 # undef PGM_GST_TYPE 357 # undef PGM_GST_NAME 358 # endif /* VBOX_WITH_64_BITS_GUESTS */ 359 360 # undef PGM_SHW_TYPE 361 # undef PGM_SHW_NAME 362 363 364 /* 365 * Shadow - AMD64 nested paging mode. 366 */ 367 # define PGM_SHW_TYPE PGM_TYPE_NESTED_AMD64 368 # define PGM_SHW_NAME(name) PGM_SHW_NAME_NESTED_AMD64(name) 369 # include "PGMAllShw.h" 370 371 /* Guest - real mode */ 372 # define PGM_GST_TYPE PGM_TYPE_REAL 373 # define PGM_GST_NAME(name) PGM_GST_NAME_REAL(name) 374 # define PGM_BTH_NAME(name) PGM_BTH_NAME_NESTED_AMD64_REAL(name) 375 # include "PGMGstDefs.h" 376 # include "PGMAllBth.h" 377 # undef PGM_BTH_NAME 378 # undef PGM_GST_TYPE 379 # undef PGM_GST_NAME 380 381 /* Guest - protected mode */ 382 # define PGM_GST_TYPE PGM_TYPE_PROT 383 # define PGM_GST_NAME(name) PGM_GST_NAME_PROT(name) 384 # define PGM_BTH_NAME(name) PGM_BTH_NAME_NESTED_AMD64_PROT(name) 385 # include "PGMGstDefs.h" 386 # include "PGMAllBth.h" 387 # undef PGM_BTH_NAME 388 # undef PGM_GST_TYPE 389 # undef PGM_GST_NAME 390 391 /* Guest - 32-bit mode */ 392 # define PGM_GST_TYPE PGM_TYPE_32BIT 393 # define PGM_GST_NAME(name) PGM_GST_NAME_32BIT(name) 394 # define PGM_BTH_NAME(name) PGM_BTH_NAME_NESTED_AMD64_32BIT(name) 395 # include "PGMGstDefs.h" 396 # include "PGMAllBth.h" 397 # undef PGM_BTH_NAME 398 # undef PGM_GST_TYPE 399 # undef PGM_GST_NAME 400 401 /* Guest - PAE mode */ 402 # define PGM_GST_TYPE PGM_TYPE_PAE 403 # define PGM_GST_NAME(name) PGM_GST_NAME_PAE(name) 404 # define PGM_BTH_NAME(name) PGM_BTH_NAME_NESTED_AMD64_PAE(name) 405 # include "PGMGstDefs.h" 406 # include "PGMAllBth.h" 407 # undef PGM_BTH_NAME 408 # undef PGM_GST_TYPE 409 # undef PGM_GST_NAME 410 411 # ifdef VBOX_WITH_64_BITS_GUESTS 412 /* Guest - AMD64 mode */ 413 # define PGM_GST_TYPE PGM_TYPE_AMD64 414 # define PGM_GST_NAME(name) PGM_GST_NAME_AMD64(name) 415 # define PGM_BTH_NAME(name) PGM_BTH_NAME_NESTED_AMD64_AMD64(name) 416 # include "PGMGstDefs.h" 417 # include "PGMAllBth.h" 418 # undef PGM_BTH_NAME 419 # undef PGM_GST_TYPE 420 # undef PGM_GST_NAME 421 # endif /* VBOX_WITH_64_BITS_GUESTS */ 422 423 # undef PGM_SHW_TYPE 424 # undef PGM_SHW_NAME 418 #endif /* VBOX_WITH_64_BITS_GUESTS */ 419 420 #undef PGM_SHW_TYPE 421 #undef PGM_SHW_NAME 425 422 426 423 … … 428 425 * Shadow - EPT. 429 426 */ 430 # define PGM_SHW_TYPEPGM_TYPE_EPT431 # define PGM_SHW_NAME(name)PGM_SHW_NAME_EPT(name)432 # 427 #define PGM_SHW_TYPE PGM_TYPE_EPT 428 #define PGM_SHW_NAME(name) PGM_SHW_NAME_EPT(name) 429 #include "PGMAllShw.h" 433 430 434 431 /* Guest - real mode */ 435 # define PGM_GST_TYPE PGM_TYPE_REAL 436 # define PGM_GST_NAME(name) PGM_GST_NAME_REAL(name) 437 # define PGM_BTH_NAME(name) PGM_BTH_NAME_EPT_REAL(name) 432 #define PGM_GST_TYPE PGM_TYPE_REAL 433 #define PGM_GST_NAME(name) PGM_GST_NAME_REAL(name) 434 #define PGM_BTH_NAME(name) PGM_BTH_NAME_EPT_REAL(name) 435 #define BTH_PGMPOOLKIND_PT_FOR_PT PGMPOOLKIND_EPT_PT_FOR_PHYS 436 #include "PGMGstDefs.h" 437 #include "PGMAllBth.h" 438 #undef BTH_PGMPOOLKIND_PT_FOR_PT 439 #undef PGM_BTH_NAME 440 #undef PGM_GST_TYPE 441 #undef PGM_GST_NAME 442 443 /* Guest - protected mode */ 444 #define PGM_GST_TYPE PGM_TYPE_PROT 445 #define PGM_GST_NAME(name) PGM_GST_NAME_PROT(name) 446 #define PGM_BTH_NAME(name) PGM_BTH_NAME_EPT_PROT(name) 447 #define BTH_PGMPOOLKIND_PT_FOR_PT PGMPOOLKIND_EPT_PT_FOR_PHYS 448 #include "PGMGstDefs.h" 449 #include "PGMAllBth.h" 450 #undef BTH_PGMPOOLKIND_PT_FOR_PT 451 #undef PGM_BTH_NAME 452 #undef PGM_GST_TYPE 453 #undef PGM_GST_NAME 454 455 /* Guest - 32-bit mode */ 456 #define PGM_GST_TYPE PGM_TYPE_32BIT 457 #define PGM_GST_NAME(name) PGM_GST_NAME_32BIT(name) 458 #define PGM_BTH_NAME(name) PGM_BTH_NAME_EPT_32BIT(name) 459 #define BTH_PGMPOOLKIND_PT_FOR_PT PGMPOOLKIND_EPT_PT_FOR_PHYS 460 #include "PGMGstDefs.h" 461 #include "PGMAllBth.h" 462 #undef BTH_PGMPOOLKIND_PT_FOR_PT 463 #undef PGM_BTH_NAME 464 #undef PGM_GST_TYPE 465 #undef PGM_GST_NAME 466 467 /* Guest - PAE mode */ 468 #define PGM_GST_TYPE PGM_TYPE_PAE 469 #define PGM_GST_NAME(name) PGM_GST_NAME_PAE(name) 470 #define PGM_BTH_NAME(name) PGM_BTH_NAME_EPT_PAE(name) 471 #define BTH_PGMPOOLKIND_PT_FOR_PT PGMPOOLKIND_EPT_PT_FOR_PHYS 472 #include "PGMGstDefs.h" 473 #include "PGMAllBth.h" 474 #undef BTH_PGMPOOLKIND_PT_FOR_PT 475 #undef PGM_BTH_NAME 476 #undef PGM_GST_TYPE 477 #undef PGM_GST_NAME 478 479 #ifdef VBOX_WITH_64_BITS_GUESTS 480 /* Guest - AMD64 mode */ 481 # define PGM_GST_TYPE PGM_TYPE_AMD64 482 # define PGM_GST_NAME(name) PGM_GST_NAME_AMD64(name) 483 # define PGM_BTH_NAME(name) PGM_BTH_NAME_EPT_AMD64(name) 438 484 # define BTH_PGMPOOLKIND_PT_FOR_PT PGMPOOLKIND_EPT_PT_FOR_PHYS 439 485 # include "PGMGstDefs.h" … … 443 489 # undef PGM_GST_TYPE 444 490 # undef PGM_GST_NAME 445 446 /* Guest - protected mode */ 447 # define PGM_GST_TYPE PGM_TYPE_PROT 448 # define PGM_GST_NAME(name) PGM_GST_NAME_PROT(name) 449 # define PGM_BTH_NAME(name) PGM_BTH_NAME_EPT_PROT(name) 450 # define BTH_PGMPOOLKIND_PT_FOR_PT PGMPOOLKIND_EPT_PT_FOR_PHYS 451 # include "PGMGstDefs.h" 452 # include "PGMAllBth.h" 453 # undef BTH_PGMPOOLKIND_PT_FOR_PT 454 # undef PGM_BTH_NAME 455 # undef PGM_GST_TYPE 456 # undef PGM_GST_NAME 457 458 /* Guest - 32-bit mode */ 459 # define PGM_GST_TYPE PGM_TYPE_32BIT 460 # define PGM_GST_NAME(name) PGM_GST_NAME_32BIT(name) 461 # define PGM_BTH_NAME(name) PGM_BTH_NAME_EPT_32BIT(name) 462 # define BTH_PGMPOOLKIND_PT_FOR_PT PGMPOOLKIND_EPT_PT_FOR_PHYS 463 # include "PGMGstDefs.h" 464 # include "PGMAllBth.h" 465 # undef BTH_PGMPOOLKIND_PT_FOR_PT 466 # undef PGM_BTH_NAME 467 # undef PGM_GST_TYPE 468 # undef PGM_GST_NAME 469 470 /* Guest - PAE mode */ 471 # define PGM_GST_TYPE PGM_TYPE_PAE 472 # define PGM_GST_NAME(name) PGM_GST_NAME_PAE(name) 473 # define PGM_BTH_NAME(name) PGM_BTH_NAME_EPT_PAE(name) 474 # define BTH_PGMPOOLKIND_PT_FOR_PT PGMPOOLKIND_EPT_PT_FOR_PHYS 475 # include "PGMGstDefs.h" 476 # include "PGMAllBth.h" 477 # undef BTH_PGMPOOLKIND_PT_FOR_PT 478 # undef PGM_BTH_NAME 479 # undef PGM_GST_TYPE 480 # undef PGM_GST_NAME 481 482 # ifdef VBOX_WITH_64_BITS_GUESTS 483 /* Guest - AMD64 mode */ 484 # define PGM_GST_TYPE PGM_TYPE_AMD64 485 # define PGM_GST_NAME(name) PGM_GST_NAME_AMD64(name) 486 # define PGM_BTH_NAME(name) PGM_BTH_NAME_EPT_AMD64(name) 487 # define BTH_PGMPOOLKIND_PT_FOR_PT PGMPOOLKIND_EPT_PT_FOR_PHYS 488 # include "PGMGstDefs.h" 489 # include "PGMAllBth.h" 490 # undef BTH_PGMPOOLKIND_PT_FOR_PT 491 # undef PGM_BTH_NAME 492 # undef PGM_GST_TYPE 493 # undef PGM_GST_NAME 494 # endif /* VBOX_WITH_64_BITS_GUESTS */ 495 496 # undef PGM_SHW_TYPE 497 # undef PGM_SHW_NAME 491 #endif /* VBOX_WITH_64_BITS_GUESTS */ 492 493 #undef PGM_SHW_TYPE 494 #undef PGM_SHW_NAME 498 495 499 496 … … 501 498 * Shadow - NEM / None. 502 499 */ 503 # define PGM_SHW_TYPEPGM_TYPE_NONE504 # define PGM_SHW_NAME(name)PGM_SHW_NAME_NONE(name)505 # 500 #define PGM_SHW_TYPE PGM_TYPE_NONE 501 #define PGM_SHW_NAME(name) PGM_SHW_NAME_NONE(name) 502 #include "PGMAllShw.h" 506 503 507 504 /* Guest - real mode */ 508 # define PGM_GST_TYPE PGM_TYPE_REAL 509 # define PGM_GST_NAME(name) PGM_GST_NAME_REAL(name) 510 # define PGM_BTH_NAME(name) PGM_BTH_NAME_NONE_REAL(name) 505 #define PGM_GST_TYPE PGM_TYPE_REAL 506 #define PGM_GST_NAME(name) PGM_GST_NAME_REAL(name) 507 #define PGM_BTH_NAME(name) PGM_BTH_NAME_NONE_REAL(name) 508 #include "PGMGstDefs.h" 509 #include "PGMAllBth.h" 510 #undef PGM_BTH_NAME 511 #undef PGM_GST_TYPE 512 #undef PGM_GST_NAME 513 514 /* Guest - protected mode */ 515 #define PGM_GST_TYPE PGM_TYPE_PROT 516 #define PGM_GST_NAME(name) PGM_GST_NAME_PROT(name) 517 #define PGM_BTH_NAME(name) PGM_BTH_NAME_NONE_PROT(name) 518 #include "PGMGstDefs.h" 519 #include "PGMAllBth.h" 520 #undef PGM_BTH_NAME 521 #undef PGM_GST_TYPE 522 #undef PGM_GST_NAME 523 524 /* Guest - 32-bit mode */ 525 #define PGM_GST_TYPE PGM_TYPE_32BIT 526 #define PGM_GST_NAME(name) PGM_GST_NAME_32BIT(name) 527 #define PGM_BTH_NAME(name) PGM_BTH_NAME_NONE_32BIT(name) 528 #include "PGMGstDefs.h" 529 #include "PGMAllBth.h" 530 #undef PGM_BTH_NAME 531 #undef PGM_GST_TYPE 532 #undef PGM_GST_NAME 533 534 /* Guest - PAE mode */ 535 #define PGM_GST_TYPE PGM_TYPE_PAE 536 #define PGM_GST_NAME(name) PGM_GST_NAME_PAE(name) 537 #define PGM_BTH_NAME(name) PGM_BTH_NAME_NONE_PAE(name) 538 #include "PGMGstDefs.h" 539 #include "PGMAllBth.h" 540 #undef PGM_BTH_NAME 541 #undef PGM_GST_TYPE 542 #undef PGM_GST_NAME 543 544 #ifdef VBOX_WITH_64_BITS_GUESTS 545 /* Guest - AMD64 mode */ 546 # define PGM_GST_TYPE PGM_TYPE_AMD64 547 # define PGM_GST_NAME(name) PGM_GST_NAME_AMD64(name) 548 # define PGM_BTH_NAME(name) PGM_BTH_NAME_NONE_AMD64(name) 511 549 # include "PGMGstDefs.h" 512 550 # include "PGMAllBth.h" … … 514 552 # undef PGM_GST_TYPE 515 553 # undef PGM_GST_NAME 516 517 /* Guest - protected mode */ 518 # define PGM_GST_TYPE PGM_TYPE_PROT 519 # define PGM_GST_NAME(name) PGM_GST_NAME_PROT(name) 520 # define PGM_BTH_NAME(name) PGM_BTH_NAME_NONE_PROT(name) 521 # include "PGMGstDefs.h" 522 # include "PGMAllBth.h" 523 # undef PGM_BTH_NAME 524 # undef PGM_GST_TYPE 525 # undef PGM_GST_NAME 526 527 /* Guest - 32-bit mode */ 528 # define PGM_GST_TYPE PGM_TYPE_32BIT 529 # define PGM_GST_NAME(name) PGM_GST_NAME_32BIT(name) 530 # define PGM_BTH_NAME(name) PGM_BTH_NAME_NONE_32BIT(name) 531 # include "PGMGstDefs.h" 532 # include "PGMAllBth.h" 533 # undef PGM_BTH_NAME 534 # undef PGM_GST_TYPE 535 # undef PGM_GST_NAME 536 537 /* Guest - PAE mode */ 538 # define PGM_GST_TYPE PGM_TYPE_PAE 539 # define PGM_GST_NAME(name) PGM_GST_NAME_PAE(name) 540 # define PGM_BTH_NAME(name) PGM_BTH_NAME_NONE_PAE(name) 541 # include "PGMGstDefs.h" 542 # include "PGMAllBth.h" 543 # undef PGM_BTH_NAME 544 # undef PGM_GST_TYPE 545 # undef PGM_GST_NAME 546 547 # ifdef VBOX_WITH_64_BITS_GUESTS 548 /* Guest - AMD64 mode */ 549 # define PGM_GST_TYPE PGM_TYPE_AMD64 550 # define PGM_GST_NAME(name) PGM_GST_NAME_AMD64(name) 551 # define PGM_BTH_NAME(name) PGM_BTH_NAME_NONE_AMD64(name) 552 # include "PGMGstDefs.h" 553 # include "PGMAllBth.h" 554 # undef PGM_BTH_NAME 555 # undef PGM_GST_TYPE 556 # undef PGM_GST_NAME 557 # endif /* VBOX_WITH_64_BITS_GUESTS */ 558 559 # undef PGM_SHW_TYPE 560 # undef PGM_SHW_NAME 561 562 #endif /* !IN_RC */ 554 #endif /* VBOX_WITH_64_BITS_GUESTS */ 555 556 #undef PGM_SHW_TYPE 557 #undef PGM_SHW_NAME 558 563 559 564 560 … … 613 609 #endif 614 610 }, 615 #if defined(VBOX_WITH_64_BITS_GUESTS) && !defined(IN_RC)611 #ifdef VBOX_WITH_64_BITS_GUESTS 616 612 { 617 613 PGM_TYPE_AMD64, … … 657 653 #endif 658 654 }, 659 #ifndef IN_RC660 655 { 661 656 PGM_TYPE_AMD64, … … 664 659 PGM_SHW_NAME_AMD64(Enter), 665 660 PGM_SHW_NAME_AMD64(Exit), 666 # 661 #ifdef IN_RING3 667 662 PGM_SHW_NAME_AMD64(Relocate), 668 # 663 #endif 669 664 }, 670 665 { … … 674 669 PGM_SHW_NAME_NESTED_32BIT(Enter), 675 670 PGM_SHW_NAME_NESTED_32BIT(Exit), 676 # 671 #ifdef IN_RING3 677 672 PGM_SHW_NAME_NESTED_32BIT(Relocate), 678 # 673 #endif 679 674 }, 680 675 { … … 684 679 PGM_SHW_NAME_NESTED_PAE(Enter), 685 680 PGM_SHW_NAME_NESTED_PAE(Exit), 686 # 681 #ifdef IN_RING3 687 682 PGM_SHW_NAME_NESTED_PAE(Relocate), 688 # 683 #endif 689 684 }, 690 685 { … … 694 689 PGM_SHW_NAME_NESTED_AMD64(Enter), 695 690 PGM_SHW_NAME_NESTED_AMD64(Exit), 696 # 691 #ifdef IN_RING3 697 692 PGM_SHW_NAME_NESTED_AMD64(Relocate), 698 # 693 #endif 699 694 }, 700 695 { … … 704 699 PGM_SHW_NAME_EPT(Enter), 705 700 PGM_SHW_NAME_EPT(Exit), 706 # 701 #ifdef IN_RING3 707 702 PGM_SHW_NAME_EPT(Relocate), 708 # 703 #endif 709 704 }, 710 705 { … … 714 709 PGM_SHW_NAME_NONE(Enter), 715 710 PGM_SHW_NAME_NONE(Exit), 716 # 711 #ifdef IN_RING3 717 712 PGM_SHW_NAME_NONE(Relocate), 718 # 713 #endif 719 714 }, 720 #endif /* IN_RC */721 715 }; 722 716 … … 777 771 PGMMODEDATABTH_NULL_ENTRY(), /* PGM_TYPE_PAE, PGM_TYPE_NONE - illegal */ 778 772 779 #ifndef IN_RC780 773 /* AMD64 shadow paging mode: */ 781 774 PGMMODEDATABTH_NULL_ENTRY(), /* 0 */ … … 784 777 PGMMODEDATABTH_NULL_ENTRY(), //PGMMODEDATABTH_ENTRY(PGM_TYPE_AMD64, PGM_TYPE_32BIT, PGM_BTH_NAME_AMD64_32BIT), 785 778 PGMMODEDATABTH_NULL_ENTRY(), //PGMMODEDATABTH_ENTRY(PGM_TYPE_AMD64, PGM_TYPE_PAE, PGM_BTH_NAME_AMD64_PAE), 786 # 779 #ifdef VBOX_WITH_64_BITS_GUESTS 787 780 PGMMODEDATABTH_ENTRY(PGM_TYPE_AMD64, PGM_TYPE_AMD64, PGM_BTH_NAME_AMD64_AMD64), 788 # 781 #else 789 782 PGMMODEDATABTH_NULL_ENTRY(), /* PGM_TYPE_AMD64, PGM_TYPE_AMD64 - illegal */ 790 # 783 #endif 791 784 PGMMODEDATABTH_NULL_ENTRY(), /* PGM_TYPE_AMD64, PGM_TYPE_NESTED_32BIT - illegal */ 792 785 PGMMODEDATABTH_NULL_ENTRY(), /* PGM_TYPE_AMD64, PGM_TYPE_NESTED_PAE - illegal */ … … 801 794 PGMMODEDATABTH_ENTRY(PGM_TYPE_NESTED_32BIT, PGM_TYPE_32BIT, PGM_BTH_NAME_NESTED_32BIT_32BIT), 802 795 PGMMODEDATABTH_ENTRY(PGM_TYPE_NESTED_32BIT, PGM_TYPE_PAE, PGM_BTH_NAME_NESTED_32BIT_PAE), 803 # 796 #ifdef VBOX_WITH_64_BITS_GUESTS 804 797 PGMMODEDATABTH_ENTRY(PGM_TYPE_NESTED_32BIT, PGM_TYPE_AMD64, PGM_BTH_NAME_NESTED_32BIT_AMD64), 805 # 798 #else 806 799 PGMMODEDATABTH_NULL_ENTRY(), /* PGM_TYPE_NESTED_32BIT, PGM_TYPE_AMD64 - illegal */ 807 # 800 #endif 808 801 PGMMODEDATABTH_NULL_ENTRY(), /* PGM_TYPE_NESTED_32BIT, PGM_TYPE_NESTED_32BIT - illegal */ 809 802 PGMMODEDATABTH_NULL_ENTRY(), /* PGM_TYPE_NESTED_32BIT, PGM_TYPE_NESTED_PAE - illegal */ … … 818 811 PGMMODEDATABTH_ENTRY(PGM_TYPE_NESTED_PAE, PGM_TYPE_32BIT, PGM_BTH_NAME_NESTED_PAE_32BIT), 819 812 PGMMODEDATABTH_ENTRY(PGM_TYPE_NESTED_PAE, PGM_TYPE_PAE, PGM_BTH_NAME_NESTED_PAE_PAE), 820 # 813 #ifdef VBOX_WITH_64_BITS_GUESTS 821 814 PGMMODEDATABTH_ENTRY(PGM_TYPE_NESTED_PAE, PGM_TYPE_AMD64, PGM_BTH_NAME_NESTED_PAE_AMD64), 822 # 815 #else 823 816 PGMMODEDATABTH_NULL_ENTRY(), /* PGM_TYPE_NESTED_PAE, PGM_TYPE_AMD64 - illegal */ 824 # 817 #endif 825 818 PGMMODEDATABTH_NULL_ENTRY(), /* PGM_TYPE_NESTED_PAE, PGM_TYPE_NESTED_32BIT - illegal */ 826 819 PGMMODEDATABTH_NULL_ENTRY(), /* PGM_TYPE_NESTED_PAE, PGM_TYPE_NESTED_PAE - illegal */ … … 835 828 PGMMODEDATABTH_ENTRY(PGM_TYPE_NESTED_AMD64, PGM_TYPE_32BIT, PGM_BTH_NAME_NESTED_AMD64_32BIT), 836 829 PGMMODEDATABTH_ENTRY(PGM_TYPE_NESTED_AMD64, PGM_TYPE_PAE, PGM_BTH_NAME_NESTED_AMD64_PAE), 837 # 830 #ifdef VBOX_WITH_64_BITS_GUESTS 838 831 PGMMODEDATABTH_ENTRY(PGM_TYPE_NESTED_AMD64, PGM_TYPE_AMD64, PGM_BTH_NAME_NESTED_AMD64_AMD64), 839 # 832 #else 840 833 PGMMODEDATABTH_NULL_ENTRY(), /* PGM_TYPE_NESTED_AMD64, PGM_TYPE_AMD64 - illegal */ 841 # 834 #endif 842 835 PGMMODEDATABTH_NULL_ENTRY(), /* PGM_TYPE_NESTED_AMD64, PGM_TYPE_NESTED_32BIT - illegal */ 843 836 PGMMODEDATABTH_NULL_ENTRY(), /* PGM_TYPE_NESTED_AMD64, PGM_TYPE_NESTED_PAE - illegal */ … … 852 845 PGMMODEDATABTH_ENTRY(PGM_TYPE_EPT, PGM_TYPE_32BIT, PGM_BTH_NAME_EPT_32BIT), 853 846 PGMMODEDATABTH_ENTRY(PGM_TYPE_EPT, PGM_TYPE_PAE, PGM_BTH_NAME_EPT_PAE), 854 # 847 #ifdef VBOX_WITH_64_BITS_GUESTS 855 848 PGMMODEDATABTH_ENTRY(PGM_TYPE_EPT, PGM_TYPE_AMD64, PGM_BTH_NAME_EPT_AMD64), 856 # 849 #else 857 850 PGMMODEDATABTH_NULL_ENTRY(), /* PGM_TYPE_EPT, PGM_TYPE_AMD64 - illegal */ 858 # 851 #endif 859 852 PGMMODEDATABTH_NULL_ENTRY(), /* PGM_TYPE_EPT, PGM_TYPE_NESTED_32BIT - illegal */ 860 853 PGMMODEDATABTH_NULL_ENTRY(), /* PGM_TYPE_EPT, PGM_TYPE_NESTED_PAE - illegal */ … … 869 862 PGMMODEDATABTH_ENTRY(PGM_TYPE_NONE, PGM_TYPE_32BIT, PGM_BTH_NAME_EPT_32BIT), 870 863 PGMMODEDATABTH_ENTRY(PGM_TYPE_NONE, PGM_TYPE_PAE, PGM_BTH_NAME_EPT_PAE), 871 # 864 #ifdef VBOX_WITH_64_BITS_GUESTS 872 865 PGMMODEDATABTH_ENTRY(PGM_TYPE_NONE, PGM_TYPE_AMD64, PGM_BTH_NAME_EPT_AMD64), 873 # 866 #else 874 867 PGMMODEDATABTH_NULL_ENTRY(), /* PGM_TYPE_NONE, PGM_TYPE_AMD64 - illegal */ 875 # 868 #endif 876 869 PGMMODEDATABTH_NULL_ENTRY(), /* PGM_TYPE_NONE, PGM_TYPE_NESTED_32BIT - illegal */ 877 870 PGMMODEDATABTH_NULL_ENTRY(), /* PGM_TYPE_NONE, PGM_TYPE_NESTED_PAE - illegal */ … … 880 873 PGMMODEDATABTH_NULL_ENTRY(), /* PGM_TYPE_NONE, PGM_TYPE_NONE - illegal */ 881 874 882 #endif /* IN_RC */883 875 884 876 #undef PGMMODEDATABTH_ENTRY … … 887 879 888 880 889 #if ndef IN_RING3881 #ifdef IN_RING0 890 882 /** 891 883 * #PF Handler. … … 906 898 907 899 908 # ifdef VBOX_WITH_STATISTICS900 # ifdef VBOX_WITH_STATISTICS 909 901 /* 910 902 * Error code stats. … … 944 936 STAM_COUNTER_INC(&pVCpu->pgm.s.CTX_SUFF(pStats)->StatRZTrap0eSVReserved); 945 937 } 946 # endif /* VBOX_WITH_STATISTICS */938 # endif /* VBOX_WITH_STATISTICS */ 947 939 948 940 /* … … 969 961 rc = VINF_SUCCESS; 970 962 971 # ifdef IN_RING0972 963 /* Note: hack alert for difficult to reproduce problem. */ 973 964 if ( rc == VERR_PAGE_NOT_PRESENT /* SMP only ; disassembly might fail. */ … … 980 971 rc = VINF_SUCCESS; 981 972 } 982 # endif983 973 } 984 974 … … 989 979 return rc; 990 980 } 991 #endif /* !IN_RING3*/981 #endif /* IN_RING0 */ 992 982 993 983 … … 1236 1226 */ 1237 1227 REMNotifyInvalidatePage(pVM, GCPtrPage); 1238 #endif /* !IN_RING3 */1228 #endif 1239 1229 IEMTlbInvalidatePage(pVCpu, GCPtrPage); 1240 1241 1242 #ifdef IN_RC1243 /*1244 * Check for conflicts and pending CR3 monitoring updates.1245 */1246 if (pgmMapAreMappingsFloating(pVM))1247 {1248 if ( pgmGetMapping(pVM, GCPtrPage)1249 && PGMGstGetPage(pVCpu, GCPtrPage, NULL, NULL) != VERR_PAGE_TABLE_NOT_PRESENT)1250 {1251 LogFlow(("PGMGCInvalidatePage: Conflict!\n"));1252 VMCPU_FF_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3);1253 STAM_COUNTER_INC(&pVM->pgm.s.CTX_SUFF(pStats)->StatRCInvlPgConflict);1254 return VINF_PGM_SYNC_CR3;1255 }1256 1257 if (pVCpu->pgm.s.fSyncFlags & PGM_SYNC_MONITOR_CR3)1258 {1259 LogFlow(("PGMGCInvalidatePage: PGM_SYNC_MONITOR_CR3 -> reinterpret instruction in R3\n"));1260 STAM_COUNTER_INC(&pVM->pgm.s.CTX_SUFF(pStats)->StatRCInvlPgSyncMonCR3);1261 return VINF_EM_RAW_EMULATE_INSTR;1262 }1263 }1264 #endif /* IN_RC */1265 1230 1266 1231 /* … … 1288 1253 Assert(!pVM->pgm.s.fMappingsFixed); Assert(pgmMapAreMappingsEnabled(pVM)); 1289 1254 } 1290 1291 # ifdef VBOX_WITH_RAW_MODE1292 /*1293 * Inform CSAM about the flush1294 *1295 * Note: This is to check if monitored pages have been changed; when we implement1296 * callbacks for virtual handlers, this is no longer required.1297 */1298 CSAMR3FlushPage(pVM, GCPtrPage);1299 # endif1300 1255 #endif /* IN_RING3 */ 1301 1256 … … 1563 1518 /* The PD was cached or created; hook it up now. */ 1564 1519 pPdpe->u |= pShwPage->Core.Key | (uGstPdpe & (X86_PDPE_P | X86_PDPE_A)); 1565 1566 # if defined(IN_RC)1567 /*1568 * In 32 bits PAE mode we *must* invalidate the TLB when changing a1569 * PDPT entry; the CPU fetches them only during cr3 load, so any1570 * non-present PDPT will continue to cause page faults.1571 */1572 ASMReloadCR3();1573 # endif1574 1520 PGM_DYNMAP_UNUSED_HINT(pVCpu, pPdpe); 1575 1521 } … … 1619 1565 } 1620 1566 1621 #ifndef IN_RC1622 1567 1623 1568 /** … … 1859 1804 } 1860 1805 1861 #endif /* IN_RC */1862 1806 1863 1807 #ifdef IN_RING0 … … 1975 1919 return PGM_GST_NAME_PAE(Walk)(pVCpu, GCPtr, &pWalk->u.Pae); 1976 1920 1977 #if !defined(IN_RC)1978 1921 case PGMMODE_AMD64: 1979 1922 case PGMMODE_AMD64_NX: 1980 1923 pWalk->enmType = PGMPTWALKGSTTYPE_AMD64; 1981 1924 return PGM_GST_NAME_AMD64(Walk)(pVCpu, GCPtr, &pWalk->u.Amd64); 1982 #endif1983 1925 1984 1926 case PGMMODE_REAL: … … 1987 1929 return VERR_PGM_NOT_USED_IN_MODE; 1988 1930 1989 #if defined(IN_RC)1990 case PGMMODE_AMD64:1991 case PGMMODE_AMD64_NX:1992 #endif1993 1931 case PGMMODE_NESTED_32BIT: 1994 1932 case PGMMODE_NESTED_PAE: … … 2316 2254 RTRCPTR RCPtr = NIL_RTRCPTR; 2317 2255 RTHCPTR HCPtr = NIL_RTHCPTR; 2318 # if !defined(IN_RC) && !defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)2256 # ifndef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0 2319 2257 rc = pgmPhysGCPhys2CCPtrInternalDepr(pVM, pPage, GCPhys, &HCPtr); 2320 2258 AssertRC(rc); 2321 # endif2259 # endif 2322 2260 if (RT_SUCCESS(rc)) 2323 2261 { … … 2350 2288 } 2351 2289 2352 #endif /* !VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0 */ 2353 #if !defined(IN_RC) && !defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0) 2290 2354 2291 /** 2355 2292 * Performs the lazy mapping of the 32-bit guest PD. … … 2376 2313 { 2377 2314 pVCpu->pgm.s.pGstAmd64Pml4R3 = (R3PTRTYPE(PX86PML4))HCPtrGuestCR3; 2378 # 2315 # ifndef VBOX_WITH_2X_4GB_ADDR_SPACE 2379 2316 pVCpu->pgm.s.pGstAmd64Pml4R0 = (R0PTRTYPE(PX86PML4))HCPtrGuestCR3; 2380 # 2317 # endif 2381 2318 *ppPml4 = (PX86PML4)HCPtrGuestCR3; 2382 2319 … … 2390 2327 return rc; 2391 2328 } 2392 #endif 2329 2330 #endif /* !VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0 */ 2393 2331 2394 2332 … … 2436 2374 /* Force lazy remapping if it changed in any way. */ 2437 2375 pVCpu->pgm.s.apGstPaePDsR3[i] = 0; 2438 # 2376 #ifndef VBOX_WITH_2X_4GB_ADDR_SPACE 2439 2377 pVCpu->pgm.s.apGstPaePDsR0[i] = 0; 2440 # 2378 #endif 2441 2379 pVCpu->pgm.s.apGstPaePDsRC[i] = 0; 2442 2380 pVCpu->pgm.s.aGCPhysGstPaePDs[i] = NIL_RTGCPHYS; … … 2541 2479 else 2542 2480 { 2543 # 2481 #ifdef PGMPOOL_WITH_OPTIMIZED_DIRTY_PT 2544 2482 PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool); 2545 2483 if (pPool->cDirtyPages) … … 2549 2487 pgmUnlock(pVM); 2550 2488 } 2551 # 2489 #endif 2552 2490 /* 2553 2491 * Check if we have a pending update of the CR3 monitoring. … … 2850 2788 /* Flush the TLB */ 2851 2789 PGM_INVL_VCPU_TLBS(pVCpu); 2852 2853 #ifndef IN_RC2854 2790 return PGMHCChangeMode(pVCpu->CTX_SUFF(pVM), pVCpu, enmGuestMode); 2855 #else 2856 LogFlow(("PGMChangeMode: returns VINF_PGM_CHANGE_MODE.\n")); 2857 return VINF_PGM_CHANGE_MODE; 2858 #endif 2859 } 2860 2861 #ifndef IN_RC 2791 } 2792 2862 2793 2863 2794 /** … … 3067 2998 break; 3068 2999 3069 #if HC_ARCH_BITS == 64 || defined(RT_OS_DARWIN)3070 3000 case SUPPAGINGMODE_AMD64: 3071 3001 case SUPPAGINGMODE_AMD64_GLOBAL: … … 3074 3004 enmShadowMode = PGMMODE_NESTED_AMD64; 3075 3005 break; 3076 #endif 3006 3077 3007 default: 3078 3008 AssertLogRelMsgFailedReturn(("enmHostMode=%d\n", pVM->pgm.s.enmHostMode), PGMMODE_INVALID); … … 3251 3181 } 3252 3182 3253 #endif /* !IN_RC */3254 3183 3255 3184 /** … … 3502 3431 int rc = PDMCritSectEnter(&pVM->pgm.s.CritSectX, VERR_SEM_BUSY); 3503 3432 #endif 3504 #if defined(IN_RC) || defined(IN_RING0)3433 #ifdef IN_RING0 3505 3434 if (rc == VERR_SEM_BUSY) 3506 3435 rc = VMMRZCallRing3NoCpu(pVM, VMMCALLRING3_PGM_LOCK, 0); … … 3526 3455 } 3527 3456 3528 #if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)3457 #ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0 3529 3458 3530 3459 /** … … 3571 3500 } 3572 3501 3573 #endif /* IN_RC ||VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0 */3502 #endif /* VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0 */ 3574 3503 #if !defined(IN_R0) || defined(LOG_ENABLED) 3575 3504 … … 3593 3522 szTmp[cch++] = s_achPageStates[PGM_PAGE_GET_STATE_NA(pPage)]; 3594 3523 3595 # define IS_PART_INCLUDED(lvl) ( !(fFlags & RTSTR_F_PRECISION) || cchPrecision == (lvl) || cchPrecision >= (lvl)+10 )3524 # define IS_PART_INCLUDED(lvl) ( !(fFlags & RTSTR_F_PRECISION) || cchPrecision == (lvl) || cchPrecision >= (lvl)+10 ) 3596 3525 if (IS_PART_INCLUDED(5)) 3597 3526 { … … 3630 3559 cch += RTStrFormatNumber(&szTmp[cch], PGM_PAGE_GET_TD_IDX_NA(pPage), 16, 4, 0, RTSTR_F_ZEROPAD | RTSTR_F_16BIT); 3631 3560 } 3632 # undef IS_PART_INCLUDED3561 # undef IS_PART_INCLUDED 3633 3562 3634 3563 cch = pfnOutput(pvArgOutput, szTmp, cch); … … 3764 3693 return cErrors; 3765 3694 } 3766 # endif 3695 # endif /* !PGM_WITHOUT_MAPPINGS */ 3767 3696 3768 3697 -
trunk/src/VBox/VMM/VMMAll/PGMAllBth.h
r80163 r80167 42 42 static int PGM_BTH_NAME(CheckDirtyPageFault)(PVMCPU pVCpu, uint32_t uErr, PSHWPDE pPdeDst, GSTPDE const *pPdeSrc, RTGCPTR GCPtrPage); 43 43 static int PGM_BTH_NAME(SyncPT)(PVMCPU pVCpu, unsigned iPD, PGSTPD pPDSrc, RTGCPTR GCPtrPage); 44 # 44 #if PGM_WITH_PAGING(PGM_GST_TYPE, PGM_SHW_TYPE) 45 45 static void PGM_BTH_NAME(SyncPageWorker)(PVMCPU pVCpu, PSHWPTE pPteDst, GSTPDE PdeSrc, GSTPTE PteSrc, PPGMPOOLPAGE pShwPage, unsigned iPTDst); 46 # 46 #else 47 47 static void PGM_BTH_NAME(SyncPageWorker)(PVMCPU pVCpu, PSHWPTE pPteDst, RTGCPHYS GCPhysPage, PPGMPOOLPAGE pShwPage, unsigned iPTDst); 48 48 #endif … … 686 686 687 687 /* 688 * Check if the fault address is in a virtual page access handler range.689 */690 PPGMVIRTHANDLER pCur = (PPGMVIRTHANDLER)RTAvlroGCPtrRangeGet(&pVM->pgm.s.CTX_SUFF(pTrees)->HyperVirtHandlers,691 pvFault);692 if ( pCur693 && pvFault - pCur->Core.Key < pCur->cb694 && uErr & X86_TRAP_PF_RW)695 {696 VBOXSTRICTRC rcStrict;697 # ifdef IN_RC698 STAM_PROFILE_START(&pCur->Stat, h);699 PPGMVIRTHANDLERTYPEINT pCurType = PGMVIRTANDLER_GET_TYPE(pVM, pCur);700 void *pvUser = pCur->CTX_SUFF(pvUser);701 pgmUnlock(pVM);702 rcStrict = pCurType->CTX_SUFF(pfnPfHandler)(pVM, pVCpu, uErr, pRegFrame, pvFault, pCur->Core.Key,703 pvFault - pCur->Core.Key, pvUser);704 pgmLock(pVM);705 STAM_PROFILE_STOP(&pCur->Stat, h);706 # else707 AssertFailed();708 rcStrict = VINF_EM_RAW_EMULATE_INSTR; /* can't happen with VMX */709 # endif710 STAM_COUNTER_INC(&pVCpu->pgm.s.CTX_SUFF(pStats)->StatRZTrap0eHandlersMapping);711 STAM_STATS({ pVCpu->pgm.s.CTX_SUFF(pStatTrap0eAttribution) = &pVCpu->pgm.s.CTX_SUFF(pStats)->StatRZTrap0eTime2Mapping; });712 return VBOXSTRICTRC_TODO(rcStrict);713 }714 715 /*716 688 * Pretend we're not here and let the guest handle the trap. 717 689 */ … … 765 737 # endif 766 738 767 # if PGM_WITH_PAGING(PGM_GST_TYPE, PGM_SHW_TYPE) && !defined(IN_RING0)768 if (uErr & X86_TRAP_PF_P)769 {770 /*771 * The page isn't marked, but it might still be monitored by a virtual page access handler.772 * (ASSUMES no temporary disabling of virtual handlers.)773 */774 /** @todo r=bird: Since the purpose is to catch out of sync pages with virtual handler(s) here,775 * we should correct both the shadow page table and physical memory flags, and not only check for776 * accesses within the handler region but for access to pages with virtual handlers. */777 PPGMVIRTHANDLER pCur = (PPGMVIRTHANDLER)RTAvlroGCPtrRangeGet(&pVM->pgm.s.CTX_SUFF(pTrees)->VirtHandlers, pvFault);778 if (pCur)779 {780 PPGMVIRTHANDLERTYPEINT pCurType = PGMVIRTANDLER_GET_TYPE(pVM, pCur);781 AssertMsg( !(pvFault - pCur->Core.Key < pCur->cb)782 || ( pCurType->enmKind != PGMVIRTHANDLERKIND_WRITE783 || !(uErr & X86_TRAP_PF_P)784 || (pCurType->enmKind == PGMVIRTHANDLERKIND_WRITE && (uErr & X86_TRAP_PF_RW))),785 ("Unexpected trap for virtual handler: %08X (phys=%08x) %R[pgmpage] uErr=%X, enumKind=%d\n",786 pvFault, GCPhys, pPage, uErr, pCurType->enmKind));787 788 if ( pvFault - pCur->Core.Key < pCur->cb789 && ( uErr & X86_TRAP_PF_RW790 || pCurType->enmKind != PGMVIRTHANDLERKIND_WRITE ) )791 {792 VBOXSTRICTRC rcStrict;793 # ifdef IN_RC794 STAM_PROFILE_START(&pCur->Stat, h);795 void *pvUser = pCur->CTX_SUFF(pvUser);796 pgmUnlock(pVM);797 rcStrict = pCurType->CTX_SUFF(pfnPfHandler)(pVM, pVCpu, uErr, pRegFrame, pvFault, pCur->Core.Key,798 pvFault - pCur->Core.Key, pvUser);799 pgmLock(pVM);800 STAM_PROFILE_STOP(&pCur->Stat, h);801 # else802 rcStrict = VINF_EM_RAW_EMULATE_INSTR; /** @todo for VMX */803 # endif804 STAM_STATS({ pVCpu->pgm.s.CTX_SUFF(pStatTrap0eAttribution) = &pVCpu->pgm.s.CTX_SUFF(pStats)->StatRZTrap0eTime2HndVirt; });805 return VBOXSTRICTRC_TODO(rcStrict);806 }807 }808 }809 # endif /* PGM_WITH_PAGING(PGM_GST_TYPE, PGM_SHW_TYPE) */810 811 739 /* 812 740 * We are here only if page is present in Guest page tables and … … 837 765 } 838 766 839 # if defined(LOG_ENABLED) && !defined(IN_RING0)767 # if defined(LOG_ENABLED) && 0 840 768 RTGCPHYS GCPhys2; 841 769 uint64_t fPageGst2; … … 850 778 # endif /* LOG_ENABLED */ 851 779 852 # if PGM_WITH_PAGING(PGM_GST_TYPE, PGM_SHW_TYPE) && !defined(IN_RING0)853 if ( !GstWalk.Core.fEffectiveUS854 && CSAMIsEnabled(pVM)855 && CPUMGetGuestCPL(pVCpu) == 0)856 {857 /* Note: Can't check for X86_TRAP_ID bit, because that requires execute disable support on the CPU. */858 if ( pvFault == (RTGCPTR)pRegFrame->eip859 || pvFault - pRegFrame->eip < 8 /* instruction crossing a page boundary */860 # ifdef CSAM_DETECT_NEW_CODE_PAGES861 || ( !PATMIsPatchGCAddr(pVM, pRegFrame->eip)862 && CSAMDoesPageNeedScanning(pVM, pRegFrame->eip)) /* any new code we encounter here */863 # endif /* CSAM_DETECT_NEW_CODE_PAGES */864 )865 {866 LogFlow(("CSAMExecFault %RX32\n", pRegFrame->eip));867 rc = CSAMExecFault(pVM, (RTRCPTR)pRegFrame->eip);868 if (rc != VINF_SUCCESS)869 {870 /*871 * CSAM needs to perform a job in ring 3.872 *873 * Sync the page before going to the host context; otherwise we'll end up in a loop if874 * CSAM fails (e.g. instruction crosses a page boundary and the next page is not present)875 */876 LogFlow(("CSAM ring 3 job\n"));877 int rc2 = PGM_BTH_NAME(SyncPage)(pVCpu, GstWalk.Pde, pvFault, 1, uErr);878 AssertRC(rc2);879 880 STAM_STATS({ pVCpu->pgm.s.CTX_SUFF(pStatTrap0eAttribution) = &pVCpu->pgm.s.CTX_SUFF(pStats)->StatRZTrap0eTime2CSAM; });881 return rc;882 }883 }884 # ifdef CSAM_DETECT_NEW_CODE_PAGES885 else if ( uErr == X86_TRAP_PF_RW886 && pRegFrame->ecx >= 0x100 /* early check for movswd count */887 && pRegFrame->ecx < 0x10000)888 {889 /* In case of a write to a non-present supervisor shadow page, we'll take special precautions890 * to detect loading of new code pages.891 */892 893 /*894 * Decode the instruction.895 */896 PDISCPUSTATE pDis = &pVCpu->pgm.s.DisState;897 uint32_t cbOp;898 rc = EMInterpretDisasCurrent(pVM, pVCpu, pDis, &cbOp);899 900 /* For now we'll restrict this to rep movsw/d instructions */901 if ( rc == VINF_SUCCESS902 && pDis->pCurInstr->opcode == OP_MOVSWD903 && (pDis->prefix & DISPREFIX_REP))904 {905 CSAMMarkPossibleCodePage(pVM, pvFault);906 }907 }908 # endif /* CSAM_DETECT_NEW_CODE_PAGES */909 910 /*911 * Mark this page as safe.912 */913 /** @todo not correct for pages that contain both code and data!! */914 Log2(("CSAMMarkPage %RGv; scanned=%d\n", pvFault, true));915 CSAMMarkPage(pVM, pvFault, true);916 }917 # endif /* PGM_WITH_PAGING(PGM_GST_TYPE, PGM_SHW_TYPE) && !defined(IN_RING0) */918 780 # if PGM_WITH_PAGING(PGM_GST_TYPE, PGM_SHW_TYPE) 919 781 rc = PGM_BTH_NAME(SyncPage)(pVCpu, GstWalk.Pde, pvFault, PGM_SYNC_NR_PAGES, uErr); … … 1159 1021 # endif 1160 1022 } 1023 1161 1024 #endif /* !IN_RING3 */ 1162 1025 … … 1184 1047 PGM_BTH_DECL(int, InvalidatePage)(PVMCPU pVCpu, RTGCPTR GCPtrPage) 1185 1048 { 1186 #if PGM_WITH_PAGING(PGM_GST_TYPE, PGM_SHW_TYPE) 1049 #if PGM_WITH_PAGING(PGM_GST_TYPE, PGM_SHW_TYPE) \ 1187 1050 && !PGM_TYPE_IS_NESTED_OR_EPT(PGM_SHW_TYPE) \ 1188 1051 && PGM_SHW_TYPE != PGM_TYPE_NONE … … 2072 1935 RTGCPTR GCPtrCurPage = (GCPtrPage & ~(RTGCPTR)(GST_PT_MASK << GST_PT_SHIFT)) | ((offPTSrc + iPTDst) << PAGE_SHIFT); 2073 1936 NOREF(GCPtrCurPage); 2074 # ifdef VBOX_WITH_RAW_MODE_NOT_R0 2075 /* 2076 * Assuming kernel code will be marked as supervisor - and not as user level 2077 * and executed using a conforming code selector - And marked as readonly. 2078 * Also assume that if we're monitoring a page, it's of no interest to CSAM. 2079 */ 2080 PPGMPAGE pPage; 2081 if ( ((PdeSrc.u & pPteSrc->u) & (X86_PTE_RW | X86_PTE_US)) 2082 || iPTDst == ((GCPtrPage >> SHW_PT_SHIFT) & SHW_PT_MASK) /* always sync GCPtrPage */ 2083 || !CSAMDoesPageNeedScanning(pVM, GCPtrCurPage) 2084 || ( (pPage = pgmPhysGetPage(pVM, pPteSrc->u & GST_PTE_PG_MASK)) 2085 && PGM_PAGE_HAS_ACTIVE_HANDLERS(pPage)) 2086 ) 2087 # endif /* else: CSAM not active */ 2088 PGM_BTH_NAME(SyncPageWorker)(pVCpu, &pPTDst->a[iPTDst], PdeSrc, *pPteSrc, pShwPage, iPTDst); 1937 PGM_BTH_NAME(SyncPageWorker)(pVCpu, &pPTDst->a[iPTDst], PdeSrc, *pPteSrc, pShwPage, iPTDst); 2089 1938 Log2(("SyncPage: 4K+ %RGv PteSrc:{P=%d RW=%d U=%d raw=%08llx} PteDst=%08llx%s\n", 2090 1939 GCPtrCurPage, pPteSrc->n.u1Present, … … 2249 2098 # elif (PGM_GST_TYPE == PGM_TYPE_REAL || PGM_GST_TYPE == PGM_TYPE_PROT) \ 2250 2099 && !PGM_TYPE_IS_NESTED(PGM_SHW_TYPE) \ 2251 && (PGM_SHW_TYPE != PGM_TYPE_EPT || PGM_GST_TYPE == PGM_TYPE_PROT) \ 2252 && !defined(IN_RC) 2100 && (PGM_SHW_TYPE != PGM_TYPE_EPT || PGM_GST_TYPE == PGM_TYPE_PROT) 2253 2101 NOREF(PdeSrc); 2254 2102 … … 2528 2376 const GSTPTE PteSrc = *pPteSrc; 2529 2377 2530 #ifdef VBOX_WITH_RAW_MODE_NOT_R02531 /* Bail out here as pgmPoolGetPage will return NULL and we'll crash below.2532 * Our individual shadow handlers will provide more information and force a fatal exit.2533 */2534 if ( VM_IS_RAW_MODE_ENABLED(pVM)2535 && MMHyperIsInsideArea(pVM, (RTGCPTR)GCPtrPage))2536 {2537 LogRel(("CheckPageFault: write to hypervisor region %RGv\n", GCPtrPage));2538 return VINF_PGM_NO_DIRTY_BIT_TRACKING;2539 }2540 #endif2541 2378 /* 2542 2379 * Map shadow page table. … … 3039 2876 else if (PGM_PAGE_IS_BALLOONED(pPage)) 3040 2877 SHW_PTE_SET(PteDst, 0); /* Handle ballooned pages at #PF time. */ 3041 # ifdef VBOX_WITH_RAW_MODE_NOT_R03042 /*3043 * Assuming kernel code will be marked as supervisor and not as user level and executed3044 * using a conforming code selector. Don't check for readonly, as that implies the whole3045 * 4MB can be code or readonly data. Linux enables write access for its large pages.3046 */3047 else if ( !PdeSrc.n.u1User3048 && CSAMDoesPageNeedScanning(pVM, GCPtr | (iPTDst << SHW_PT_SHIFT)))3049 SHW_PTE_SET(PteDst, 0);3050 # endif3051 2878 else 3052 2879 SHW_PTE_SET(PteDst, PGM_PAGE_GET_HCPHYS(pPage) | SHW_PTE_GET_U(PteDstBase)); … … 3117 2944 && !PGM_TYPE_IS_NESTED(PGM_SHW_TYPE) \ 3118 2945 && (PGM_SHW_TYPE != PGM_TYPE_EPT || PGM_GST_TYPE == PGM_TYPE_PROT) \ 3119 && PGM_SHW_TYPE != PGM_TYPE_NONE \ 3120 && !defined(IN_RC) 2946 && PGM_SHW_TYPE != PGM_TYPE_NONE 3121 2947 NOREF(iPDSrc); NOREF(pPDSrc); 3122 2948 … … 3263 3089 } 3264 3090 } 3265 # endif /* HC_ARCH_BITS == 64*/3091 # endif /* defined(PGM_WITH_LARGE_PAGES) && PGM_SHW_TYPE != PGM_TYPE_32BIT && PGM_SHW_TYPE != PGM_TYPE_PAE */ 3266 3092 3267 3093 /* … … 3752 3578 3753 3579 #ifdef VBOX_STRICT 3754 # ifdef IN_RC3755 # undef AssertMsgFailed3756 # define AssertMsgFailed Log3757 # endif3758 3580 3759 3581 /** … … 4547 4369 AssertReturn(pPageCR3, VERR_PGM_INVALID_CR3_ADDR); 4548 4370 /** @todo this needs some reworking wrt. locking? */ 4549 # if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)4371 # ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0 4550 4372 HCPtrGuestCR3 = NIL_RTHCPTR; 4551 4373 int rc = VINF_SUCCESS; … … 4582 4404 PPGMPAGE pPage = pgmPhysGetPage(pVM, GCPhys); 4583 4405 AssertReturn(pPage, VERR_PGM_INVALID_PDPE_ADDR); 4584 # if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)4406 # ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0 4585 4407 HCPtr = NIL_RTHCPTR; 4586 4408 int rc2 = VINF_SUCCESS; … … 4607 4429 pVCpu->pgm.s.apGstPaePDsRC[i] = 0; 4608 4430 pVCpu->pgm.s.aGCPhysGstPaePDs[i] = NIL_RTGCPHYS; 4609 # ifdef IN_RC4610 PGM_INVL_PG(pVCpu, GCPtr); /** @todo this shouldn't be necessary? */4611 # endif4612 4431 } 4613 4432 … … 4659 4478 rc = VINF_SUCCESS; 4660 4479 4661 # ifdef IN_RC4662 /*4663 * WARNING! We can't deal with jumps to ring 3 in the code below as the4664 * state will be inconsistent! Flush important things now while4665 * we still can and then make sure there are no ring-3 calls.4666 */4667 # ifdef VBOX_WITH_REM4668 REMNotifyHandlerPhysicalFlushIfAlmostFull(pVM, pVCpu);4669 # endif4670 VMMRZCallRing3Disable(pVCpu);4671 # endif4672 4673 4480 pVCpu->pgm.s.CTX_SUFF(pShwPageCR3) = pNewShwPageCR3; 4674 4481 # ifdef IN_RING0 4675 4482 pVCpu->pgm.s.pShwPageCR3R3 = MMHyperCCToR3(pVM, pVCpu->pgm.s.CTX_SUFF(pShwPageCR3)); 4676 4483 pVCpu->pgm.s.pShwPageCR3RC = MMHyperCCToRC(pVM, pVCpu->pgm.s.CTX_SUFF(pShwPageCR3)); 4677 # elif defined(IN_RC)4678 pVCpu->pgm.s.pShwPageCR3R3 = MMHyperCCToR3(pVM, pVCpu->pgm.s.CTX_SUFF(pShwPageCR3));4679 pVCpu->pgm.s.pShwPageCR3R0 = MMHyperCCToR0(pVM, pVCpu->pgm.s.CTX_SUFF(pShwPageCR3));4680 4484 # else 4681 4485 pVCpu->pgm.s.pShwPageCR3R0 = MMHyperCCToR0(pVM, pVCpu->pgm.s.CTX_SUFF(pShwPageCR3)); … … 4698 4502 /* Set the current hypervisor CR3. */ 4699 4503 CPUMSetHyperCR3(pVCpu, PGMGetHyperCR3(pVCpu)); 4700 4701 # ifdef IN_RC4702 /* NOTE: The state is consistent again. */4703 VMMRZCallRing3Enable(pVCpu);4704 # endif4705 4504 4706 4505 /* Clean up the old CR3 root. */ … … 4775 4574 #endif 4776 4575 4777 #if !defined(IN_RC) /* In RC we rely on MapCR3 to do the shadow part for us at a safe time */4778 4576 /* 4779 4577 * Update shadow paging info. 4780 4578 */ 4781 # if ( ( PGM_SHW_TYPE == PGM_TYPE_32BIT \ 4782 || PGM_SHW_TYPE == PGM_TYPE_PAE \ 4783 || PGM_SHW_TYPE == PGM_TYPE_AMD64)) 4784 4785 # if PGM_GST_TYPE != PGM_TYPE_REAL 4579 #if ( ( PGM_SHW_TYPE == PGM_TYPE_32BIT \ 4580 || PGM_SHW_TYPE == PGM_TYPE_PAE \ 4581 || PGM_SHW_TYPE == PGM_TYPE_AMD64)) 4582 # if PGM_GST_TYPE != PGM_TYPE_REAL 4786 4583 Assert(!pVM->pgm.s.fNestedPaging); 4787 # endif 4788 4584 # endif 4789 4585 pgmLock(pVM); 4790 4586 … … 4812 4608 pVCpu->pgm.s.pShwPageCR3RC = 0; 4813 4609 } 4610 4814 4611 pgmUnlock(pVM); 4815 # endif 4816 #endif /* !IN_RC*/ 4612 #endif 4817 4613 4818 4614 return rc; -
trunk/src/VBox/VMM/include/PGMInternal.h
r80163 r80167 2604 2604 /** Physical access handlers (AVL range+offsetptr tree). */ 2605 2605 AVLROGCPHYSTREE PhysHandlers; 2606 #ifdef VBOX_WITH_RAW_MODE2607 /** Virtual access handlers (AVL range + GC ptr tree). */2608 AVLROGCPTRTREE VirtHandlers;2609 /** Virtual access handlers (Phys range AVL range + offsetptr tree).2610 * @remarks Handler of the hypervisor kind are of course not present. */2611 AVLROGCPHYSTREE PhysToVirtHandlers;2612 /** Virtual access handlers for the hypervisor (AVL range + GC ptr tree). */2613 AVLROGCPTRTREE HyperVirtHandlers;2614 /** List of virtual access handler types (offset pointers) of type2615 * PGMVIRTHANDLERTYPEINT. This is needed for relocations. */2616 RTLISTOFF32ANCHOR HeadVirtHandlerTypes;2617 #endif2618 2606 } PGMTREES; 2619 2607 /** Pointer to PGM trees. */
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