Changeset 80253 in vbox for trunk/include
- Timestamp:
- Aug 13, 2019 3:49:33 PM (5 years ago)
- Location:
- trunk/include/VBox
- Files:
-
- 9 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/include/VBox/types.h
r80239 r80253 117 117 /** Pointer to a context specific VM derived structure. 118 118 * This is PGVM in ring-0 and plain PVM in ring-3. */ 119 #if defined(IN_RING0) && defined(VBOX_BUGREF_9217 _PART_I)119 #if defined(IN_RING0) && defined(VBOX_BUGREF_9217) 120 120 typedef PGVM PVMCC; 121 121 #else … … 124 124 /** Pointer to a const context specific VM derived structure. 125 125 * This is PCGVM in ring-0 and plain PCVM in ring-3. */ 126 #if defined(IN_RING0) && defined(VBOX_BUGREF_9217 _PART_I)126 #if defined(IN_RING0) && defined(VBOX_BUGREF_9217) 127 127 typedef PCGVM PCVMCC; 128 128 #else … … 131 131 /** Pointer to a context specific VMCPUM derived structure. 132 132 * This is PGVMCPU in ring-0 and plain PVMCPU in ring-3. */ 133 #if defined(IN_RING0) && defined(VBOX_BUGREF_9217 _PART_I)133 #if defined(IN_RING0) && defined(VBOX_BUGREF_9217) 134 134 typedef PGVMCPU PVMCPUCC; 135 135 #else … … 138 138 /** Pointer to a const context specific VMCPU derived structure. 139 139 * This is PCGVMCPU in ring-0 and plain PCVMCPU in ring-3. */ 140 #if defined(IN_RING0) && defined(VBOX_BUGREF_9217 _PART_I)140 #if defined(IN_RING0) && defined(VBOX_BUGREF_9217) 141 141 typedef PCGVMCPU PCVMCPUCC; 142 142 #else -
trunk/include/VBox/vmm/apic.h
r80062 r80253 168 168 169 169 /* These functions are exported as they are called from external modules (recompiler). */ 170 VMMDECL(void) APICUpdatePendingInterrupts(PVMCPU pVCpu);171 VMMDECL(int) APICGetTpr(PCVMCPU pVCpu, uint8_t *pu8Tpr, bool *pfPending, uint8_t *pu8PendingIntr);172 VMMDECL(int) APICSetTpr(PVMCPU pVCpu, uint8_t u8Tpr);170 VMMDECL(void) APICUpdatePendingInterrupts(PVMCPUCC pVCpu); 171 VMMDECL(int) APICGetTpr(PCVMCPUCC pVCpu, uint8_t *pu8Tpr, bool *pfPending, uint8_t *pu8PendingIntr); 172 VMMDECL(int) APICSetTpr(PVMCPUCC pVCpu, uint8_t u8Tpr); 173 173 174 174 /* These functions are VMM internal. */ 175 VMM_INT_DECL(bool) APICIsEnabled(PCVMCPU pVCpu);176 VMM_INT_DECL(bool) APICGetHighestPendingInterrupt(PVMCPU pVCpu, uint8_t *pu8PendingIntr);177 VMM_INT_DECL(bool) APICQueueInterruptToService(PVMCPU pVCpu, uint8_t u8PendingIntr);178 VMM_INT_DECL(void) APICDequeueInterruptFromService(PVMCPU pVCpu, uint8_t u8PendingIntr);179 VMM_INT_DECL(VBOXSTRICTRC) APICReadMsr(PVMCPU pVCpu, uint32_t u32Reg, uint64_t *pu64Value);180 VMM_INT_DECL(VBOXSTRICTRC) APICWriteMsr(PVMCPU pVCpu, uint32_t u32Reg, uint64_t u64Value);181 VMM_INT_DECL(int) APICGetTimerFreq(PVM pVM, uint64_t *pu64Value);182 VMM_INT_DECL(VBOXSTRICTRC) APICLocalInterrupt(PVMCPU pVCpu, uint8_t u8Pin, uint8_t u8Level, int rcRZ);183 VMM_INT_DECL(uint64_t) APICGetBaseMsrNoCheck(PCVMCPU pVCpu);184 VMM_INT_DECL(VBOXSTRICTRC) APICGetBaseMsr(PVMCPU pVCpu, uint64_t *pu64Value);185 VMM_INT_DECL(int) APICSetBaseMsr(PVMCPU pVCpu, uint64_t u64BaseMsr);186 VMM_INT_DECL(int) APICGetInterrupt(PVMCPU pVCpu, uint8_t *pu8Vector, uint32_t *pu32TagSrc);175 VMM_INT_DECL(bool) APICIsEnabled(PCVMCPUCC pVCpu); 176 VMM_INT_DECL(bool) APICGetHighestPendingInterrupt(PVMCPUCC pVCpu, uint8_t *pu8PendingIntr); 177 VMM_INT_DECL(bool) APICQueueInterruptToService(PVMCPUCC pVCpu, uint8_t u8PendingIntr); 178 VMM_INT_DECL(void) APICDequeueInterruptFromService(PVMCPUCC pVCpu, uint8_t u8PendingIntr); 179 VMM_INT_DECL(VBOXSTRICTRC) APICReadMsr(PVMCPUCC pVCpu, uint32_t u32Reg, uint64_t *pu64Value); 180 VMM_INT_DECL(VBOXSTRICTRC) APICWriteMsr(PVMCPUCC pVCpu, uint32_t u32Reg, uint64_t u64Value); 181 VMM_INT_DECL(int) APICGetTimerFreq(PVMCC pVM, uint64_t *pu64Value); 182 VMM_INT_DECL(VBOXSTRICTRC) APICLocalInterrupt(PVMCPUCC pVCpu, uint8_t u8Pin, uint8_t u8Level, int rcRZ); 183 VMM_INT_DECL(uint64_t) APICGetBaseMsrNoCheck(PCVMCPUCC pVCpu); 184 VMM_INT_DECL(VBOXSTRICTRC) APICGetBaseMsr(PVMCPUCC pVCpu, uint64_t *pu64Value); 185 VMM_INT_DECL(int) APICSetBaseMsr(PVMCPUCC pVCpu, uint64_t u64BaseMsr); 186 VMM_INT_DECL(int) APICGetInterrupt(PVMCPUCC pVCpu, uint8_t *pu8Vector, uint32_t *pu32TagSrc); 187 187 VMM_INT_DECL(int) APICBusDeliver(PVM pVM, uint8_t uDest, uint8_t uDestMode, uint8_t uDeliveryMode, uint8_t uVector, 188 188 uint8_t uPolarity, uint8_t uTriggerMode, uint32_t uTagSrc); 189 VMM_INT_DECL(int) APICGetApicPageForCpu(PCVMCPU pVCpu, PRTHCPHYS pHCPhys, PRTR0PTR pR0Ptr, PRTR3PTR pR3Ptr);189 VMM_INT_DECL(int) APICGetApicPageForCpu(PCVMCPUCC pVCpu, PRTHCPHYS pHCPhys, PRTR0PTR pR0Ptr, PRTR3PTR pR3Ptr); 190 190 191 191 /** @name Hyper-V interface (Ring-3 and all-context API). … … 194 194 VMMR3_INT_DECL(void) APICR3HvSetCompatMode(PVM pVM, bool fHyperVCompatMode); 195 195 #endif 196 VMM_INT_DECL(void) APICHvSendInterrupt(PVMCPU pVCpu, uint8_t uVector, bool fAutoEoi, XAPICTRIGGERMODE enmTriggerMode);197 VMM_INT_DECL(VBOXSTRICTRC) APICHvSetTpr(PVMCPU pVCpu, uint8_t uTpr);198 VMM_INT_DECL(uint8_t) APICHvGetTpr(PVMCPU pVCpu);199 VMM_INT_DECL(VBOXSTRICTRC) APICHvSetIcr(PVMCPU pVCpu, uint64_t uIcr);200 VMM_INT_DECL(uint64_t) APICHvGetIcr(PVMCPU pVCpu);201 VMM_INT_DECL(VBOXSTRICTRC) APICHvSetEoi(PVMCPU pVCpu, uint32_t uEoi);196 VMM_INT_DECL(void) APICHvSendInterrupt(PVMCPUCC pVCpu, uint8_t uVector, bool fAutoEoi, XAPICTRIGGERMODE enmTriggerMode); 197 VMM_INT_DECL(VBOXSTRICTRC) APICHvSetTpr(PVMCPUCC pVCpu, uint8_t uTpr); 198 VMM_INT_DECL(uint8_t) APICHvGetTpr(PVMCPUCC pVCpu); 199 VMM_INT_DECL(VBOXSTRICTRC) APICHvSetIcr(PVMCPUCC pVCpu, uint64_t uIcr); 200 VMM_INT_DECL(uint64_t) APICHvGetIcr(PVMCPUCC pVCpu); 201 VMM_INT_DECL(VBOXSTRICTRC) APICHvSetEoi(PVMCPUCC pVCpu, uint32_t uEoi); 202 202 /** @} */ 203 203 -
trunk/include/VBox/vmm/cpum.h
r80069 r80253 1376 1376 VMMDECL(uint64_t) CPUMGetGuestCR3(PCVMCPU pVCpu); 1377 1377 VMMDECL(uint64_t) CPUMGetGuestCR4(PCVMCPU pVCpu); 1378 VMMDECL(uint64_t) CPUMGetGuestCR8(PCVMCPU pVCpu);1379 VMMDECL(int) CPUMGetGuestCRx(PCVMCPU pVCpu, unsigned iReg, uint64_t *pValue);1378 VMMDECL(uint64_t) CPUMGetGuestCR8(PCVMCPUCC pVCpu); 1379 VMMDECL(int) CPUMGetGuestCRx(PCVMCPUCC pVCpu, unsigned iReg, uint64_t *pValue); 1380 1380 VMMDECL(uint32_t) CPUMGetGuestEFlags(PCVMCPU pVCpu); 1381 1381 VMMDECL(uint32_t) CPUMGetGuestEIP(PCVMCPU pVCpu); … … 1404 1404 VMMDECL(uint64_t) CPUMGetGuestDR7(PCVMCPU pVCpu); 1405 1405 VMMDECL(int) CPUMGetGuestDRx(PCVMCPU pVCpu, uint32_t iReg, uint64_t *pValue); 1406 VMMDECL(void) CPUMGetGuestCpuId(PVMCPU pVCpu, uint32_t iLeaf, uint32_t iSubLeaf,1406 VMMDECL(void) CPUMGetGuestCpuId(PVMCPUCC pVCpu, uint32_t iLeaf, uint32_t iSubLeaf, 1407 1407 uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx); 1408 1408 VMMDECL(uint64_t) CPUMGetGuestEFER(PCVMCPU pVCpu); … … 1421 1421 VMMDECL(int) CPUMSetGuestTR(PVMCPU pVCpu, uint16_t tr); 1422 1422 VMMDECL(int) CPUMSetGuestLDTR(PVMCPU pVCpu, uint16_t ldtr); 1423 VMMDECL(int) CPUMSetGuestCR0(PVMCPU pVCpu, uint64_t cr0);1423 VMMDECL(int) CPUMSetGuestCR0(PVMCPUCC pVCpu, uint64_t cr0); 1424 1424 VMMDECL(int) CPUMSetGuestCR2(PVMCPU pVCpu, uint64_t cr2); 1425 1425 VMMDECL(int) CPUMSetGuestCR3(PVMCPU pVCpu, uint64_t cr3); 1426 1426 VMMDECL(int) CPUMSetGuestCR4(PVMCPU pVCpu, uint64_t cr4); 1427 VMMDECL(int) CPUMSetGuestDR0(PVMCPU pVCpu, uint64_t uDr0);1428 VMMDECL(int) CPUMSetGuestDR1(PVMCPU pVCpu, uint64_t uDr1);1429 VMMDECL(int) CPUMSetGuestDR2(PVMCPU pVCpu, uint64_t uDr2);1430 VMMDECL(int) CPUMSetGuestDR3(PVMCPU pVCpu, uint64_t uDr3);1427 VMMDECL(int) CPUMSetGuestDR0(PVMCPUCC pVCpu, uint64_t uDr0); 1428 VMMDECL(int) CPUMSetGuestDR1(PVMCPUCC pVCpu, uint64_t uDr1); 1429 VMMDECL(int) CPUMSetGuestDR2(PVMCPUCC pVCpu, uint64_t uDr2); 1430 VMMDECL(int) CPUMSetGuestDR3(PVMCPUCC pVCpu, uint64_t uDr3); 1431 1431 VMMDECL(int) CPUMSetGuestDR6(PVMCPU pVCpu, uint64_t uDr6); 1432 VMMDECL(int) CPUMSetGuestDR7(PVMCPU pVCpu, uint64_t uDr7);1433 VMMDECL(int) CPUMSetGuestDRx(PVMCPU pVCpu, uint32_t iReg, uint64_t Value);1434 VMM_INT_DECL(int) CPUMSetGuestXcr0(PVMCPU pVCpu, uint64_t uNewValue);1432 VMMDECL(int) CPUMSetGuestDR7(PVMCPUCC pVCpu, uint64_t uDr7); 1433 VMMDECL(int) CPUMSetGuestDRx(PVMCPUCC pVCpu, uint32_t iReg, uint64_t Value); 1434 VMM_INT_DECL(int) CPUMSetGuestXcr0(PVMCPUCC pVCpu, uint64_t uNewValue); 1435 1435 VMMDECL(int) CPUMSetGuestEFlags(PVMCPU pVCpu, uint32_t eflags); 1436 1436 VMMDECL(int) CPUMSetGuestEIP(PVMCPU pVCpu, uint32_t eip); … … 1489 1489 VMM_INT_DECL(bool) CPUMIsGuestSvmVirtIntrEnabled(PCVMCPU pVCpu, PCCPUMCTX pCtx); 1490 1490 VMM_INT_DECL(uint8_t) CPUMGetGuestSvmVirtIntrVector(PCCPUMCTX pCtx); 1491 VMM_INT_DECL(void) CPUMSvmVmExitRestoreHostState(PVMCPU pVCpu, PCPUMCTX pCtx);1491 VMM_INT_DECL(void) CPUMSvmVmExitRestoreHostState(PVMCPUCC pVCpu, PCPUMCTX pCtx); 1492 1492 VMM_INT_DECL(void) CPUMSvmVmRunSaveHostState(PCPUMCTX pCtx, uint8_t cbInstr); 1493 1493 VMM_INT_DECL(bool) CPUMIsSvmIoInterceptSet(void *pvIoBitmap, uint16_t u16Port, SVMIOIOTYPE enmIoType, uint8_t cbReg, … … 1497 1497 1498 1498 /* VMX helpers. */ 1499 VMM_INT_DECL(bool) CPUMIsGuestVmxVmcsFieldValid(PVM pVM, uint64_t u64VmcsField);1499 VMM_INT_DECL(bool) CPUMIsGuestVmxVmcsFieldValid(PVMCC pVM, uint64_t u64VmcsField); 1500 1500 VMM_INT_DECL(bool) CPUMIsGuestVmxIoInterceptSet(PCVMCPU pVCpu, uint16_t u16Port, uint8_t cbAccess); 1501 1501 VMM_INT_DECL(bool) CPUMIsGuestVmxMovToCr3InterceptSet(PVMCPU pVCpu, uint64_t uNewCr3); … … 1567 1567 } while (0) 1568 1568 1569 VMM_INT_DECL(int) CPUMImportGuestStateOnDemand(PVMCPU pVCpu, uint64_t fExtrnImport);1569 VMM_INT_DECL(int) CPUMImportGuestStateOnDemand(PVMCPUCC pVCpu, uint64_t fExtrnImport); 1570 1570 /** @} */ 1571 1571 … … 2514 2514 VMMDECL(void) CPUMSetHyperDR6(PVMCPU pVCpu, RTGCUINTREG uDr6); 2515 2515 VMMDECL(void) CPUMSetHyperDR7(PVMCPU pVCpu, RTGCUINTREG uDr7); 2516 VMMDECL(int) CPUMRecalcHyperDRx(PVMCPU pVCpu, uint8_t iGstReg, bool fForceHyper);2516 VMMDECL(int) CPUMRecalcHyperDRx(PVMCPUCC pVCpu, uint8_t iGstReg, bool fForceHyper); 2517 2517 /** @} */ 2518 2518 -
trunk/include/VBox/vmm/em.h
r80074 r80253 246 246 typedef EMEXITREC const *PCEMEXITREC; 247 247 248 VMM_INT_DECL(PCEMEXITREC) EMHistoryAddExit(PVMCPU pVCpu, uint32_t uFlagsAndType, uint64_t uFlatPC, uint64_t uTimestamp);248 VMM_INT_DECL(PCEMEXITREC) EMHistoryAddExit(PVMCPUCC pVCpu, uint32_t uFlagsAndType, uint64_t uFlatPC, uint64_t uTimestamp); 249 249 #ifdef IN_RC 250 250 VMMRC_INT_DECL(void) EMRCHistoryAddExitCsEip(PVMCPU pVCpu, uint32_t uFlagsAndType, uint16_t uCs, uint32_t uEip, … … 254 254 VMMR0_INT_DECL(void) EMR0HistoryUpdatePC(PVMCPU pVCpu, uint64_t uFlatPC, bool fFlattened); 255 255 #endif 256 VMM_INT_DECL(PCEMEXITREC) EMHistoryUpdateFlagsAndType(PVMCPU pVCpu, uint32_t uFlagsAndType);257 VMM_INT_DECL(PCEMEXITREC) EMHistoryUpdateFlagsAndTypeAndPC(PVMCPU pVCpu, uint32_t uFlagsAndType, uint64_t uFlatPC);258 VMM_INT_DECL(VBOXSTRICTRC) EMHistoryExec(PVMCPU pVCpu, PCEMEXITREC pExitRec, uint32_t fWillExit);256 VMM_INT_DECL(PCEMEXITREC) EMHistoryUpdateFlagsAndType(PVMCPUCC pVCpu, uint32_t uFlagsAndType); 257 VMM_INT_DECL(PCEMEXITREC) EMHistoryUpdateFlagsAndTypeAndPC(PVMCPUCC pVCpu, uint32_t uFlagsAndType, uint64_t uFlatPC); 258 VMM_INT_DECL(VBOXSTRICTRC) EMHistoryExec(PVMCPUCC pVCpu, PCEMEXITREC pExitRec, uint32_t fWillExit); 259 259 260 260 … … 269 269 RTGCPTR pvFault, EMCODETYPE enmCodeType); 270 270 VMM_INT_DECL(int) EMInterpretRdpmc(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame); 271 VMM_INT_DECL(int) EMInterpretDRxWrite(PVM pVM, PVMCPUpVCpu, PCPUMCTXCORE pRegFrame, uint32_t DestRegDrx, uint32_t SrcRegGen);271 VMM_INT_DECL(int) EMInterpretDRxWrite(PVMCC pVM, PVMCPUCC pVCpu, PCPUMCTXCORE pRegFrame, uint32_t DestRegDrx, uint32_t SrcRegGen); 272 272 VMM_INT_DECL(int) EMInterpretDRxRead(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, uint32_t DestRegGen, uint32_t SrcRegDrx); 273 273 /** @} */ -
trunk/include/VBox/vmm/gvm.h
r78438 r80253 35 35 # include <VBox/vmm/vm.h> 36 36 #endif 37 #include <VBox/param.h> 37 38 #include <iprt/thread.h> 38 39 #include <iprt/assertcompile.h> … … 73 74 /** Pointer to the corresponding cross context VM structure. */ 74 75 PVM pVM; 76 #else 77 /** Pointer to the GVM structure, for CTX_SUFF use in VMMAll code. */ 78 PGVM pVMR0; 75 79 #endif 76 80 77 81 /** Padding so gvmm starts on a 64 byte boundrary. */ 78 82 #ifdef VBOX_BUGREF_9217 79 uint8_t abPadding[ HC_ARCH_BITS == 32 ? 48 : 40];80 #else 81 uint8_t abPadding[ HC_ARCH_BITS == 32 ? 4*4 + 24 :24];83 uint8_t abPadding[32]; 84 #else 85 uint8_t abPadding[24]; 82 86 #endif 83 87 … … 225 229 /** Padding so aCpus starts on a page boundrary. */ 226 230 # ifdef VBOX_WITH_NEM_R0 227 uint8_t abPadding2[4096 - 64 - 256 - 512 - 256 - 64]; 228 # else 229 uint8_t abPadding2[4096 - 64 - 256 - 512 - 64]; 230 # endif 231 #endif 231 uint8_t abPadding2[4096 - 64 - 256 - 512 - 256 - 64 - sizeof(PGVMCPU) * VMM_MAX_CPU_COUNT]; 232 # else 233 uint8_t abPadding2[4096 - 64 - 256 - 512 - 64 - sizeof(PGVMCPU) * VMM_MAX_CPU_COUNT]; 234 # endif 235 #endif 236 /** For simplifying CPU enumeration in VMMAll code. */ 237 PGVMCPU apCpusR0[VMM_MAX_CPU_COUNT]; 232 238 233 239 /** GVMCPU array for the configured number of virtual CPUs. */ … … 249 255 AssertCompileMemberOffset(GVM, nem, 64 + 256 + 512); 250 256 AssertCompileMemberOffset(GVM, rawpci, 64 + 256 + 512 + 256); 251 AssertCompileMemberOffset(GVM, aCpus, 64 + 256 + 512 + 256 + 64 );257 AssertCompileMemberOffset(GVM, aCpus, 64 + 256 + 512 + 256 + 64 + sizeof(PGVMCPU) * VMM_MAX_CPU_COUNT); 252 258 # else 253 259 AssertCompileMemberOffset(GVM, rawpci, 64 + 256 + 512); 254 AssertCompileMemberOffset(GVM, aCpus, 64 + 256 + 512 + 64 );260 AssertCompileMemberOffset(GVM, aCpus, 64 + 256 + 512 + 64 + sizeof(PGVMCPU) * VMM_MAX_CPU_COUNT); 255 261 # endif 256 262 #endif -
trunk/include/VBox/vmm/pdmdev.h
r80153 r80253 3448 3448 * @param pDevIns The device instance. 3449 3449 */ 3450 DECLR3CALLBACKMEMBER(PVM , pfnGetVM,(PPDMDEVINS pDevIns));3450 DECLR3CALLBACKMEMBER(PVMCC, pfnGetVM,(PPDMDEVINS pDevIns)); 3451 3451 3452 3452 /** … … 3815 3815 * @param pDevIns Device instance. 3816 3816 */ 3817 DECLRCCALLBACKMEMBER(PVM , pfnGetVM,(PPDMDEVINS pDevIns));3817 DECLRCCALLBACKMEMBER(PVMCC, pfnGetVM,(PPDMDEVINS pDevIns)); 3818 3818 3819 3819 /** … … 3823 3823 * @param pDevIns The device instance. 3824 3824 */ 3825 DECLRCCALLBACKMEMBER(PVMCPU , pfnGetVMCPU,(PPDMDEVINS pDevIns));3825 DECLRCCALLBACKMEMBER(PVMCPUCC, pfnGetVMCPU,(PPDMDEVINS pDevIns)); 3826 3826 3827 3827 /** … … 4076 4076 * @param pDevIns Device instance. 4077 4077 */ 4078 DECLR0CALLBACKMEMBER(PVM , pfnGetVM,(PPDMDEVINS pDevIns));4078 DECLR0CALLBACKMEMBER(PVMCC, pfnGetVM,(PPDMDEVINS pDevIns)); 4079 4079 4080 4080 /** … … 4084 4084 * @param pDevIns The device instance. 4085 4085 */ 4086 DECLR0CALLBACKMEMBER(PVMCPU , pfnGetVMCPU,(PPDMDEVINS pDevIns));4086 DECLR0CALLBACKMEMBER(PVMCPUCC, pfnGetVMCPU,(PPDMDEVINS pDevIns)); 4087 4087 4088 4088 /** … … 5405 5405 * @copydoc PDMDEVHLPR3::pfnGetVM 5406 5406 */ 5407 DECLINLINE(PVM ) PDMDevHlpGetVM(PPDMDEVINS pDevIns)5407 DECLINLINE(PVMCC) PDMDevHlpGetVM(PPDMDEVINS pDevIns) 5408 5408 { 5409 5409 return pDevIns->CTX_SUFF(pHlp)->pfnGetVM(pDevIns); … … 5413 5413 * @copydoc PDMDEVHLPR3::pfnGetVMCPU 5414 5414 */ 5415 DECLINLINE(PVMCPU ) PDMDevHlpGetVMCPU(PPDMDEVINS pDevIns)5415 DECLINLINE(PVMCPUCC) PDMDevHlpGetVMCPU(PPDMDEVINS pDevIns) 5416 5416 { 5417 5417 return pDevIns->CTX_SUFF(pHlp)->pfnGetVMCPU(pDevIns); -
trunk/include/VBox/vmm/vm.h
r80191 r80253 149 149 /** Ring-3 Host Context VM Pointer. */ 150 150 PVMR3 pVMR3; 151 #ifndef VBOX_BUGREF_9217 151 152 /** Ring-0 Host Context VM Pointer. */ 152 153 PVMR0 pVMR0; 154 #else 155 RTR0PTR R0PtrUnused1; 156 #endif 153 157 /** Raw-mode Context VM Pointer. */ 154 158 uint32_t pVMRC; … … 1431 1435 /** Padding for aligning the structure size on a page boundrary. */ 1432 1436 #ifdef VBOX_WITH_REM 1433 uint8_t abAlignment2[2520 ];1434 #else 1435 uint8_t abAlignment2[2520 + 256 ];1437 uint8_t abAlignment2[2520 - sizeof(PVMCPUR0) * VMM_MAX_CPU_COUNT]; 1438 #else 1439 uint8_t abAlignment2[2520 + 256 - sizeof(PVMCPUR0) * VMM_MAX_CPU_COUNT]; 1436 1440 #endif 1437 1441 1438 1442 /* ---- end small stuff ---- */ 1439 1440 /** Array of VMCPU pointers. */ 1443 #if !defined(VBOX_BUGREF_9217) 1444 /** Array of VMCPU ring-0 pointers. This is temporary as these will 1445 * live in GVM. */ 1446 PVMCPUR0 apCpusR0[VMM_MAX_CPU_COUNT]; 1447 #else 1448 PVMCPUR0 apPaddingR0[VMM_MAX_CPU_COUNT]; 1449 #endif 1450 1451 /** Array of VMCPU ring-3 pointers. */ 1441 1452 PVMCPUR3 apCpusR3[VMM_MAX_CPU_COUNT]; 1442 1453 #if !defined(VBOX_BUGREF_9217) && !defined(VBOX_BUGREF_9217_PART_I) -
trunk/include/VBox/vmm/vm.mac
r80135 r80253 28 28 29 29 %include "VBox/vmm/stam.mac" 30 %include "VBox/param.mac" 30 31 31 32 ;/** This action forces the VM to service check and pending interrups on the APIC. */ … … 139 140 .vm resb 32 140 141 .cfgm resb 8 142 143 %ifdef VBOX_WITH_REM 144 .abAlignment2 resb 2520 - RTR0PTR_CB * VMM_MAX_CPU_COUNT 145 %else 146 .abAlignment2 resb 2520 + 256 - RTR0PTR_CB * VMM_MAX_CPU_COUNT 147 %endif 148 149 alignb RTR0PTR_CB * VMM_MAX_CPU_COUNT ; ASSUMES VMM_MAX_CPU_COUNT is a power of two. 150 %ifndef VBOX_BUGREF_9217 151 .apCpusR0 RTR0PTR_RES VMM_MAX_CPU_COUNT 152 %else 153 .apPaddingR0 RTR0PTR_RES VMM_MAX_CPU_COUNT 154 %endif 155 .apCpusR3 RTR3PTR_RES VMM_MAX_CPU_COUNT 156 %ifndef VBOX_BUGREF_9217 157 %ifndef VBOX_BUGREF_9217_PART_I 141 158 alignb 4096 142 159 .aCpus resb VMCPU_size 160 %endif 161 %endif 162 143 163 endstruc 144 164 -
trunk/include/VBox/vmm/vmcc.h
r80239 r80253 52 52 #endif 53 53 54 /** @def VMCC_FOR_EACH_VMCPU 55 * For enumerating VCpus in ascending order, avoiding unnecessary apCpusR0 56 * access in ring-0. 57 * @note Close loop with VMCC_FOR_EACH_VMCPU_END. */ 58 #ifdef IN_RING0 59 # define VMCC_FOR_EACH_VMCPU(a_pVM) \ 60 for (VMCPUID idCpu = 0; idCpu < (a_pVM)->cCpus; idCpu++) \ 61 { \ 62 PVMCPU pVCpu = &(a_pVM)->aCpus[idCpu]; 63 #else 64 # define VMCC_FOR_EACH_VMCPU(a_pVM) \ 65 for (VMCPUID idCpu = 0; idCpu < (a_pVM)->cCpus; idCpu++) \ 66 { \ 67 PVMCPU pVCpu = (a_pVM)->apCpusR3[idCpu]; 68 #endif 69 /** Ends a VMCC_FOR_EACH_VMCPU loop. */ 70 #define VMCC_FOR_EACH_VMCPU_END() } do { } while (0) 71 72 54 73 #endif /* !VBOX_INCLUDED_vmm_vmcc_h */ 55 74
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