Changeset 80281 in vbox for trunk/src/VBox/VMM
- Timestamp:
- Aug 15, 2019 7:29:37 AM (6 years ago)
- svn:sync-xref-src-repo-rev:
- 132736
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 61 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMAll/CPUMAllMsrs.cpp
r80253 r80281 847 847 uValue &= ~((UINT64_C(0x1f) << 40) | RT_BIT_64(46)); 848 848 849 PVM 849 PVMCC pVM = pVCpu->CTX_SUFF(pVM); 850 850 uint64_t uScalableBusHz = CPUMGetGuestScalableBusFrequency(pVM); 851 851 uint64_t uTscHz = TMCpuTicksPerSecond(pVM); … … 1800 1800 1801 1801 uint64_t uValue; 1802 PVM 1802 PVMCC pVM = pVCpu->CTX_SUFF(pVM); 1803 1803 uint64_t uScalableBusHz = CPUMGetGuestScalableBusFrequency(pVM); 1804 1804 if (pVM->cpum.s.GuestFeatures.uModel >= 2) … … 1897 1897 1898 1898 /* Just indicate a fixed TSC, no turbo boost, no programmable anything. */ 1899 PVM 1899 PVMCC pVM = pVCpu->CTX_SUFF(pVM); 1900 1900 uint64_t uScalableBusHz = CPUMGetGuestScalableBusFrequency(pVM); 1901 1901 uint64_t uTscHz = TMCpuTicksPerSecond(pVM); … … 1920 1920 uint64_t uValue = pRange->uValue & ~UINT64_C(0x1ff00); 1921 1921 1922 PVM 1922 PVMCC pVM = pVCpu->CTX_SUFF(pVM); 1923 1923 uint64_t uScalableBusHz = CPUMGetGuestScalableBusFrequency(pVM); 1924 1924 uint64_t uTscHz = TMCpuTicksPerSecond(pVM); -
trunk/src/VBox/VMM/VMMAll/EMAll.cpp
r80253 r80281 308 308 * @thread EMT 309 309 */ 310 VMM_INT_DECL(int) EMUnhaltAndWakeUp(PVM pVM, PVMCPUpVCpuDst)310 VMM_INT_DECL(int) EMUnhaltAndWakeUp(PVMCC pVM, PVMCPUCC pVCpuDst) 311 311 { 312 312 /* … … 327 327 328 328 #elif defined(IN_RING3) 329 int rc = SUPR3CallVMMR0( pVM->pVMR0, pVCpuDst->idCpu, VMMR0_DO_GVMM_SCHED_WAKE_UP, NULL /* pvArg */);329 int rc = SUPR3CallVMMR0(VMCC_GET_VMR0_FOR_CALL(pVM), pVCpuDst->idCpu, VMMR0_DO_GVMM_SCHED_WAKE_UP, NULL /* pvArg */); 330 330 AssertRC(rc); 331 331 … … 972 972 static DECLCALLBACK(int) emReadBytes(PDISCPUSTATE pDis, uint8_t offInstr, uint8_t cbMinRead, uint8_t cbMaxRead) 973 973 { 974 PVMCPU pVCpu = (PVMCPU)pDis->pvUser;974 PVMCPUCC pVCpu = (PVMCPUCC)pDis->pvUser; 975 975 RTUINTPTR uSrcAddr = pDis->uInstrAddr + offInstr; 976 976 … … 1025 1025 * @param pcbInstr Where to return the instruction size. (optional) 1026 1026 */ 1027 VMM_INT_DECL(int) EMInterpretDisasCurrent(PVM pVM, PVMCPUpVCpu, PDISCPUSTATE pDis, unsigned *pcbInstr)1027 VMM_INT_DECL(int) EMInterpretDisasCurrent(PVMCC pVM, PVMCPUCC pVCpu, PDISCPUSTATE pDis, unsigned *pcbInstr) 1028 1028 { 1029 1029 PCPUMCTXCORE pCtxCore = CPUMCTX2CORE(CPUMQueryGuestCtxPtr(pVCpu)); … … 1060 1060 * @param pcbInstr Where to return the instruction size. (optional) 1061 1061 */ 1062 VMM_INT_DECL(int) EMInterpretDisasOneEx(PVM pVM, PVMCPUpVCpu, RTGCUINTPTR GCPtrInstr, PCCPUMCTXCORE pCtxCore,1062 VMM_INT_DECL(int) EMInterpretDisasOneEx(PVMCC pVM, PVMCPUCC pVCpu, RTGCUINTPTR GCPtrInstr, PCCPUMCTXCORE pCtxCore, 1063 1063 PDISCPUSTATE pDis, unsigned *pcbInstr) 1064 1064 { … … 1093 1093 * to worry about e.g. invalid modrm combinations (!) 1094 1094 */ 1095 VMM_INT_DECL(VBOXSTRICTRC) EMInterpretInstruction(PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault)1095 VMM_INT_DECL(VBOXSTRICTRC) EMInterpretInstruction(PVMCPUCC pVCpu, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault) 1096 1096 { 1097 1097 Assert(pRegFrame == CPUMGetGuestCtxCore(pVCpu)); … … 1128 1128 * to worry about e.g. invalid modrm combinations (!) 1129 1129 */ 1130 VMM_INT_DECL(VBOXSTRICTRC) EMInterpretInstructionEx(PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, uint32_t *pcbWritten)1130 VMM_INT_DECL(VBOXSTRICTRC) EMInterpretInstructionEx(PVMCPUCC pVCpu, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, uint32_t *pcbWritten) 1131 1131 { 1132 1132 LogFlow(("EMInterpretInstructionEx %RGv fault %RGv\n", (RTGCPTR)pRegFrame->rip, pvFault)); … … 1171 1171 * Make sure this can't happen!! (will add some assertions/checks later) 1172 1172 */ 1173 VMM_INT_DECL(VBOXSTRICTRC) EMInterpretInstructionDisasState(PVMCPU pVCpu, PDISCPUSTATE pDis, PCPUMCTXCORE pRegFrame,1173 VMM_INT_DECL(VBOXSTRICTRC) EMInterpretInstructionDisasState(PVMCPUCC pVCpu, PDISCPUSTATE pDis, PCPUMCTXCORE pRegFrame, 1174 1174 RTGCPTR pvFault, EMCODETYPE enmCodeType) 1175 1175 { -
trunk/src/VBox/VMM/VMMAll/GIMAll.cpp
r80268 r80281 241 241 * @param pVM The cross context VM structure. 242 242 */ 243 VMM_INT_DECL(bool) GIMIsParavirtTscEnabled(PVM pVM)243 VMM_INT_DECL(bool) GIMIsParavirtTscEnabled(PVMCC pVM) 244 244 { 245 245 switch (pVM->gim.s.enmProviderId) -
trunk/src/VBox/VMM/VMMAll/GIMAllKvm.cpp
r80268 r80281 104 104 if (uHyperArg1 < pVM->cCpus) 105 105 { 106 PVMCPU pVCpuDst = pVM->CTX_SUFF(apCpus)[uHyperArg1];/* ASSUMES pVCpu index == ApicId of the VCPU. */106 PVMCPUCC pVCpuDst = VMCC_GET_CPU(pVM, uHyperArg1); /* ASSUMES pVCpu index == ApicId of the VCPU. */ 107 107 EMUnhaltAndWakeUp(pVM, pVCpuDst); 108 108 uHyperRet = KVM_HYPERCALL_RET_SUCCESS; … … 231 231 { 232 232 NOREF(pRange); 233 PVM 233 PVMCC pVM = pVCpu->CTX_SUFF(pVM); 234 234 PGIMKVMCPU pKvmCpu = &pVCpu->gim.s.u.KvmCpu; 235 235 … … 439 439 * @thread EMT(pVCpu). 440 440 */ 441 VMM_INT_DECL(VBOXSTRICTRC) gimKvmXcptUD(PVM pVM, PVMCPUCC pVCpu, PCPUMCTX pCtx, PDISCPUSTATE pDis, uint8_t *pcbInstr)441 VMM_INT_DECL(VBOXSTRICTRC) gimKvmXcptUD(PVMCC pVM, PVMCPUCC pVCpu, PCPUMCTX pCtx, PDISCPUSTATE pDis, uint8_t *pcbInstr) 442 442 { 443 443 VMCPU_ASSERT_EMT(pVCpu); -
trunk/src/VBox/VMM/VMMAll/HMAll.cpp
r80268 r80281 323 323 * 324 324 * @returns @c true if it is suitable, @c false otherwise. 325 * @param pVM The cross context VM structure. 325 326 * @param pVCpu The cross context virtual CPU structure. 326 327 * @param pCtx Pointer to the guest CPU context. … … 329 330 * pVCpu->cpum.GstCtx. 330 331 */ 331 VMMDECL(bool) HMCanExecuteGuest(PVMCPUCC pVCpu, PCCPUMCTX pCtx) 332 { 333 PVM pVM = pVCpu->CTX_SUFF(pVM); 332 VMMDECL(bool) HMCanExecuteGuest(PVMCC pVM, PVMCPUCC pVCpu, PCCPUMCTX pCtx) 333 { 334 334 Assert(HMIsEnabled(pVM)); 335 335 … … 380 380 * @param GCVirt Page to invalidate. 381 381 */ 382 VMM_INT_DECL(int) HMInvalidatePage(PVMCPU pVCpu, RTGCPTR GCVirt)382 VMM_INT_DECL(int) HMInvalidatePage(PVMCPUCC pVCpu, RTGCPTR GCVirt) 383 383 { 384 384 STAM_COUNTER_INC(&pVCpu->hm.s.StatFlushPageManual); … … 514 514 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++) 515 515 { 516 PVMCPU pVCpu = VMCC_GET_CPU(pVM, idCpu);516 PVMCPUCC pVCpu = VMCC_GET_CPU(pVM, idCpu); 517 517 518 518 /* Nothing to do if a TLB flush is already pending; the VCPU should … … 551 551 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++) 552 552 { 553 PVMCPU pVCpu = VMCC_GET_CPU(pVM, idCpu);553 PVMCPUCC pVCpu = VMCC_GET_CPU(pVM, idCpu); 554 554 555 555 /* Nothing to do if a TLB flush is already pending; the VCPU should … … 702 702 * @param pVM The cross context VM structure. 703 703 */ 704 VMM_INT_DECL(bool) HMHasPendingIrq(PVM pVM)705 { 706 PVMCPU pVCpu = VMMGetCpu(pVM);704 VMM_INT_DECL(bool) HMHasPendingIrq(PVMCC pVM) 705 { 706 PVMCPUCC pVCpu = VMMGetCpu(pVM); 707 707 return !!pVCpu->hm.s.Event.fPending; 708 708 } -
trunk/src/VBox/VMM/VMMAll/HMVMXAll.cpp
r80268 r80281 667 667 * state, make sure REM (which supplies a partial state) is updated. 668 668 */ 669 VMM_INT_DECL(bool) HMCanExecuteVmxGuest(PVMCC pVM, PVMCPU pVCpu, PCCPUMCTX pCtx)669 VMM_INT_DECL(bool) HMCanExecuteVmxGuest(PVMCC pVM, PVMCPUCC pVCpu, PCCPUMCTX pCtx) 670 670 { 671 671 Assert(HMIsEnabled(pVM)); -
trunk/src/VBox/VMM/VMMAll/IEMAll.cpp
r80268 r80281 8312 8312 * Do the writing. 8313 8313 */ 8314 PVM 8314 PVMCC pVM = pVCpu->CTX_SUFF(pVM); 8315 8315 if (!pVCpu->iem.s.aMemBbMappings[iMemMap].fUnassigned) 8316 8316 { … … 8515 8515 GCPhysSecond &= ~(RTGCPHYS)PAGE_OFFSET_MASK; 8516 8516 8517 PVM pVM = pVCpu->CTX_SUFF(pVM);8517 PVMCC pVM = pVCpu->CTX_SUFF(pVM); 8518 8518 8519 8519 /* … … 14293 14293 */ 14294 14294 uint32_t cMaxInstructionsGccStupidity = cMaxInstructions; 14295 PVM pVM = pVCpu->CTX_SUFF(pVM);14295 PVMCC pVM = pVCpu->CTX_SUFF(pVM); 14296 14296 for (;;) 14297 14297 { -
trunk/src/VBox/VMM/VMMAll/IEMAllCImplSvmInstr.cpp.h
r80268 r80281 379 379 * Read the guest VMCB. 380 380 */ 381 PVM pVM = pVCpu->CTX_SUFF(pVM);381 PVMCC pVM = pVCpu->CTX_SUFF(pVM); 382 382 int rc = PGMPhysSimpleReadGCPhys(pVM, pVCpu->cpum.GstCtx.hwvirt.svm.CTX_SUFF(pVmcb), GCPhysVmcb, sizeof(SVMVMCB)); 383 383 if (RT_SUCCESS(rc)) -
trunk/src/VBox/VMM/VMMAll/IOMAll.cpp
r80268 r80281 789 789 * @param pRange The range to free. 790 790 */ 791 void iomMmioFreeRange(PVM pVM, PIOMMMIORANGE pRange)791 void iomMmioFreeRange(PVMCC pVM, PIOMMMIORANGE pRange) 792 792 { 793 793 MMHyperFree(pVM, pRange); -
trunk/src/VBox/VMM/VMMAll/IOMAllMMIO.cpp
r80268 r80281 585 585 * @param pvUser Pointer to the MMIO ring-3 range entry. 586 586 */ 587 static VBOXSTRICTRC iomMmioCommonPfHandler(PVM pVM, PVMCPUCC pVCpu, uint32_t uErrorCode, PCPUMCTXCORE pCtxCore,587 static VBOXSTRICTRC iomMmioCommonPfHandler(PVMCC pVM, PVMCPUCC pVCpu, uint32_t uErrorCode, PCPUMCTXCORE pCtxCore, 588 588 RTGCPHYS GCPhysFault, void *pvUser) 589 589 { … … 1103 1103 * for the time being. 1104 1104 */ 1105 VMMDECL(int) IOMMMIOMapMMIO2Page(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysRemapped, uint64_t fPageFlags)1105 VMMDECL(int) IOMMMIOMapMMIO2Page(PVMCC pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysRemapped, uint64_t fPageFlags) 1106 1106 { 1107 1107 /* Currently only called from the VGA device during MMIO. */ 1108 1108 Log(("IOMMMIOMapMMIO2Page %RGp -> %RGp flags=%RX64\n", GCPhys, GCPhysRemapped, fPageFlags)); 1109 1109 AssertReturn(fPageFlags == (X86_PTE_RW | X86_PTE_P), VERR_INVALID_PARAMETER); 1110 PVMCPU pVCpu = VMMGetCpu(pVM);1110 PVMCPUCC pVCpu = VMMGetCpu(pVM); 1111 1111 1112 1112 /* This currently only works in real mode, protected mode without paging or with nested paging. */ … … 1176 1176 * for the time being. 1177 1177 */ 1178 VMMDECL(int) IOMMMIOMapMMIOHCPage(PVM pVM, PVMCPUpVCpu, RTGCPHYS GCPhys, RTHCPHYS HCPhys, uint64_t fPageFlags)1178 VMMDECL(int) IOMMMIOMapMMIOHCPage(PVMCC pVM, PVMCPUCC pVCpu, RTGCPHYS GCPhys, RTHCPHYS HCPhys, uint64_t fPageFlags) 1179 1179 { 1180 1180 /* Currently only called from VT-x code during a page fault. */ … … 1226 1226 * @param GCPhys Physical address that's part of the MMIO region to be reset. 1227 1227 */ 1228 VMMDECL(int) IOMMMIOResetRegion(PVM pVM, RTGCPHYS GCPhys)1228 VMMDECL(int) IOMMMIOResetRegion(PVMCC pVM, RTGCPHYS GCPhys) 1229 1229 { 1230 1230 Log(("IOMMMIOResetRegion %RGp\n", GCPhys)); 1231 1231 1232 PVMCPU pVCpu = VMMGetCpu(pVM);1232 PVMCPUCC pVCpu = VMMGetCpu(pVM); 1233 1233 1234 1234 /* This currently only works in real mode, protected mode without paging or with nested paging. */ -
trunk/src/VBox/VMM/VMMAll/MMAllHyper.cpp
r80268 r80281 157 157 * @param pVM The cross context VM structure. 158 158 */ 159 static int mmHyperLock(PVM pVM)159 static int mmHyperLock(PVMCC pVM) 160 160 { 161 161 PMMHYPERHEAP pHeap = pVM->mm.s.CTX_SUFF(pHyperHeap); … … 329 329 * Wrapper for mmHyperAllocInternal 330 330 */ 331 VMMDECL(int) MMHyperAlloc(PVM pVM, size_t cb, unsigned uAlignment, MMTAG enmTag, void **ppv)331 VMMDECL(int) MMHyperAlloc(PVMCC pVM, size_t cb, unsigned uAlignment, MMTAG enmTag, void **ppv) 332 332 { 333 333 int rc = mmHyperLock(pVM); … … 357 357 * memory. 358 358 */ 359 VMMDECL(int) MMHyperDupMem(PVM pVM, const void *pvSrc, size_t cb, unsigned uAlignment, MMTAG enmTag, void **ppv)359 VMMDECL(int) MMHyperDupMem(PVMCC pVM, const void *pvSrc, size_t cb, unsigned uAlignment, MMTAG enmTag, void **ppv) 360 360 { 361 361 int rc = MMHyperAlloc(pVM, cb, uAlignment, enmTag, ppv); … … 933 933 * Wrapper for mmHyperFreeInternal 934 934 */ 935 VMMDECL(int) MMHyperFree(PVM pVM, void *pv)935 VMMDECL(int) MMHyperFree(PVMCC pVM, void *pv) 936 936 { 937 937 int rc; … … 1216 1216 * @param pVM The cross context VM structure. 1217 1217 */ 1218 VMMDECL(void) MMHyperHeapCheck(PVM pVM)1218 VMMDECL(void) MMHyperHeapCheck(PVMCC pVM) 1219 1219 { 1220 1220 #ifdef MMHYPER_HEAP_STRICT -
trunk/src/VBox/VMM/VMMAll/PDMAll.cpp
r80268 r80281 73 73 } 74 74 75 PVM pVM = pVCpu->CTX_SUFF(pVM);75 PVMCC pVM = pVCpu->CTX_SUFF(pVM); 76 76 pdmLock(pVM); 77 77 … … 118 118 * @param uTagSrc The IRQ tag and source tracer ID. 119 119 */ 120 VMMDECL(int) PDMIsaSetIrq(PVM pVM, uint8_t u8Irq, uint8_t u8Level, uint32_t uTagSrc)120 VMMDECL(int) PDMIsaSetIrq(PVMCC pVM, uint8_t u8Irq, uint8_t u8Level, uint32_t uTagSrc) 121 121 { 122 122 pdmLock(pVM); … … 264 264 * @param pVM The cross context VM structure. 265 265 */ 266 void pdmLock(PVM pVM)266 void pdmLock(PVMCC pVM) 267 267 { 268 268 #ifdef IN_RING3 … … 285 285 * @param rc The RC to return in GC or R0 when we can't get the lock. 286 286 */ 287 int pdmLockEx(PVM pVM, int rc)287 int pdmLockEx(PVMCC pVM, int rc) 288 288 { 289 289 return PDMCritSectEnter(&pVM->pdm.s.CritSect, rc); … … 296 296 * @param pVM The cross context VM structure. 297 297 */ 298 void pdmUnlock(PVM pVM)298 void pdmUnlock(PVMCC pVM) 299 299 { 300 300 PDMCritSectLeave(&pVM->pdm.s.CritSect); -
trunk/src/VBox/VMM/VMMAll/PDMAllCritSect.cpp
r80268 r80281 78 78 AssertMsgReturn(pCritSect->s.Core.u32Magic == RTCRITSECT_MAGIC, ("%RX32\n", pCritSect->s.Core.u32Magic), 79 79 NIL_RTNATIVETHREAD); 80 PVM 81 PVMCPU 80 PVMCC pVM = pCritSect->s.CTX_SUFF(pVM); AssertPtr(pVM); 81 PVMCPUCC pVCpu = VMMGetCpu(pVM); AssertPtr(pVCpu); 82 82 RTNATIVETHREAD hNativeSelf = pVCpu->hNativeThread; Assert(hNativeSelf != NIL_RTNATIVETHREAD); 83 83 #endif … … 202 202 it without creating a race with PDMCritSectLeave, resulting in 203 203 spurious wakeups. */ 204 PVM pVM = pCritSect->s.CTX_SUFF(pVM); AssertPtr(pVM);205 PVMCPU pVCpu = VMMGetCpu(pVM); AssertPtr(pVCpu);204 PVMCC pVM = pCritSect->s.CTX_SUFF(pVM); AssertPtr(pVM); 205 PVMCPUCC pVCpu = VMMGetCpu(pVM); AssertPtr(pVCpu); 206 206 rc = VMMRZCallRing3(pVM, pVCpu, VMMCALLRING3_VM_R0_PREEMPT, NULL); 207 207 AssertRC(rc); … … 314 314 { 315 315 STAM_REL_COUNTER_ADD(&pCritSect->s.StatContentionRZLock, 1000000000); 316 PVM pVM = pCritSect->s.CTX_SUFF(pVM);317 PVMCPU pVCpu = VMMGetCpu(pVM);316 PVMCC pVM = pCritSect->s.CTX_SUFF(pVM); 317 PVMCPUCC pVCpu = VMMGetCpu(pVM); 318 318 HMR0Leave(pVM, pVCpu); 319 319 RTThreadPreemptRestore(NIL_RTTHREAD, XXX); … … 343 343 if (rcBusy == VINF_SUCCESS) 344 344 { 345 PVM pVM = pCritSect->s.CTX_SUFF(pVM); AssertPtr(pVM);346 PVMCPU pVCpu = VMMGetCpu(pVM); AssertPtr(pVCpu);345 PVMCC pVM = pCritSect->s.CTX_SUFF(pVM); AssertPtr(pVM); 346 PVMCPUCC pVCpu = VMMGetCpu(pVM); AssertPtr(pVCpu); 347 347 return VMMRZCallRing3(pVM, pVCpu, VMMCALLRING3_PDM_CRIT_SECT_ENTER, MMHyperCCToR3(pVM, pCritSect)); 348 348 } … … 696 696 * Queue the request. 697 697 */ 698 PVM 699 PVMCPU 698 PVMCC pVM = pCritSect->s.CTX_SUFF(pVM); AssertPtr(pVM); 699 PVMCPUCC pVCpu = VMMGetCpu(pVM); AssertPtr(pVCpu); 700 700 uint32_t i = pVCpu->pdm.s.cQueuedCritSectLeaves++; 701 701 LogFlow(("PDMCritSectLeave: [%d]=%p => R3\n", i, pCritSect)); … … 758 758 return RTCritSectIsOwner(&pCritSect->s.Core); 759 759 #else 760 PVM pVM = pCritSect->s.CTX_SUFF(pVM); AssertPtr(pVM);761 PVMCPU pVCpu = VMMGetCpu(pVM); AssertPtr(pVCpu);760 PVMCC pVM = pCritSect->s.CTX_SUFF(pVM); AssertPtr(pVM); 761 PVMCPUCC pVCpu = VMMGetCpu(pVM); AssertPtr(pVCpu); 762 762 if (pCritSect->s.Core.NativeThreadOwner != pVCpu->hNativeThread) 763 763 return false; -
trunk/src/VBox/VMM/VMMAll/PDMAllCritSectRw.cpp
r80268 r80281 83 83 AssertMsgReturn(pThis->s.Core.u32Magic == RTCRITSECTRW_MAGIC, ("%RX32\n", pThis->s.Core.u32Magic), 84 84 NIL_RTNATIVETHREAD); 85 PVM 86 PVMCPU 85 PVMCC pVM = pThis->s.CTX_SUFF(pVM); AssertPtr(pVM); 86 PVMCPUCC pVCpu = VMMGetCpu(pVM); AssertPtr(pVCpu); 87 87 RTNATIVETHREAD hNativeSelf = pVCpu->hNativeThread; Assert(hNativeSelf != NIL_RTNATIVETHREAD); 88 88 #endif … … 132 132 static void pdmR0CritSectRwYieldToRing3(PPDMCRITSECTRW pThis) 133 133 { 134 PVM pVM = pThis->s.CTX_SUFF(pVM); AssertPtr(pVM);135 PVMCPU pVCpu = VMMGetCpu(pVM); AssertPtr(pVCpu);134 PVMCC pVM = pThis->s.CTX_SUFF(pVM); AssertPtr(pVM); 135 PVMCPUCC pVCpu = VMMGetCpu(pVM); AssertPtr(pVCpu); 136 136 int rc = VMMRZCallRing3(pVM, pVCpu, VMMCALLRING3_VM_R0_PREEMPT, NULL); 137 137 AssertRC(rc); … … 380 380 if (rcBusy == VINF_SUCCESS) 381 381 { 382 PVM pVM = pThis->s.CTX_SUFF(pVM); AssertPtr(pVM);383 PVMCPU pVCpu = VMMGetCpu(pVM); AssertPtr(pVCpu);382 PVMCC pVM = pThis->s.CTX_SUFF(pVM); AssertPtr(pVM); 383 PVMCPUCC pVCpu = VMMGetCpu(pVM); AssertPtr(pVCpu); 384 384 /** @todo Should actually do this in via VMMR0.cpp instead of going all the way 385 385 * back to ring-3. Goes for both kind of crit sects. */ … … 622 622 { 623 623 /* Queue the exit request (ring-3). */ 624 PVM 625 PVMCPU 624 PVMCC pVM = pThis->s.CTX_SUFF(pVM); AssertPtr(pVM); 625 PVMCPUCC pVCpu = VMMGetCpu(pVM); AssertPtr(pVCpu); 626 626 uint32_t i = pVCpu->pdm.s.cQueuedCritSectRwShrdLeaves++; 627 627 LogFlow(("PDMCritSectRwLeaveShared: [%d]=%p => R3 c=%d (%#llx)\n", i, pThis, c, u64State)); … … 923 923 { 924 924 Assert(!fTryOnly); 925 PVM pVM = pThis->s.CTX_SUFF(pVM); AssertPtr(pVM);926 PVMCPU pVCpu = VMMGetCpu(pVM); AssertPtr(pVCpu);925 PVMCC pVM = pThis->s.CTX_SUFF(pVM); AssertPtr(pVM); 926 PVMCPUCC pVCpu = VMMGetCpu(pVM); AssertPtr(pVCpu); 927 927 /** @todo Should actually do this in via VMMR0.cpp instead of going all the way 928 928 * back to ring-3. Goes for both kind of crit sects. */ … … 1198 1198 * so queue the exit request (ring-3). 1199 1199 */ 1200 PVM 1201 PVMCPU 1200 PVMCC pVM = pThis->s.CTX_SUFF(pVM); AssertPtr(pVM); 1201 PVMCPUCC pVCpu = VMMGetCpu(pVM); AssertPtr(pVCpu); 1202 1202 uint32_t i = pVCpu->pdm.s.cQueuedCritSectRwExclLeaves++; 1203 1203 LogFlow(("PDMCritSectRwLeaveShared: [%d]=%p => R3\n", i, pThis)); -
trunk/src/VBox/VMM/VMMAll/PGMAll.cpp
r80268 r80281 1218 1218 VMMDECL(int) PGMInvalidatePage(PVMCPUCC pVCpu, RTGCPTR GCPtrPage) 1219 1219 { 1220 PVM pVM = pVCpu->CTX_SUFF(pVM);1220 PVMCC pVM = pVCpu->CTX_SUFF(pVM); 1221 1221 int rc; 1222 1222 Log3(("PGMInvalidatePage: GCPtrPage=%RGv\n", GCPtrPage)); … … 1301 1301 VMMDECL(int) PGMShwGetPage(PVMCPUCC pVCpu, RTGCPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys) 1302 1302 { 1303 PVM pVM = pVCpu->CTX_SUFF(pVM);1303 PVMCC pVM = pVCpu->CTX_SUFF(pVM); 1304 1304 pgmLock(pVM); 1305 1305 … … 1463 1463 PX86PDPT pPdpt = pgmShwGetPaePDPTPtr(pVCpu); 1464 1464 PX86PDPE pPdpe = &pPdpt->a[iPdPt]; 1465 PVM 1465 PVMCC pVM = pVCpu->CTX_SUFF(pVM); 1466 1466 PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool); 1467 1467 PPGMPOOLPAGE pShwPage; … … 1584 1584 static int pgmShwSyncLongModePDPtr(PVMCPUCC pVCpu, RTGCPTR64 GCPtr, X86PGPAEUINT uGstPml4e, X86PGPAEUINT uGstPdpe, PX86PDPAE *ppPD) 1585 1585 { 1586 PVM 1586 PVMCC pVM = pVCpu->CTX_SUFF(pVM); 1587 1587 PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool); 1588 1588 const unsigned iPml4 = (GCPtr >> X86_PML4_SHIFT) & X86_PML4_MASK; … … 1732 1732 static int pgmShwGetEPTPDPtr(PVMCPUCC pVCpu, RTGCPTR64 GCPtr, PEPTPDPT *ppPdpt, PEPTPD *ppPD) 1733 1733 { 1734 PVM 1734 PVMCC pVM = pVCpu->CTX_SUFF(pVM); 1735 1735 const unsigned iPml4 = (GCPtr >> EPT_PML4_SHIFT) & EPT_PML4_MASK; 1736 1736 PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool); … … 2336 2336 * pointed to must have 4 entries. 2337 2337 */ 2338 VMM_INT_DECL(int) PGMGstGetPaePdpes(PVMCPU pVCpu, PX86PDPE paPdpes)2338 VMM_INT_DECL(int) PGMGstGetPaePdpes(PVMCPUCC pVCpu, PX86PDPE paPdpes) 2339 2339 { 2340 2340 Assert(pVCpu->pgm.s.enmShadowMode == PGMMODE_EPT); … … 2359 2359 * @remarks No-long-jump zone!!! 2360 2360 */ 2361 VMM_INT_DECL(void) PGMGstUpdatePaePdpes(PVMCPU pVCpu, PCX86PDPE paPdpes)2361 VMM_INT_DECL(void) PGMGstUpdatePaePdpes(PVMCPUCC pVCpu, PCX86PDPE paPdpes) 2362 2362 { 2363 2363 Assert(pVCpu->pgm.s.enmShadowMode == PGMMODE_EPT); … … 3400 3400 * @param fUseLargePages Use/not use large pages 3401 3401 */ 3402 VMMDECL(int) PGMSetLargePageUsage(PVM pVM, bool fUseLargePages)3402 VMMDECL(int) PGMSetLargePageUsage(PVMCC pVM, bool fUseLargePages) 3403 3403 { 3404 3404 VM_ASSERT_VALID_EXT_RETURN(pVM, VERR_INVALID_VM_HANDLE); … … 3417 3417 */ 3418 3418 #if (defined(VBOX_STRICT) && defined(IN_RING3)) || defined(DOXYGEN_RUNNING) 3419 int pgmLockDebug(PVM pVM, RT_SRC_POS_DECL)3419 int pgmLockDebug(PVMCC pVM, RT_SRC_POS_DECL) 3420 3420 #else 3421 int pgmLock(PVM pVM)3421 int pgmLock(PVMCC pVM) 3422 3422 #endif 3423 3423 { -
trunk/src/VBox/VMM/VMMAll/PGMAllHandler.cpp
r80268 r80281 61 61 * @param pType Pointer to the type registration. 62 62 */ 63 DECLINLINE(uint32_t) pgmHandlerPhysicalTypeRelease(PVM pVM, PPGMPHYSHANDLERTYPEINT pType)63 DECLINLINE(uint32_t) pgmHandlerPhysicalTypeRelease(PVMCC pVM, PPGMPHYSHANDLERTYPEINT pType) 64 64 { 65 65 AssertMsgReturn(pType->u32Magic == PGMPHYSHANDLERTYPEINT_MAGIC, ("%#x\n", pType->u32Magic), UINT32_MAX); … … 101 101 * @param hType The type regiration handle. 102 102 */ 103 VMMDECL(uint32_t) PGMHandlerPhysicalTypeRelease(PVM pVM, PGMPHYSHANDLERTYPE hType)103 VMMDECL(uint32_t) PGMHandlerPhysicalTypeRelease(PVMCC pVM, PGMPHYSHANDLERTYPE hType) 104 104 { 105 105 if (hType != NIL_PGMPHYSHANDLERTYPE) … … 145 145 * success. 146 146 */ 147 int pgmHandlerPhysicalExCreate(PVM pVM, PGMPHYSHANDLERTYPE hType, RTR3PTR pvUserR3, RTR0PTR pvUserR0, RTRCPTR pvUserRC,147 int pgmHandlerPhysicalExCreate(PVMCC pVM, PGMPHYSHANDLERTYPE hType, RTR3PTR pvUserR3, RTR0PTR pvUserR0, RTRCPTR pvUserRC, 148 148 R3PTRTYPE(const char *) pszDesc, PPGMPHYSHANDLER *ppPhysHandler) 149 149 { … … 202 202 * success. 203 203 */ 204 int pgmHandlerPhysicalExDup(PVM pVM, PPGMPHYSHANDLER pPhysHandlerSrc, PPGMPHYSHANDLER *ppPhysHandler)204 int pgmHandlerPhysicalExDup(PVMCC pVM, PPGMPHYSHANDLER pPhysHandlerSrc, PPGMPHYSHANDLER *ppPhysHandler) 205 205 { 206 206 return pgmHandlerPhysicalExCreate(pVM, … … 497 497 * @param pHandler The handler to free. NULL if ignored. 498 498 */ 499 int pgmHandlerPhysicalExDestroy(PVM pVM, PPGMPHYSHANDLER pHandler)499 int pgmHandlerPhysicalExDestroy(PVMCC pVM, PPGMPHYSHANDLER pHandler) 500 500 { 501 501 if (pHandler) -
trunk/src/VBox/VMM/VMMAll/PGMAllPhys.cpp
r80268 r80281 321 321 * @param pVM The cross context VM structure. 322 322 */ 323 void pgmPhysInvalidRamRangeTlbs(PVM pVM)323 void pgmPhysInvalidRamRangeTlbs(PVMCC pVM) 324 324 { 325 325 pgmLock(pVM); … … 567 567 * @param pVM The cross context VM structure. 568 568 */ 569 void pgmPhysInvalidatePageMapTLB(PVM pVM)569 void pgmPhysInvalidatePageMapTLB(PVMCC pVM) 570 570 { 571 571 pgmLock(pVM); … … 633 633 * nip back to ring-3/0 in some cases. 634 634 */ 635 static int pgmPhysEnsureHandyPage(PVM pVM)635 static int pgmPhysEnsureHandyPage(PVMCC pVM) 636 636 { 637 637 AssertMsg(pVM->pgm.s.cHandyPages <= RT_ELEMENTS(pVM->pgm.s.aHandyPages), ("%d\n", pVM->pgm.s.cHandyPages)); … … 1225 1225 * @remarks Called from within the PGM critical section. 1226 1226 */ 1227 static int pgmPhysPageMapCommon(PVM pVM, PPGMPAGE pPage, RTGCPHYS GCPhys, PPPGMPAGEMAP ppMap, void **ppv)1227 static int pgmPhysPageMapCommon(PVMCC pVM, PPGMPAGE pPage, RTGCPHYS GCPhys, PPPGMPAGEMAP ppMap, void **ppv) 1228 1228 { 1229 1229 PGM_LOCK_ASSERT_OWNER(pVM); … … 4631 4631 * @param pvUser User argument for the callback. 4632 4632 */ 4633 VMM_INT_DECL(int) PGMPhysNemEnumPagesByState(PVM pVM, PVMCPUpVCpu, uint8_t uMinState,4633 VMM_INT_DECL(int) PGMPhysNemEnumPagesByState(PVMCC pVM, PVMCPUCC pVCpu, uint8_t uMinState, 4634 4634 PFNPGMPHYSNEMENUMCALLBACK pfnCallback, void *pvUser) 4635 4635 { -
trunk/src/VBox/VMM/VMMAll/PGMAllPool.cpp
r80268 r80281 58 58 #endif 59 59 60 int pgmPoolTrackFlushGCPhysPTsSlow(PVM pVM, PPGMPAGE pPhysPage);60 int pgmPoolTrackFlushGCPhysPTsSlow(PVMCC pVM, PPGMPAGE pPhysPage); 61 61 PPGMPOOLPHYSEXT pgmPoolTrackPhysExtAlloc(PVM pVM, uint16_t *piPhysExt); 62 62 void pgmPoolTrackPhysExtFree(PVM pVM, uint16_t iPhysExt); … … 757 757 * @todo VBOXSTRICTRC 758 758 */ 759 static int pgmRZPoolAccessPfHandlerFlush(PVM pVM, PVMCPUpVCpu, PPGMPOOL pPool, PPGMPOOLPAGE pPage, PDISCPUSTATE pDis,759 static int pgmRZPoolAccessPfHandlerFlush(PVMCC pVM, PVMCPUCC pVCpu, PPGMPOOL pPool, PPGMPOOLPAGE pPage, PDISCPUSTATE pDis, 760 760 PCPUMCTXCORE pRegFrame, RTGCPHYS GCPhysFault, RTGCPTR pvFault) 761 761 { … … 878 878 * @param pfReused Reused state (in/out) 879 879 */ 880 DECLINLINE(int) pgmRZPoolAccessPfHandlerSimple(PVMCC pVM, PVMCPU pVCpu, PPGMPOOL pPool, PPGMPOOLPAGE pPage, PDISCPUSTATE pDis,880 DECLINLINE(int) pgmRZPoolAccessPfHandlerSimple(PVMCC pVM, PVMCPUCC pVCpu, PPGMPOOL pPool, PPGMPOOLPAGE pPage, PDISCPUSTATE pDis, 881 881 PCPUMCTXCORE pRegFrame, RTGCPHYS GCPhysFault, RTGCPTR pvFault, bool *pfReused) 882 882 { … … 3600 3600 * @param pPhysPage The guest page in question. 3601 3601 */ 3602 int pgmPoolTrackFlushGCPhysPTsSlow(PVM pVM, PPGMPAGE pPhysPage)3602 int pgmPoolTrackFlushGCPhysPTsSlow(PVMCC pVM, PPGMPAGE pPhysPage) 3603 3603 { 3604 3604 PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool); … … 4075 4075 * @param iPte Page table entry 4076 4076 */ 4077 uint16_t pgmPoolTrackPhysExtAddref(PVM pVM, PPGMPAGE pPhysPage, uint16_t u16, uint16_t iShwPT, uint16_t iPte)4077 uint16_t pgmPoolTrackPhysExtAddref(PVMCC pVM, PPGMPAGE pPhysPage, uint16_t u16, uint16_t iShwPT, uint16_t iPte) 4078 4078 { 4079 4079 pgmLock(pVM); … … 5017 5017 * @param ppPage Where to store the pointer to the page. NULL is stored here on failure. 5018 5018 */ 5019 int pgmPoolAlloc(PVM pVM, RTGCPHYS GCPhys, PGMPOOLKIND enmKind, PGMPOOLACCESS enmAccess, bool fA20Enabled,5019 int pgmPoolAlloc(PVMCC pVM, RTGCPHYS GCPhys, PGMPOOLKIND enmKind, PGMPOOLACCESS enmAccess, bool fA20Enabled, 5020 5020 uint16_t iUser, uint32_t iUserTable, bool fLockPage, PPPGMPOOLPAGE ppPage) 5021 5021 { -
trunk/src/VBox/VMM/VMMAll/PGMAllShw.h
r80268 r80281 208 208 # endif 209 209 PPGMPOOLPAGE pNewShwPageCR3; 210 PVM 210 PVMCC pVM = pVCpu->CTX_SUFF(pVM); 211 211 212 212 Assert((HMIsNestedPagingActive(pVM) || VM_IS_NEM_ENABLED(pVM)) == pVM->pgm.s.fNestedPaging); … … 243 243 { 244 244 #if PGM_TYPE_IS_NESTED_OR_EPT(PGM_SHW_TYPE) 245 PVM pVM = pVCpu->CTX_SUFF(pVM);245 PVMCC pVM = pVCpu->CTX_SUFF(pVM); 246 246 if (pVCpu->pgm.s.CTX_SUFF(pShwPageCR3)) 247 247 { -
trunk/src/VBox/VMM/VMMAll/REMAll.cpp
r80268 r80281 44 44 * @param GCPtrPage The 45 45 */ 46 VMMDECL(void) REMNotifyInvalidatePage(PVM pVM, RTGCPTR GCPtrPage)46 VMMDECL(void) REMNotifyInvalidatePage(PVMCC pVM, RTGCPTR GCPtrPage) 47 47 { 48 48 /* … … 84 84 * @param pRec Notification record to insert 85 85 */ 86 static void remNotifyHandlerInsert(PVM pVM, PREMHANDLERNOTIFICATION pRec)86 static void remNotifyHandlerInsert(PVMCC pVM, PREMHANDLERNOTIFICATION pRec) 87 87 { 88 88 /* … … 139 139 * @param fHasHCHandler Set if the handler have a HC callback function. 140 140 */ 141 VMMDECL(void) REMNotifyHandlerPhysicalRegister(PVM pVM, PGMPHYSHANDLERKIND enmKind, RTGCPHYS GCPhys, RTGCPHYS cb, bool fHasHCHandler)141 VMMDECL(void) REMNotifyHandlerPhysicalRegister(PVMCC pVM, PGMPHYSHANDLERKIND enmKind, RTGCPHYS GCPhys, RTGCPHYS cb, bool fHasHCHandler) 142 142 { 143 143 REMHANDLERNOTIFICATION Rec; … … 161 161 * @param fRestoreAsRAM Whether the to restore it as normal RAM or as unassigned memory. 162 162 */ 163 VMMDECL(void) REMNotifyHandlerPhysicalDeregister(PVM pVM, PGMPHYSHANDLERKIND enmKind, RTGCPHYS GCPhys, RTGCPHYS cb, bool fHasHCHandler, bool fRestoreAsRAM)163 VMMDECL(void) REMNotifyHandlerPhysicalDeregister(PVMCC pVM, PGMPHYSHANDLERKIND enmKind, RTGCPHYS GCPhys, RTGCPHYS cb, bool fHasHCHandler, bool fRestoreAsRAM) 164 164 { 165 165 REMHANDLERNOTIFICATION Rec; … … 185 185 * @param fRestoreAsRAM Whether the to restore it as normal RAM or as unassigned memory. 186 186 */ 187 VMMDECL(void) REMNotifyHandlerPhysicalModify(PVM pVM, PGMPHYSHANDLERKIND enmKind, RTGCPHYS GCPhysOld, RTGCPHYS GCPhysNew, RTGCPHYS cb, bool fHasHCHandler, bool fRestoreAsRAM)187 VMMDECL(void) REMNotifyHandlerPhysicalModify(PVMCC pVM, PGMPHYSHANDLERKIND enmKind, RTGCPHYS GCPhysOld, RTGCPHYS GCPhysNew, RTGCPHYS cb, bool fHasHCHandler, bool fRestoreAsRAM) 188 188 { 189 189 REMHANDLERNOTIFICATION Rec; -
trunk/src/VBox/VMM/VMMAll/SELMAll.cpp
r80268 r80281 52 52 * @param Addr Address part. 53 53 */ 54 VMMDECL(RTGCPTR) SELMToFlat(PVM pVM, DISSELREG SelReg, PCPUMCTXCORE pCtxCore, RTGCPTR Addr)54 VMMDECL(RTGCPTR) SELMToFlat(PVMCC pVM, DISSELREG SelReg, PCPUMCTXCORE pCtxCore, RTGCPTR Addr) 55 55 { 56 56 PCPUMSELREG pSReg; 57 PVMCPU 57 PVMCPUCC pVCpu = VMMGetCpu(pVM); 58 58 59 59 int rc = DISFetchRegSegEx(pCtxCore, SelReg, &pSReg); AssertRC(rc); -
trunk/src/VBox/VMM/VMMAll/TMAll.cpp
r80268 r80281 192 192 VMM_INT_DECL(void) TMNotifyStartOfHalt(PVMCPUCC pVCpu) 193 193 { 194 PVM pVM = pVCpu->CTX_SUFF(pVM);194 PVMCC pVM = pVCpu->CTX_SUFF(pVM); 195 195 196 196 #ifndef VBOX_WITHOUT_NS_ACCOUNTING … … 1161 1161 * @param u64Expire The expiration time. 1162 1162 */ 1163 static int tmTimerVirtualSyncSet(PVM pVM, PTMTIMER pTimer, uint64_t u64Expire)1163 static int tmTimerVirtualSyncSet(PVMCC pVM, PTMTIMER pTimer, uint64_t u64Expire) 1164 1164 { 1165 1165 STAM_PROFILE_START(&pVM->tm.s.CTX_SUFF_Z(StatTimerSetVs), a); … … 1230 1230 VMMDECL(int) TMTimerSet(PTMTIMER pTimer, uint64_t u64Expire) 1231 1231 { 1232 PVM pVM = pTimer->CTX_SUFF(pVM);1232 PVMCC pVM = pTimer->CTX_SUFF(pVM); 1233 1233 1234 1234 /* Treat virtual sync timers specially. */ … … 1387 1387 * @param pu64Now Optional pointer where to store the return time 1388 1388 */ 1389 DECL_FORCE_INLINE(uint64_t) tmTimerSetRelativeNowWorker(PVM pVM, TMCLOCK enmClock, uint64_t *pu64Now)1389 DECL_FORCE_INLINE(uint64_t) tmTimerSetRelativeNowWorker(PVMCC pVM, TMCLOCK enmClock, uint64_t *pu64Now) 1390 1390 { 1391 1391 uint64_t u64Now; … … 1422 1422 * Optional. 1423 1423 */ 1424 static int tmTimerSetRelativeOptimizedStart(PVM pVM, PTMTIMER pTimer, uint64_t cTicksToNext, uint64_t *pu64Now)1424 static int tmTimerSetRelativeOptimizedStart(PVMCC pVM, PTMTIMER pTimer, uint64_t cTicksToNext, uint64_t *pu64Now) 1425 1425 { 1426 1426 Assert(!pTimer->offPrev); … … 1461 1461 * Optional. 1462 1462 */ 1463 static int tmTimerVirtualSyncSetRelative(PVM pVM, PTMTIMER pTimer, uint64_t cTicksToNext, uint64_t *pu64Now)1463 static int tmTimerVirtualSyncSetRelative(PVMCC pVM, PTMTIMER pTimer, uint64_t cTicksToNext, uint64_t *pu64Now) 1464 1464 { 1465 1465 STAM_PROFILE_START(pVM->tm.s.CTX_SUFF_Z(StatTimerSetRelativeVs), a); … … 1536 1536 VMMDECL(int) TMTimerSetRelative(PTMTIMER pTimer, uint64_t cTicksToNext, uint64_t *pu64Now) 1537 1537 { 1538 PVM pVM = pTimer->CTX_SUFF(pVM);1538 PVMCC pVM = pTimer->CTX_SUFF(pVM); 1539 1539 1540 1540 /* Treat virtual sync timers specially. */ … … 1788 1788 * @param pTimer The timer handle. 1789 1789 */ 1790 static int tmTimerVirtualSyncStop(PVM pVM, PTMTIMER pTimer)1790 static int tmTimerVirtualSyncStop(PVMCC pVM, PTMTIMER pTimer) 1791 1791 { 1792 1792 STAM_PROFILE_START(&pVM->tm.s.CTX_SUFF_Z(StatTimerStopVs), a); … … 1858 1858 VMMDECL(int) TMTimerStop(PTMTIMER pTimer) 1859 1859 { 1860 PVM pVM = pTimer->CTX_SUFF(pVM);1860 PVMCC pVM = pTimer->CTX_SUFF(pVM); 1861 1861 1862 1862 /* Treat virtual sync timers specially. */ … … 1965 1965 VMMDECL(uint64_t) TMTimerGet(PTMTIMER pTimer) 1966 1966 { 1967 PVM pVM = pTimer->CTX_SUFF(pVM);1967 PVMCC pVM = pTimer->CTX_SUFF(pVM); 1968 1968 1969 1969 uint64_t u64; … … 2532 2532 * @param pVCpu The cross context virtual CPU structure of the calling EMT. 2533 2533 */ 2534 VMM_INT_DECL(uint32_t) TMCalcHostTimerFrequency(PVM pVM, PVMCPUpVCpu)2534 VMM_INT_DECL(uint32_t) TMCalcHostTimerFrequency(PVMCC pVM, PVMCPUCC pVCpu) 2535 2535 { 2536 2536 uint32_t uHz = tmGetFrequencyHint(pVM); -
trunk/src/VBox/VMM/VMMAll/TMAllCpu.cpp
r80268 r80281 44 44 * @param fCheckTimers Whether to check timers. 45 45 */ 46 DECLINLINE(uint64_t) tmCpuTickGetRawVirtual(PVM pVM, bool fCheckTimers)46 DECLINLINE(uint64_t) tmCpuTickGetRawVirtual(PVMCC pVM, bool fCheckTimers) 47 47 { 48 48 uint64_t u64; -
trunk/src/VBox/VMM/VMMAll/TMAllVirtual.cpp
r80268 r80281 155 155 * Wrapper around the IPRT GIP time methods. 156 156 */ 157 DECLINLINE(uint64_t) tmVirtualGetRawNanoTS(PVM pVM)157 DECLINLINE(uint64_t) tmVirtualGetRawNanoTS(PVMCC pVM) 158 158 { 159 159 # ifdef IN_RING3 … … 176 176 * @param pVM The cross context VM structure. 177 177 */ 178 static uint64_t tmVirtualGetRawNonNormal(PVM pVM)178 static uint64_t tmVirtualGetRawNonNormal(PVMCC pVM) 179 179 { 180 180 /* … … 204 204 * @param pVM The cross context VM structure. 205 205 */ 206 DECLINLINE(uint64_t) tmVirtualGetRaw(PVM pVM)206 DECLINLINE(uint64_t) tmVirtualGetRaw(PVMCC pVM) 207 207 { 208 208 if (RT_LIKELY(!pVM->tm.s.fVirtualWarpDrive)) … … 870 870 * @param pVM The cross context VM structure. 871 871 */ 872 int tmVirtualPauseLocked(PVM pVM)872 int tmVirtualPauseLocked(PVMCC pVM) 873 873 { 874 874 uint32_t c = ASMAtomicDecU32(&pVM->tm.s.cVirtualTicking); … … 890 890 * @param pVM The cross context VM structure. 891 891 */ 892 int tmVirtualResumeLocked(PVM pVM)892 int tmVirtualResumeLocked(PVMCC pVM) 893 893 { 894 894 uint32_t c = ASMAtomicIncU32(&pVM->tm.s.cVirtualTicking); -
trunk/src/VBox/VMM/VMMAll/TRPMAll.cpp
r80268 r80281 190 190 * @param enmType Trap type. 191 191 */ 192 VMMDECL(int) TRPMAssertTrap(PVMCPU pVCpu, uint8_t u8TrapNo, TRPMEVENT enmType)192 VMMDECL(int) TRPMAssertTrap(PVMCPUCC pVCpu, uint8_t u8TrapNo, TRPMEVENT enmType) 193 193 { 194 194 Log2(("TRPMAssertTrap: u8TrapNo=%02x type=%d\n", u8TrapNo, enmType)); … … 223 223 * @param uErrorCode The error code for the page-fault. 224 224 */ 225 VMMDECL(int) TRPMAssertXcptPF(PVMCPU pVCpu, RTGCUINTPTR uCR2, RTGCUINT uErrorCode)225 VMMDECL(int) TRPMAssertXcptPF(PVMCPUCC pVCpu, RTGCUINTPTR uCR2, RTGCUINT uErrorCode) 226 226 { 227 227 Log2(("TRPMAssertXcptPF: uCR2=%RGv uErrorCode=%RGv\n", uCR2, uErrorCode)); /** @todo RTGCUINT to be fixed. */ -
trunk/src/VBox/VMM/VMMAll/VMAll.cpp
r80268 r80281 48 48 * @thread Any 49 49 */ 50 VMMDECL(int) VMSetError(PVM pVM, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...)50 VMMDECL(int) VMSetError(PVMCC pVM, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...) 51 51 { 52 52 va_list args; … … 72 72 * @thread Any 73 73 */ 74 VMMDECL(int) VMSetErrorV(PVM pVM, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list args)74 VMMDECL(int) VMSetErrorV(PVMCC pVM, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list args) 75 75 { 76 76 #ifdef IN_RING3 … … 204 204 * @thread Any 205 205 */ 206 VMMDECL(int) VMSetRuntimeError(PVM pVM, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...)206 VMMDECL(int) VMSetRuntimeError(PVMCC pVM, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...) 207 207 { 208 208 va_list va; … … 229 229 * @thread Any 230 230 */ 231 VMMDECL(int) VMSetRuntimeErrorV(PVM pVM, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va)231 VMMDECL(int) VMSetRuntimeErrorV(PVMCC pVM, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va) 232 232 { 233 233 Log(("VMSetRuntimeErrorV: fFlags=%#x pszErrorId=%s\n", fFlags, pszErrorId)); … … 397 397 * @param pVM The VM handle. 398 398 */ 399 VMMDECL(uint32_t) VMGetResetCount(PVM pVM)399 VMMDECL(uint32_t) VMGetResetCount(PVMCC pVM) 400 400 { 401 401 VM_ASSERT_VALID_EXT_RETURN(pVM, UINT32_MAX); … … 410 410 * @param pVM The VM handle. 411 411 */ 412 VMMDECL(uint32_t) VMGetSoftResetCount(PVM pVM)412 VMMDECL(uint32_t) VMGetSoftResetCount(PVMCC pVM) 413 413 { 414 414 VM_ASSERT_VALID_EXT_RETURN(pVM, UINT32_MAX); … … 423 423 * @param pVM The VM handle. 424 424 */ 425 VMMDECL(uint32_t) VMGetHardResetCount(PVM pVM)425 VMMDECL(uint32_t) VMGetHardResetCount(PVMCC pVM) 426 426 { 427 427 VM_ASSERT_VALID_EXT_RETURN(pVM, UINT32_MAX); -
trunk/src/VBox/VMM/VMMAll/VMMAll.cpp
r80268 r80281 205 205 for (VMCPUID idCpu = 0; idCpu < cCpus; idCpu++) 206 206 { 207 PVMCPU pVCpu = VMCC_GET_CPU(pVM, idCpu);207 PVMCPUCC pVCpu = VMCC_GET_CPU(pVM, idCpu); 208 208 if (pVCpu->idHostCpu == idHostCpu) 209 209 return pVCpu->idCpu; … … 217 217 for (VMCPUID idCpu = 0; idCpu < cCpus; idCpu++) 218 218 { 219 PVMCPU pVCpu = VMCC_GET_CPU(pVM, idCpu);219 PVMCPUCC pVCpu = VMCC_GET_CPU(pVM, idCpu); 220 220 if (pVCpu->hNativeThreadR0 == hThread) 221 221 return pVCpu->idCpu; -
trunk/src/VBox/VMM/VMMR0/GVMMR0.cpp
r80274 r80281 977 977 pHandle->ProcId = ProcId; 978 978 pGVM->pVMR3 = pVMR3; 979 pGVM->pVMR3Unsafe = pVMR3; 979 980 pGVM->aCpus[0].hEMT = hEMT0; 980 981 pGVM->aCpus[0].hNativeThreadR0 = hEMT0; … … 1084 1085 { 1085 1086 PVMR3 pVMR3 = RTR0MemObjAddressR3(pGVM->gvmm.s.VMMapObj); 1086 pVM->pVMR3 = pVMR3;1087 1087 AssertPtr((void *)pVMR3); 1088 pVM->pVMR3 = pVMR3; 1088 1089 1089 1090 /* Initialize all the VM pointers. */ … … 1222 1223 pGVM->cCpus = cCpus; 1223 1224 pGVM->pSession = pSession; 1225 pGVM->pSelf = pGVM; 1224 1226 1225 1227 /* VM: */ 1226 1228 pGVM->enmVMState = VMSTATE_CREATING; 1229 pGVM->hSelfUnsafe = hSelf; 1227 1230 pGVM->pSessionUnsafe = pSession; 1228 pGVM-> hSelfUnsafe = hSelf;1231 pGVM->pVMR0ForCall = pGVM; 1229 1232 pGVM->cCpusUnsafe = cCpus; 1230 1233 pGVM->uCpuExecutionCap = 100; /* default is no cap. */ -
trunk/src/VBox/VMM/VMMR3/EM.cpp
r80191 r80281 1387 1387 if (VM_IS_HM_ENABLED(pVM)) 1388 1388 { 1389 if (HMCanExecuteGuest(pV Cpu, &pVCpu->cpum.GstCtx))1389 if (HMCanExecuteGuest(pVM, pVCpu, &pVCpu->cpum.GstCtx)) 1390 1390 return EMSTATE_HM; 1391 1391 } -
trunk/src/VBox/VMM/VMMR3/EMHM.cpp
r80191 r80281 87 87 Assert(!(fFlags & ~EM_ONE_INS_FLAGS_MASK)); 88 88 89 if (!HMCanExecuteGuest(pV Cpu, &pVCpu->cpum.GstCtx))89 if (!HMCanExecuteGuest(pVM, pVCpu, &pVCpu->cpum.GstCtx)) 90 90 return VINF_EM_RESCHEDULE; 91 91 -
trunk/src/VBox/VMM/VMMR3/GMM.cpp
r80191 r80281 24 24 #include <VBox/vmm/gmm.h> 25 25 #include <VBox/vmm/vmm.h> 26 #include <VBox/vmm/vm .h>26 #include <VBox/vmm/vmcc.h> 27 27 #include <VBox/sup.h> 28 28 #include <VBox/err.h> … … 309 309 310 310 /* Must be callable from any thread, so can't use VMMR3CallR0. */ 311 int rc = SUPR3CallVMMR0Ex( pVM->pVMR0, NIL_VMCPUID, VMMR0_DO_GMM_QUERY_HYPERVISOR_MEM_STATS, 0, &Req.Hdr);311 int rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), NIL_VMCPUID, VMMR0_DO_GMM_QUERY_HYPERVISOR_MEM_STATS, 0, &Req.Hdr); 312 312 if (rc == VINF_SUCCESS) 313 313 { … … 444 444 445 445 /* Must be callable from any thread, so can't use VMMR3CallR0. */ 446 int rc = SUPR3CallVMMR0Ex( pVM->pVMR0, NIL_VMCPUID, VMMR0_DO_GMM_FIND_DUPLICATE_PAGE, 0, &Req.Hdr);446 int rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), NIL_VMCPUID, VMMR0_DO_GMM_FIND_DUPLICATE_PAGE, 0, &Req.Hdr); 447 447 if (rc == VINF_SUCCESS) 448 448 return Req.fDuplicate; -
trunk/src/VBox/VMM/VMMR3/HM.cpp
r80202 r80281 60 60 #include <VBox/vmm/hm_svm.h> 61 61 #include "HMInternal.h" 62 #include <VBox/vmm/vm.h> 63 #include <VBox/vmm/uvm.h> 62 #include <VBox/vmm/vmcc.h> 64 63 #include <VBox/err.h> 65 64 #include <VBox/param.h> … … 993 992 * Enable VT-x or AMD-V on all host CPUs. 994 993 */ 995 rc = SUPR3CallVMMR0Ex( pVM->pVMR0, 0 /*idCpu*/, VMMR0_DO_HM_ENABLE, 0, NULL);994 rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), 0 /*idCpu*/, VMMR0_DO_HM_ENABLE, 0, NULL); 996 995 if (RT_FAILURE(rc)) 997 996 { … … 1584 1583 * Call ring-0 to set up the VM. 1585 1584 */ 1586 rc = SUPR3CallVMMR0Ex( pVM->pVMR0, 0 /* idCpu */, VMMR0_DO_HM_SETUP_VM, 0 /* u64Arg */, NULL /* pReqHdr */);1585 rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), 0 /* idCpu */, VMMR0_DO_HM_SETUP_VM, 0 /* u64Arg */, NULL /* pReqHdr */); 1587 1586 if (rc != VINF_SUCCESS) 1588 1587 { … … 1767 1766 * Call ring-0 to set up the VM. 1768 1767 */ 1769 int rc = SUPR3CallVMMR0Ex( pVM->pVMR0, 0 /*idCpu*/, VMMR0_DO_HM_SETUP_VM, 0, NULL);1768 int rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), 0 /*idCpu*/, VMMR0_DO_HM_SETUP_VM, 0, NULL); 1770 1769 if (rc != VINF_SUCCESS) 1771 1770 { -
trunk/src/VBox/VMM/VMMR3/MMHyper.cpp
r80191 r80281 28 28 #include "MMInternal.h" 29 29 #include <VBox/vmm/vm.h> 30 #include <VBox/vmm/gvm.h> 30 31 #include <VBox/err.h> 31 32 #include <VBox/param.h> … … 152 153 /* 153 154 * Map the VM structure into the hypervisor space. 155 * Note! Keeping the mappings here for now in case someone is using 156 * MMHyperR3ToR0 or similar. 154 157 */ 158 AssertCompileSizeAlignment(VM, PAGE_SIZE); 159 AssertCompileSizeAlignment(VMCPU, PAGE_SIZE); 155 160 #ifdef VBOX_BUGREF_9217 156 AssertRelease(pVM->cbSelf >= sizeof(VMCPU) * pVM->cCpus + sizeof(*pVM)); 161 AssertCompileSizeAlignment(GVM, PAGE_SIZE); 162 AssertCompileSizeAlignment(GVMCPU, PAGE_SIZE); 163 AssertRelease(pVM->cbSelf == sizeof(VM)); 164 AssertRelease(pVM->cbVCpu == sizeof(VMCPU)); 165 RTGCPTR GCPtr; 166 rc = MMR3HyperMapPages(pVM, pVM, pVM->pVMR0ForCall, sizeof(VM) >> PAGE_SHIFT, pVM->paVMPagesR3, "VM", &GCPtr); 167 uint32_t offPages = RT_UOFFSETOF(GVM, aCpus) >> PAGE_SHIFT; 168 for (uint32_t idCpu = 0; idCpu < pVM->cCpus && RT_SUCCESS(rc); idCpu++, offPages += sizeof(GVMCPU) >> PAGE_SHIFT) 169 { 170 PVMCPU pVCpu = pVM->apCpusR3[idCpu]; 171 RTGCPTR GCPtrIgn; 172 rc = MMR3HyperMapPages(pVM, pVCpu, pVM->pVMR0ForCall + offPages * PAGE_SIZE, 173 sizeof(VMCPU) >> PAGE_SHIFT, &pVM->paVMPagesR3[offPages], "VMCPU", &GCPtrIgn); 174 } 157 175 #else 158 176 AssertRelease(pVM->cbSelf >= sizeof(VMCPU)); 177 RTGCPTR GCPtr; 178 rc = MMR3HyperMapPages(pVM, pVM, pVM->pVMR0, 179 RT_ALIGN_Z(pVM->cbSelf, PAGE_SIZE) >> PAGE_SHIFT, pVM->paVMPagesR3, "VM", 180 &GCPtr); 159 181 #endif 160 RTGCPTR GCPtr;161 rc = MMR3HyperMapPages(pVM, pVM, pVM->pVMR0, RT_ALIGN_Z(pVM->cbSelf, PAGE_SIZE) >> PAGE_SHIFT, pVM->paVMPagesR3, "VM",162 &GCPtr);163 182 if (RT_SUCCESS(rc)) 164 183 { … … 876 895 //pHeap->pbHeapRC = 0; // set by mmR3HyperHeapMap() 877 896 pHeap->pVMR3 = pVM; 897 #ifdef VBOX_BUGREF_9217 898 pHeap->pVMR0 = pVM->pVMR0ForCall; 899 #else 878 900 pHeap->pVMR0 = pVM->pVMR0; 901 #endif 879 902 pHeap->pVMRC = pVM->pVMRC; 880 903 pHeap->cbHeap = cbAligned - MMYPERHEAP_HDR_SIZE; -
trunk/src/VBox/VMM/VMMR3/NEMR3Native-win.cpp
r80191 r80281 53 53 #include <VBox/vmm/dbgftrace.h> 54 54 #include "NEMInternal.h" 55 #include <VBox/vmm/vm .h>55 #include <VBox/vmm/vmcc.h> 56 56 57 57 #include <iprt/ldr.h> … … 1232 1232 * Check out our ring-0 capabilities. 1233 1233 */ 1234 rc = SUPR3CallVMMR0Ex( pVM->pVMR0, 0 /*idCpu*/, VMMR0_DO_NEM_INIT_VM, 0, NULL);1234 rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), 0 /*idCpu*/, VMMR0_DO_NEM_INIT_VM, 0, NULL); 1235 1235 if (RT_SUCCESS(rc)) 1236 1236 { -
trunk/src/VBox/VMM/VMMR3/PDMCritSect.cpp
r80191 r80281 180 180 pCritSect->Core.NativeThreadOwner = NIL_RTNATIVETHREAD; 181 181 pCritSect->pVMR3 = pVM; 182 #ifdef VBOX_BUGREF_9217 183 pCritSect->pVMR0 = pVM->pVMR0ForCall; 184 #else 182 185 pCritSect->pVMR0 = pVM->pVMR0; 186 #endif 183 187 pCritSect->pVMRC = pVM->pVMRC; 184 188 pCritSect->pvKey = pvKey; … … 277 281 #endif 278 282 pCritSect->pVMR3 = pVM; 283 #ifdef VBOX_BUGREF_9217 284 pCritSect->pVMR0 = pVM->pVMR0ForCall; 285 #else 279 286 pCritSect->pVMR0 = pVM->pVMR0; 287 #endif 280 288 pCritSect->pVMRC = pVM->pVMRC; 281 289 pCritSect->pvKey = pvKey; -
trunk/src/VBox/VMM/VMMR3/PDMDevHlp.cpp
r80191 r80281 34 34 #include <VBox/vmm/dbgf.h> 35 35 #include <VBox/vmm/vmapi.h> 36 #include <VBox/vmm/vm.h>37 #include <VBox/vmm/uvm.h>38 36 #include <VBox/vmm/vmm.h> 37 #include <VBox/vmm/vmcc.h> 39 38 40 39 #include <VBox/version.h> … … 2711 2710 Req.u32Alignment = 0; 2712 2711 Req.u64Arg = u64Arg; 2713 rc = SUPR3CallVMMR0Ex( pVM->pVMR0, NIL_VMCPUID, VMMR0_DO_PDM_DEVICE_CALL_REQ_HANDLER, 0, &Req.Hdr);2712 rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), NIL_VMCPUID, VMMR0_DO_PDM_DEVICE_CALL_REQ_HANDLER, 0, &Req.Hdr); 2714 2713 } 2715 2714 else -
trunk/src/VBox/VMM/VMMR3/PDMDevice.cpp
r80191 r80281 331 331 pDevIns->Internal.s.pDevR3 = paDevs[i].pDev; 332 332 pDevIns->Internal.s.pVMR3 = pVM; 333 #ifdef VBOX_BUGREF_9217 334 pDevIns->Internal.s.pVMR0 = pVM->pVMR0ForCall; 335 #else 333 336 pDevIns->Internal.s.pVMR0 = pVM->pVMR0; 337 #endif 334 338 pDevIns->Internal.s.pVMRC = pVM->pVMRC; 335 339 //pDevIns->Internal.s.pLunsR3 = NULL; -
trunk/src/VBox/VMM/VMMR3/PDMDriver.cpp
r80191 r80281 29 29 #include <VBox/vmm/vmm.h> 30 30 #include <VBox/sup.h> 31 #include <VBox/vmm/vm.h> 31 #include <VBox/vmm/vmcc.h> 32 32 33 #include <VBox/version.h> 33 34 #include <VBox/err.h> … … 722 723 pNew->Internal.s.pDrv = pDrv; 723 724 pNew->Internal.s.pVMR3 = pVM; 725 #ifdef VBOX_BUGREF_9217 726 pNew->Internal.s.pVMR0 = pDrv->pReg->fFlags & PDM_DRVREG_FLAGS_R0 ? pVM->pVMR0ForCall : NIL_RTR0PTR; 727 #else 724 728 pNew->Internal.s.pVMR0 = pDrv->pReg->fFlags & PDM_DRVREG_FLAGS_R0 ? pVM->pVMR0 : NIL_RTR0PTR; 729 #endif 725 730 pNew->Internal.s.pVMRC = pDrv->pReg->fFlags & PDM_DRVREG_FLAGS_RC ? pVM->pVMRC : NIL_RTRCPTR; 726 731 //pNew->Internal.s.fDetaching = false; … … 1478 1483 if ( uOperation >= VMMR0_DO_SRV_START 1479 1484 && uOperation < VMMR0_DO_SRV_END) 1480 rc = SUPR3CallVMMR0Ex( pDrvIns->Internal.s.pVMR3->pVMR0, NIL_VMCPUID, uOperation, 0, (PSUPVMMR0REQHDR)pvArg);1485 rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pDrvIns->Internal.s.pVMR3), NIL_VMCPUID, uOperation, 0, (PSUPVMMR0REQHDR)pvArg); 1481 1486 else 1482 1487 { … … 1764 1769 Req.u32Alignment = 0; 1765 1770 Req.u64Arg = u64Arg; 1766 rc = SUPR3CallVMMR0Ex( pVM->pVMR0, NIL_VMCPUID, VMMR0_DO_PDM_DRIVER_CALL_REQ_HANDLER, 0, &Req.Hdr);1771 rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), NIL_VMCPUID, VMMR0_DO_PDM_DRIVER_CALL_REQ_HANDLER, 0, &Req.Hdr); 1767 1772 } 1768 1773 -
trunk/src/VBox/VMM/VMMR3/PDMQueue.cpp
r80191 r80281 89 89 */ 90 90 pQueue->pVMR3 = pVM; 91 #ifdef VBOX_BUGREF_9217 92 pQueue->pVMR0 = fRZEnabled ? pVM->pVMR0ForCall : NIL_RTR0PTR; 93 #else 91 94 pQueue->pVMR0 = fRZEnabled ? pVM->pVMR0 : NIL_RTR0PTR; 95 #endif 92 96 pQueue->pVMRC = fRZEnabled ? pVM->pVMRC : NIL_RTRCPTR; 93 97 pQueue->pszName = pszName; -
trunk/src/VBox/VMM/VMMR3/PGMPhys.cpp
r80191 r80281 33 33 #include <VBox/vmm/pdmdev.h> 34 34 #include "PGMInternal.h" 35 #include <VBox/vmm/vm .h>36 #include <VBox/vmm/uvm.h> 35 #include <VBox/vmm/vmcc.h> 36 37 37 #include "PGMInline.h" 38 38 39 #include <VBox/sup.h> 39 40 #include <VBox/param.h> … … 5006 5007 /* Must be callable from any thread, so can't use VMMR3CallR0. */ 5007 5008 STAM_PROFILE_START(&pVM->pgm.s.CTX_SUFF(pStats)->StatChunkMap, a); 5008 rc = SUPR3CallVMMR0Ex( pVM->pVMR0, NIL_VMCPUID, VMMR0_DO_GMM_MAP_UNMAP_CHUNK, 0, &Req.Hdr);5009 rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), NIL_VMCPUID, VMMR0_DO_GMM_MAP_UNMAP_CHUNK, 0, &Req.Hdr); 5009 5010 STAM_PROFILE_STOP(&pVM->pgm.s.CTX_SUFF(pStats)->StatChunkMap, a); 5010 5011 if (RT_SUCCESS(rc)) -
trunk/src/VBox/VMM/VMMR3/PGMPool.cpp
r80191 r80281 240 240 */ 241 241 pPool->pVMR3 = pVM; 242 #ifdef VBOX_BUGREF_9217 243 pPool->pVMR0 = pVM->pVMR0ForCall; 244 #else 242 245 pPool->pVMR0 = pVM->pVMR0; 246 #endif 243 247 pPool->cMaxPages = cMaxPages; 244 248 pPool->cCurPages = PGMPOOL_IDX_FIRST; -
trunk/src/VBox/VMM/VMMR3/STAM.cpp
r80191 r80281 53 53 #include <VBox/vmm/stam.h> 54 54 #include "STAMInternal.h" 55 #include <VBox/vmm/vm .h>56 #include <VBox/vmm/uvm.h> 55 #include <VBox/vmm/vmcc.h> 56 57 57 #include <VBox/err.h> 58 58 #include <VBox/dbg.h> … … 1740 1740 GVMMReq.Hdr.u32Magic = SUPVMMR0REQHDR_MAGIC; 1741 1741 GVMMReq.pSession = pVM->pSession; 1742 rc = SUPR3CallVMMR0Ex( pVM->pVMR0, NIL_VMCPUID, VMMR0_DO_GVMM_RESET_STATISTICS, 0, &GVMMReq.Hdr);1742 rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), NIL_VMCPUID, VMMR0_DO_GVMM_RESET_STATISTICS, 0, &GVMMReq.Hdr); 1743 1743 } 1744 1744 … … 1749 1749 GMMReq.Hdr.u32Magic = SUPVMMR0REQHDR_MAGIC; 1750 1750 GMMReq.pSession = pVM->pSession; 1751 rc = SUPR3CallVMMR0Ex( pVM->pVMR0, NIL_VMCPUID, VMMR0_DO_GMM_RESET_STATISTICS, 0, &GMMReq.Hdr);1751 rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), NIL_VMCPUID, VMMR0_DO_GMM_RESET_STATISTICS, 0, &GMMReq.Hdr); 1752 1752 } 1753 1753 … … 2457 2457 Req.Hdr.u32Magic = SUPVMMR0REQHDR_MAGIC; 2458 2458 Req.pSession = pVM->pSession; 2459 int rc = SUPR3CallVMMR0Ex( pVM->pVMR0, NIL_VMCPUID, VMMR0_DO_GVMM_QUERY_STATISTICS, 0, &Req.Hdr);2459 int rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), NIL_VMCPUID, VMMR0_DO_GVMM_QUERY_STATISTICS, 0, &Req.Hdr); 2460 2460 if (RT_SUCCESS(rc)) 2461 2461 { … … 2519 2519 Req.Hdr.u32Magic = SUPVMMR0REQHDR_MAGIC; 2520 2520 Req.pSession = pVM->pSession; 2521 int rc = SUPR3CallVMMR0Ex( pVM->pVMR0, NIL_VMCPUID, VMMR0_DO_GMM_QUERY_STATISTICS, 0, &Req.Hdr);2521 int rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), NIL_VMCPUID, VMMR0_DO_GMM_QUERY_STATISTICS, 0, &Req.Hdr); 2522 2522 if (RT_SUCCESS(rc)) 2523 2523 pUVM->stam.s.GMMStats = Req.Stats; … … 2529 2529 */ 2530 2530 case STAM_REFRESH_GRP_NEM: 2531 SUPR3CallVMMR0( pVM->pVMR0, NIL_VMCPUID, VMMR0_DO_NEM_UPDATE_STATISTICS, NULL);2531 SUPR3CallVMMR0(VMCC_GET_VMR0_FOR_CALL(pVM), NIL_VMCPUID, VMMR0_DO_NEM_UPDATE_STATISTICS, NULL); 2532 2532 break; 2533 2533 -
trunk/src/VBox/VMM/VMMR3/TM.cpp
r80191 r80281 1151 1151 { 1152 1152 pTimer->pVMRC = pVM->pVMRC; 1153 #ifdef VBOX_BUGREF_9217 1154 pTimer->pVMR0 = pVM->pVMR0ForCall; /** @todo fix properly */ 1155 #else 1153 1156 pTimer->pVMR0 = pVM->pVMR0; 1157 #endif 1154 1158 } 1155 1159 } … … 1529 1533 pTimer->enmClock = enmClock; 1530 1534 pTimer->pVMR3 = pVM; 1535 #ifdef VBOX_BUGREF_9217 1536 pTimer->pVMR0 = pVM->pVMR0ForCall; /** @todo fix properly */ 1537 #else 1531 1538 pTimer->pVMR0 = pVM->pVMR0; 1539 #endif 1532 1540 pTimer->pVMRC = pVM->pVMRC; 1533 1541 pTimer->enmState = TMTIMERSTATE_STOPPED; -
trunk/src/VBox/VMM/VMMR3/VM.cpp
r80191 r80281 71 71 #include <VBox/vmm/gim.h> 72 72 #include "VMInternal.h" 73 #include <VBox/vmm/vm.h> 74 #include <VBox/vmm/uvm.h> 73 #include <VBox/vmm/vmcc.h> 75 74 76 75 #include <VBox/sup.h> … … 584 583 PVM pVM = pUVM->pVM = CreateVMReq.pVMR3; 585 584 AssertRelease(VALID_PTR(pVM)); 585 #ifdef VBOX_BUGREF_9217 586 AssertRelease(pVM->pVMR0ForCall == CreateVMReq.pVMR0); 587 #else 586 588 AssertRelease(pVM->pVMR0 == CreateVMReq.pVMR0); 589 #endif 587 590 AssertRelease(pVM->pSession == pUVM->vm.s.pSession); 588 591 AssertRelease(pVM->cCpus == cCpus); … … 592 595 593 596 Log(("VMR3Create: Created pUVM=%p pVM=%p pVMR0=%p hSelf=%#x cCpus=%RU32\n", 594 pUVM, pVM, pVM->pVMR0, pVM->hSelf, pVM->cCpus));597 pUVM, pVM, CreateVMReq.pVMR0, pVM->hSelf, pVM->cCpus)); 595 598 596 599 /* … … 789 792 { 790 793 Assert(VMMGetCpuId(pVM) == idCpu); 791 int rc = SUPR3CallVMMR0Ex( pVM->pVMR0, idCpu, VMMR0_DO_GVMM_REGISTER_VMCPU, 0, NULL);794 int rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), idCpu, VMMR0_DO_GVMM_REGISTER_VMCPU, 0, NULL); 792 795 if (RT_FAILURE(rc)) 793 796 LogRel(("idCpu=%u rc=%Rrc\n", idCpu, rc)); -
trunk/src/VBox/VMM/VMMR3/VMEmt.cpp
r80191 r80281 32 32 #include <VBox/vmm/tm.h> 33 33 #include "VMInternal.h" 34 #include <VBox/vmm/vm.h> 35 #include <VBox/vmm/uvm.h> 34 #include <VBox/vmm/vmcc.h> 36 35 37 36 #include <VBox/err.h> … … 290 289 } 291 290 292 int rc2 = SUPR3CallVMMR0Ex( pVM->pVMR0, 0 /*idCpu*/, VMMR0_DO_GVMM_DESTROY_VM, 0, NULL);291 int rc2 = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), 0 /*idCpu*/, VMMR0_DO_GVMM_DESTROY_VM, 0, NULL); 293 292 AssertLogRelRC(rc2); 294 293 } … … 297 296 && (pVM = pUVM->pVM) != NULL) 298 297 { 299 int rc2 = SUPR3CallVMMR0Ex( pVM->pVMR0, idCpu, VMMR0_DO_GVMM_DEREGISTER_VMCPU, 0, NULL);298 int rc2 = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), idCpu, VMMR0_DO_GVMM_DEREGISTER_VMCPU, 0, NULL); 300 299 AssertLogRelRC(rc2); 301 300 } … … 752 751 //RTLogPrintf("loop=%-3d u64GipTime=%'llu / %'llu now=%'llu / %'llu\n", cLoops, u64GipTime, u64Delta, u64NowLog, u64GipTime - u64NowLog); 753 752 uint64_t const u64StartSchedHalt = RTTimeNanoTS(); 754 rc = SUPR3CallVMMR0Ex( pVM->pVMR0, pVCpu->idCpu, VMMR0_DO_GVMM_SCHED_HALT, u64GipTime, NULL);753 rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), pVCpu->idCpu, VMMR0_DO_GVMM_SCHED_HALT, u64GipTime, NULL); 755 754 uint64_t const u64EndSchedHalt = RTTimeNanoTS(); 756 755 uint64_t const cNsElapsedSchedHalt = u64EndSchedHalt - u64StartSchedHalt; … … 782 781 { 783 782 uint64_t const u64StartSchedYield = RTTimeNanoTS(); 784 rc = SUPR3CallVMMR0Ex( pVM->pVMR0, pVCpu->idCpu, VMMR0_DO_GVMM_SCHED_POLL, false /* don't yield */, NULL);783 rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), pVCpu->idCpu, VMMR0_DO_GVMM_SCHED_POLL, false /* don't yield */, NULL); 785 784 uint64_t const cNsElapsedSchedYield = RTTimeNanoTS() - u64StartSchedYield; 786 785 STAM_REL_PROFILE_ADD_PERIOD(&pUVCpu->vm.s.StatHaltYield, cNsElapsedSchedYield); … … 822 821 * anything needs our attention. 823 822 */ 824 rc = SUPR3CallVMMR0Ex( pVM->pVMR0, pVCpu->idCpu, VMMR0_DO_GVMM_SCHED_HALT, RTTimeNanoTS() + 1000000000 /* +1s */, NULL);823 rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), pVCpu->idCpu, VMMR0_DO_GVMM_SCHED_HALT, RTTimeNanoTS() + 1000000000 /* +1s */, NULL); 825 824 if (rc == VERR_INTERRUPTED) 826 825 rc = VINF_SUCCESS; … … 855 854 if (enmState == VMCPUSTATE_STARTED_HALTED || pUVCpu->vm.s.fWait) 856 855 { 857 int rc = SUPR3CallVMMR0Ex( pUVCpu->pVM->pVMR0, pUVCpu->idCpu, VMMR0_DO_GVMM_SCHED_WAKE_UP, 0, NULL);856 int rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pUVCpu->pVM), pUVCpu->idCpu, VMMR0_DO_GVMM_SCHED_WAKE_UP, 0, NULL); 858 857 AssertRC(rc); 859 858 … … 866 865 if (fFlags & VMNOTIFYFF_FLAGS_POKE) 867 866 { 868 int rc = SUPR3CallVMMR0Ex( pUVCpu->pVM->pVMR0, pUVCpu->idCpu, VMMR0_DO_GVMM_SCHED_POKE, 0, NULL);867 int rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pUVCpu->pVM), pUVCpu->idCpu, VMMR0_DO_GVMM_SCHED_POKE, 0, NULL); 869 868 AssertRC(rc); 870 869 } … … 885 884 else if (pUVCpu->vm.s.fWait) 886 885 { 887 int rc = SUPR3CallVMMR0Ex( pUVCpu->pVM->pVMR0, pUVCpu->idCpu, VMMR0_DO_GVMM_SCHED_WAKE_UP, 0, NULL);886 int rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pUVCpu->pVM), pUVCpu->idCpu, VMMR0_DO_GVMM_SCHED_WAKE_UP, 0, NULL); 888 887 AssertRC(rc); 889 888 } -
trunk/src/VBox/VMM/VMMR3/VMM.cpp
r80191 r80281 128 128 #include <VBox/vmm/tm.h> 129 129 #include "VMMInternal.h" 130 #include <VBox/vmm/vm.h> 131 #include <VBox/vmm/uvm.h> 130 #include <VBox/vmm/vmcc.h> 132 131 133 132 #include <VBox/err.h> … … 273 272 * Register the Ring-0 VM handle with the session for fast ioctl calls. 274 273 */ 275 rc = SUPR3SetVMForFastIOCtl( pVM->pVMR0);274 rc = SUPR3SetVMForFastIOCtl(VMCC_GET_VMR0_FOR_CALL(pVM)); 276 275 if (RT_FAILURE(rc)) 277 276 return rc; … … 383 382 if (RT_FAILURE(rc)) 384 383 return rc; 385 pVCpu->vmm.s.pR0LoggerR3->pVM = pVM->pVMR0;384 pVCpu->vmm.s.pR0LoggerR3->pVM = VMCC_GET_VMR0_FOR_CALL(pVM); 386 385 //pVCpu->vmm.s.pR0LoggerR3->fCreated = false; 387 386 pVCpu->vmm.s.pR0LoggerR3->cbLogger = (uint32_t)cbLogger; … … 420 419 RTR0PTR R0PtrVmmLogger = MMHyperR3ToR0(pVM, pVmmLogger); 421 420 pVCpu->vmm.s.pR0RelLoggerR0 = R0PtrVmmLogger; 422 pVmmLogger->pVM = pVM->pVMR0;421 pVmmLogger->pVM = VMCC_GET_VMR0_FOR_CALL(pVM); 423 422 pVmmLogger->cbLogger = (uint32_t)cbLogger; 424 423 pVmmLogger->fCreated = false; … … 598 597 rc = VINF_SUCCESS; 599 598 #else 600 rc = SUPR3CallVMMR0Ex( pVM->pVMR0, 0 /*idCpu*/, VMMR0_DO_VMMR0_INIT, RT_MAKE_U64(VMMGetSvnRev(), vmmGetBuildType()), NULL);599 rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), 0 /*idCpu*/, VMMR0_DO_VMMR0_INIT, RT_MAKE_U64(VMMGetSvnRev(), vmmGetBuildType()), NULL); 601 600 #endif 602 601 /* … … 728 727 rc = VINF_SUCCESS; 729 728 #else 730 rc = SUPR3CallVMMR0Ex( pVM->pVMR0, 0 /*idCpu*/, VMMR0_DO_VMMR0_TERM, 0, NULL);729 rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), 0 /*idCpu*/, VMMR0_DO_VMMR0_TERM, 0, NULL); 731 730 #endif 732 731 /* … … 1104 1103 rc = VERR_GENERAL_FAILURE; 1105 1104 #else 1106 rc = SUPR3CallVMMR0Fast( pVM->pVMR0, VMMR0_DO_HM_RUN, pVCpu->idCpu);1105 rc = SUPR3CallVMMR0Fast(VMCC_GET_VMR0_FOR_CALL(pVM), VMMR0_DO_HM_RUN, pVCpu->idCpu); 1107 1106 if (RT_LIKELY(rc == VINF_SUCCESS)) 1108 1107 rc = pVCpu->vmm.s.iLastGZRc; … … 1152 1151 rcStrict = VERR_GENERAL_FAILURE; 1153 1152 #else 1154 rcStrict = SUPR3CallVMMR0Fast( pVM->pVMR0, enmOperation, pVCpu->idCpu);1153 rcStrict = SUPR3CallVMMR0Fast(VMCC_GET_VMR0_FOR_CALL(pVM), enmOperation, pVCpu->idCpu); 1155 1154 if (RT_LIKELY(rcStrict == VINF_SUCCESS)) 1156 1155 rcStrict = pVCpu->vmm.s.iLastGZRc; … … 2312 2311 rc = VERR_GENERAL_FAILURE; 2313 2312 #else 2314 rc = SUPR3CallVMMR0Ex( pVM->pVMR0, pVCpu->idCpu, enmOperation, u64Arg, pReqHdr);2313 rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), pVCpu->idCpu, enmOperation, u64Arg, pReqHdr); 2315 2314 #endif 2316 2315 /* -
trunk/src/VBox/VMM/VMMRZ/CPUMRZ.cpp
r80274 r80281 24 24 #include <VBox/vmm/cpum.h> 25 25 #include "CPUMInternal.h" 26 #include <VBox/vmm/vm.h> 26 #include <VBox/vmm/vmcc.h> 27 27 28 #include <VBox/err.h> 28 29 #include <VBox/log.h> … … 44 45 * @param pVCpu The cross context virtual CPU structure. 45 46 */ 46 VMMRZ_INT_DECL(void) CPUMRZFpuStatePrepareHostCpuForUse(PVMCPU pVCpu)47 VMMRZ_INT_DECL(void) CPUMRZFpuStatePrepareHostCpuForUse(PVMCPUCC pVCpu) 47 48 { 48 49 pVCpu->cpum.s.fChanged |= CPUM_CHANGED_FPU_REM; … … 82 83 * @param pVCpu The cross context virtual CPU structure. 83 84 */ 84 VMMRZ_INT_DECL(void) CPUMRZFpuStateActualizeForChange(PVMCPU pVCpu)85 VMMRZ_INT_DECL(void) CPUMRZFpuStateActualizeForChange(PVMCPUCC pVCpu) 85 86 { 86 87 CPUMRZFpuStatePrepareHostCpuForUse(pVCpu); … … 95 96 * @param pVCpu The cross context virtual CPU structure. 96 97 */ 97 VMMRZ_INT_DECL(void) CPUMRZFpuStateActualizeForRead(PVMCPU pVCpu)98 VMMRZ_INT_DECL(void) CPUMRZFpuStateActualizeForRead(PVMCPUCC pVCpu) 98 99 { 99 100 if (pVCpu->cpum.s.fUseFlags & CPUM_USED_FPU_GUEST) … … 113 114 * @param pVCpu The cross context virtual CPU structure. 114 115 */ 115 VMMRZ_INT_DECL(void) CPUMRZFpuStateActualizeSseForRead(PVMCPU pVCpu)116 VMMRZ_INT_DECL(void) CPUMRZFpuStateActualizeSseForRead(PVMCPUCC pVCpu) 116 117 { 117 118 #if defined(VBOX_WITH_KERNEL_USING_XMM) && HC_ARCH_BITS == 64 … … 134 135 * @param pVCpu The cross context virtual CPU structure. 135 136 */ 136 VMMRZ_INT_DECL(void) CPUMRZFpuStateActualizeAvxForRead(PVMCPU pVCpu)137 VMMRZ_INT_DECL(void) CPUMRZFpuStateActualizeAvxForRead(PVMCPUCC pVCpu) 137 138 { 138 139 if (pVCpu->cpum.s.fUseFlags & CPUM_USED_FPU_GUEST) -
trunk/src/VBox/VMM/include/APICInternal.h
r80062 r80281 1428 1428 uint8_t uVector, uint8_t uPolarity, uint8_t uTriggerMode, uint32_t uSrcTag); 1429 1429 1430 VMM_INT_DECL(bool) apicPostInterrupt(PVMCPU pVCpu, uint8_t uVector, XAPICTRIGGERMODE enmTriggerMode, uint32_t uSrcTag);1431 VMM_INT_DECL(void) apicStartTimer(PVMCPU pVCpu, uint32_t uInitialCount);1432 VMM_INT_DECL(void) apicClearInterruptFF(PVMCPU pVCpu, PDMAPICIRQ enmType);1433 void apicInitIpi(PVMCPU pVCpu);1434 void apicResetCpu(PVMCPU pVCpu, bool fResetApicBaseMsr);1430 VMM_INT_DECL(bool) apicPostInterrupt(PVMCPUCC pVCpu, uint8_t uVector, XAPICTRIGGERMODE enmTriggerMode, uint32_t uSrcTag); 1431 VMM_INT_DECL(void) apicStartTimer(PVMCPUCC pVCpu, uint32_t uInitialCount); 1432 VMM_INT_DECL(void) apicClearInterruptFF(PVMCPUCC pVCpu, PDMAPICIRQ enmType); 1433 void apicInitIpi(PVMCPUCC pVCpu); 1434 void apicResetCpu(PVMCPUCC pVCpu, bool fResetApicBaseMsr); 1435 1435 1436 1436 RT_C_DECLS_END -
trunk/src/VBox/VMM/include/GIMHvInternal.h
r80268 r80281 1321 1321 1322 1322 #ifdef IN_RING0 1323 VMMR0_INT_DECL(int) gimR0HvInitVM(PVM pVM);1324 VMMR0_INT_DECL(int) gimR0HvTermVM(PVM pVM);1325 VMMR0_INT_DECL(int) gimR0HvUpdateParavirtTsc(PVM pVM, uint64_t u64Offset);1323 VMMR0_INT_DECL(int) gimR0HvInitVM(PVMCC pVM); 1324 VMMR0_INT_DECL(int) gimR0HvTermVM(PVMCC pVM); 1325 VMMR0_INT_DECL(int) gimR0HvUpdateParavirtTsc(PVMCC pVM, uint64_t u64Offset); 1326 1326 #endif /* IN_RING0 */ 1327 1327 -
trunk/src/VBox/VMM/include/GIMKvmInternal.h
r80268 r80281 247 247 248 248 #ifdef IN_RING0 249 VMMR0_INT_DECL(int) gimR0KvmInitVM(PVM pVM);250 VMMR0_INT_DECL(int) gimR0KvmTermVM(PVM pVM);251 VMMR0_INT_DECL(int) gimR0KvmUpdateSystemTime(PVM pVM, PVMCPUpVCpu);249 VMMR0_INT_DECL(int) gimR0KvmInitVM(PVMCC pVM); 250 VMMR0_INT_DECL(int) gimR0KvmTermVM(PVMCC pVM); 251 VMMR0_INT_DECL(int) gimR0KvmUpdateSystemTime(PVMCC pVM, PVMCPUCC pVCpu); 252 252 #endif /* IN_RING0 */ 253 253 … … 272 272 VMM_INT_DECL(VBOXSTRICTRC) gimKvmWriteMsr(PVMCPUCC pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t uRawValue); 273 273 VMM_INT_DECL(bool) gimKvmShouldTrapXcptUD(PVM pVM); 274 VMM_INT_DECL(VBOXSTRICTRC) gimKvmXcptUD(PVM pVM, PVMCPUCC pVCpu, PCPUMCTX pCtx, PDISCPUSTATE pDis, uint8_t *pcbInstr);274 VMM_INT_DECL(VBOXSTRICTRC) gimKvmXcptUD(PVMCC pVM, PVMCPUCC pVCpu, PCPUMCTX pCtx, PDISCPUSTATE pDis, uint8_t *pcbInstr); 275 275 VMM_INT_DECL(VBOXSTRICTRC) gimKvmHypercallEx(PVMCPUCC pVCpu, PCPUMCTX pCtx, unsigned uDisOpcode, uint8_t cbInstr); 276 276 -
trunk/src/VBox/VMM/include/HMInternal.h
r80274 r80281 1171 1171 #ifdef IN_RING0 1172 1172 VMMR0_INT_DECL(PHMPHYSCPU) hmR0GetCurrentCpu(void); 1173 VMMR0_INT_DECL(int) hmR0EnterCpu(PVMCPU pVCpu);1173 VMMR0_INT_DECL(int) hmR0EnterCpu(PVMCPUCC pVCpu); 1174 1174 1175 1175 # ifdef VBOX_STRICT … … 1179 1179 # define HM_DUMP_REG_FLAGS_ALL (HM_DUMP_REG_FLAGS_GPRS | HM_DUMP_REG_FLAGS_FPU | HM_DUMP_REG_FLAGS_MSRS) 1180 1180 1181 VMMR0_INT_DECL(void) hmR0DumpRegs(PVMCPU pVCpu, uint32_t fFlags);1181 VMMR0_INT_DECL(void) hmR0DumpRegs(PVMCPUCC pVCpu, uint32_t fFlags); 1182 1182 VMMR0_INT_DECL(void) hmR0DumpDescriptor(PCX86DESCHC pDesc, RTSEL Sel, const char *pszMsg); 1183 1183 # endif 1184 1184 1185 1185 # ifdef VBOX_WITH_KERNEL_USING_XMM 1186 DECLASM(int) hmR0VMXStartVMWrapXMM(RTHCUINT fResume, PCPUMCTX pCtx, void *pvUnused, PVM pVM, PVMCPUpVCpu,1186 DECLASM(int) hmR0VMXStartVMWrapXMM(RTHCUINT fResume, PCPUMCTX pCtx, void *pvUnused, PVMCC pVM, PVMCPUCC pVCpu, 1187 1187 PFNHMVMXSTARTVM pfnStartVM); 1188 DECLASM(int) hmR0SVMRunWrapXMM(RTHCPHYS pVmcbHostPhys, RTHCPHYS pVmcbPhys, PCPUMCTX pCtx, PVM pVM, PVMCPUpVCpu,1188 DECLASM(int) hmR0SVMRunWrapXMM(RTHCPHYS pVmcbHostPhys, RTHCPHYS pVmcbPhys, PCPUMCTX pCtx, PVMCC pVM, PVMCPUCC pVCpu, 1189 1189 PFNHMSVMVMRUN pfnVMRun); 1190 1190 # endif -
trunk/src/VBox/VMM/include/IOMInline.h
r76585 r80281 131 131 * @param pRange The range to release. 132 132 */ 133 DECLINLINE(void) iomMmioReleaseRange(PVM pVM, PIOMMMIORANGE pRange)133 DECLINLINE(void) iomMmioReleaseRange(PVMCC pVM, PIOMMMIORANGE pRange) 134 134 { 135 135 uint32_t cRefs = ASMAtomicDecU32(&pRange->cRefs); -
trunk/src/VBox/VMM/include/IOMInternal.h
r80090 r80281 454 454 RT_C_DECLS_BEGIN 455 455 456 void iomMmioFreeRange(PVM pVM, PIOMMMIORANGE pRange);456 void iomMmioFreeRange(PVMCC pVM, PIOMMMIORANGE pRange); 457 457 #ifdef IN_RING3 458 458 PIOMMMIOSTATS iomR3MMIOStatsCreate(PVM pVM, RTGCPHYS GCPhys, const char *pszDesc); -
trunk/src/VBox/VMM/include/NEMInternal.h
r80274 r80281 428 428 #endif 429 429 430 void nemHCNativeNotifyHandlerPhysicalRegister(PVM pVM, PGMPHYSHANDLERKIND enmKind, RTGCPHYS GCPhys, RTGCPHYS cb);431 void nemHCNativeNotifyHandlerPhysicalDeregister(PVM pVM, PGMPHYSHANDLERKIND enmKind, RTGCPHYS GCPhys, RTGCPHYS cb,430 void nemHCNativeNotifyHandlerPhysicalRegister(PVMCC pVM, PGMPHYSHANDLERKIND enmKind, RTGCPHYS GCPhys, RTGCPHYS cb); 431 void nemHCNativeNotifyHandlerPhysicalDeregister(PVMCC pVM, PGMPHYSHANDLERKIND enmKind, RTGCPHYS GCPhys, RTGCPHYS cb, 432 432 int fRestoreAsRAM, bool fRestoreAsRAM2); 433 void nemHCNativeNotifyHandlerPhysicalModify(PVM pVM, PGMPHYSHANDLERKIND enmKind, RTGCPHYS GCPhysOld,433 void nemHCNativeNotifyHandlerPhysicalModify(PVMCC pVM, PGMPHYSHANDLERKIND enmKind, RTGCPHYS GCPhysOld, 434 434 RTGCPHYS GCPhysNew, RTGCPHYS cb, bool fRestoreAsRAM); 435 int nemHCNativeNotifyPhysPageAllocated(PVM pVM, RTGCPHYS GCPhys, RTHCPHYS HCPhys, uint32_t fPageProt,435 int nemHCNativeNotifyPhysPageAllocated(PVMCC pVM, RTGCPHYS GCPhys, RTHCPHYS HCPhys, uint32_t fPageProt, 436 436 PGMPAGETYPE enmType, uint8_t *pu2State); 437 void nemHCNativeNotifyPhysPageProtChanged(PVM pVM, RTGCPHYS GCPhys, RTHCPHYS HCPhys, uint32_t fPageProt,437 void nemHCNativeNotifyPhysPageProtChanged(PVMCC pVM, RTGCPHYS GCPhys, RTHCPHYS HCPhys, uint32_t fPageProt, 438 438 PGMPAGETYPE enmType, uint8_t *pu2State); 439 void nemHCNativeNotifyPhysPageChanged(PVM pVM, RTGCPHYS GCPhys, RTHCPHYS HCPhysPrev, RTHCPHYS HCPhysNew, uint32_t fPageProt,439 void nemHCNativeNotifyPhysPageChanged(PVMCC pVM, RTGCPHYS GCPhys, RTHCPHYS HCPhysPrev, RTHCPHYS HCPhysNew, uint32_t fPageProt, 440 440 PGMPAGETYPE enmType, uint8_t *pu2State); 441 441 -
trunk/src/VBox/VMM/include/PDMInternal.h
r80274 r80281 285 285 PVMR3 pVMR3; 286 286 /** Pointer to the VM - R0Ptr. */ 287 PVMR0pVMR0;287 R0PTRTYPE(PVMCC) pVMR0; 288 288 /** Pointer to the VM - GCPtr. */ 289 289 PVMRC pVMRC; … … 338 338 PVMR3 pVMR3; 339 339 /** Pointer to the VM - R0Ptr. */ 340 PVMR0pVMR0;340 R0PTRTYPE(PVMCC) pVMR0; 341 341 /** Pointer to the VM - GCPtr. */ 342 342 PVMRC pVMRC; … … 1307 1307 #endif /* IN_RING3 */ 1308 1308 1309 void pdmLock(PVM pVM);1310 int pdmLockEx(PVM pVM, int rc);1311 void pdmUnlock(PVM pVM);1309 void pdmLock(PVMCC pVM); 1310 int pdmLockEx(PVMCC pVM, int rc); 1311 void pdmUnlock(PVMCC pVM); 1312 1312 1313 1313 #if defined(IN_RING3) || defined(IN_RING0) -
trunk/src/VBox/VMM/include/PGMInternal.h
r80268 r80281 3838 3838 3839 3839 #if defined(VBOX_STRICT) && defined(IN_RING3) 3840 int pgmLockDebug(PVM pVM, RT_SRC_POS_DECL);3840 int pgmLockDebug(PVMCC pVM, RT_SRC_POS_DECL); 3841 3841 # define pgmLock(a_pVM) pgmLockDebug(a_pVM, RT_SRC_POS) 3842 3842 #else 3843 int pgmLock(PVM pVM);3843 int pgmLock(PVMCC pVM); 3844 3844 #endif 3845 3845 void pgmUnlock(PVM pVM); … … 3867 3867 #endif /* !PGM_WITHOUT_MAPPINGS */ 3868 3868 3869 int pgmHandlerPhysicalExCreate(PVM pVM, PGMPHYSHANDLERTYPE hType, RTR3PTR pvUserR3, RTR0PTR pvUserR0,3869 int pgmHandlerPhysicalExCreate(PVMCC pVM, PGMPHYSHANDLERTYPE hType, RTR3PTR pvUserR3, RTR0PTR pvUserR0, 3870 3870 RTRCPTR pvUserRC, R3PTRTYPE(const char *) pszDesc, PPGMPHYSHANDLER *ppPhysHandler); 3871 int pgmHandlerPhysicalExDup(PVM pVM, PPGMPHYSHANDLER pPhysHandlerSrc, PPGMPHYSHANDLER *ppPhysHandler);3871 int pgmHandlerPhysicalExDup(PVMCC pVM, PPGMPHYSHANDLER pPhysHandlerSrc, PPGMPHYSHANDLER *ppPhysHandler); 3872 3872 int pgmHandlerPhysicalExRegister(PVMCC pVM, PPGMPHYSHANDLER pPhysHandler, RTGCPHYS GCPhys, RTGCPHYS GCPhysLast); 3873 3873 int pgmHandlerPhysicalExDeregister(PVMCC pVM, PPGMPHYSHANDLER pPhysHandler, int fRestoreAsRAM); 3874 int pgmHandlerPhysicalExDestroy(PVM pVM, PPGMPHYSHANDLER pHandler);3874 int pgmHandlerPhysicalExDestroy(PVMCC pVM, PPGMPHYSHANDLER pHandler); 3875 3875 void pgmR3HandlerPhysicalUpdateAll(PVM pVM); 3876 3876 bool pgmHandlerPhysicalIsAll(PVMCC pVM, RTGCPHYS GCPhys); … … 3904 3904 int pgmPhysFreePage(PVM pVM, PGMMFREEPAGESREQ pReq, uint32_t *pcPendingPages, PPGMPAGE pPage, RTGCPHYS GCPhys, 3905 3905 PGMPAGETYPE enmNewType); 3906 void pgmPhysInvalidRamRangeTlbs(PVM pVM);3907 void pgmPhysInvalidatePageMapTLB(PVM pVM);3906 void pgmPhysInvalidRamRangeTlbs(PVMCC pVM); 3907 void pgmPhysInvalidatePageMapTLB(PVMCC pVM); 3908 3908 void pgmPhysInvalidatePageMapTLBEntry(PVM pVM, RTGCPHYS GCPhys); 3909 3909 PPGMRAMRANGE pgmPhysGetRangeSlow(PVM pVM, RTGCPHYS GCPhys); … … 3942 3942 # endif 3943 3943 #endif 3944 int pgmPoolAlloc(PVM pVM, RTGCPHYS GCPhys, PGMPOOLKIND enmKind, PGMPOOLACCESS enmAccess, bool fA20Enabled,3944 int pgmPoolAlloc(PVMCC pVM, RTGCPHYS GCPhys, PGMPOOLKIND enmKind, PGMPOOLACCESS enmAccess, bool fA20Enabled, 3945 3945 uint16_t iUser, uint32_t iUserTable, bool fLockPage, PPPGMPOOLPAGE ppPage); 3946 3946 void pgmPoolFree(PVM pVM, RTHCPHYS HCPhys, uint16_t iUser, uint32_t iUserTable); … … 3955 3955 int pgmPoolTrackUpdateGCPhys(PVMCC pVM, RTGCPHYS GCPhysPage, PPGMPAGE pPhysPage, bool fFlushPTEs, bool *pfFlushTLBs); 3956 3956 void pgmPoolTracDerefGCPhysHint(PPGMPOOL pPool, PPGMPOOLPAGE pPage, RTHCPHYS HCPhys, RTGCPHYS GCPhysHint, uint16_t iPte); 3957 uint16_t pgmPoolTrackPhysExtAddref(PVM pVM, PPGMPAGE pPhysPage, uint16_t u16, uint16_t iShwPT, uint16_t iPte);3957 uint16_t pgmPoolTrackPhysExtAddref(PVMCC pVM, PPGMPAGE pPhysPage, uint16_t u16, uint16_t iShwPT, uint16_t iPte); 3958 3958 void pgmPoolTrackPhysExtDerefGCPhys(PPGMPOOL pPool, PPGMPOOLPAGE pPoolPage, PPGMPAGE pPhysPage, uint16_t iPte); 3959 3959 void pgmPoolMonitorChainFlush(PPGMPOOL pPool, PPGMPOOLPAGE pPage); -
trunk/src/VBox/VMM/include/TMInternal.h
r80268 r80281 789 789 int tmCpuTickResumeLocked(PVMCC pVM, PVMCPUCC pVCpu); 790 790 791 int tmVirtualPauseLocked(PVM pVM);792 int tmVirtualResumeLocked(PVM pVM);791 int tmVirtualPauseLocked(PVMCC pVM); 792 int tmVirtualResumeLocked(PVMCC pVM); 793 793 DECLCALLBACK(DECLEXPORT(void)) tmVirtualNanoTSBad(PRTTIMENANOTSDATA pData, uint64_t u64NanoTS, 794 794 uint64_t u64DeltaPrev, uint64_t u64PrevNanoTS); -
trunk/src/VBox/VMM/include/VMMInternal.h
r80274 r80281 473 473 * @param pVM The cross context VM structure. 474 474 */ 475 typedef DECLCALLBACK(int) FNVMMR0SETJMP(PVM pVM, PVMCPUpVCpu);475 typedef DECLCALLBACK(int) FNVMMR0SETJMP(PVMCC pVM, PVMCPUCC pVCpu); 476 476 /** Pointer to FNVMMR0SETJMP(). */ 477 477 typedef FNVMMR0SETJMP *PFNVMMR0SETJMP; -
trunk/src/VBox/VMM/testcase/tstSSM.cpp
r76553 r80281 652 652 * Allocate and init the VM structure. 653 653 */ 654 PVM pVM; 655 rc = SUPR3PageAlloc((sizeof(*pVM) + PAGE_SIZE - 1) >> PAGE_SHIFT, (void **)&pVM); 654 #ifdef VBOX_BUGREF_9217 655 PVM pVM = (PVM)RTMemPageAllocZ(sizeof(VM) + sizeof(VMCPU)); 656 rc = pVM ? VINF_SUCCESS : VERR_NO_PAGE_MEMORY; 657 #else 658 PVM pVM; 659 size_t cbVM = RT_ALIGN_Z(sizeof(*pVM), PAGE_SIZE); 660 rc = SUPR3PageAlloc(cbVM >> PAGE_SHIFT, (void **)&pVM); 661 #endif 656 662 if (RT_SUCCESS(rc)) 657 663 { … … 660 666 pVM->pUVM = pUVM; 661 667 pVM->cCpus = 1; 668 669 #ifdef VBOX_BUGREF_9217 670 PVMCPU pVCpu = (PVMCPU)(pVM + 1); 671 pVM->apCpusR3[0]= pVCpu; 672 pVCpu->pVMR3 = pVM; 673 pVCpu->hNativeThread = RTThreadNativeSelf(); 674 #else 662 675 pVM->aCpus[0].pVMR3 = pVM; 663 676 pVM->aCpus[0].hNativeThread = RTThreadNativeSelf(); 677 #endif 664 678 665 679 pUVM->pVM = pVM; … … 708 722 * Init runtime and static data. 709 723 */ 724 #ifdef VBOX_BUGREF_9217 725 int rc = RTR3InitExe(argc, &argv, 0); 726 AssertRCReturn(rc, RTEXITCODE_INIT); 727 #else 710 728 RTR3InitExe(argc, &argv, RTR3INIT_FLAGS_SUPLIB); 729 #endif 711 730 RTPrintf("tstSSM: TESTING...\n"); 712 731 initBigMem(); … … 716 735 * Create an fake VM structure and init SSM. 717 736 */ 737 #ifndef VBOX_BUGREF_9217 718 738 int rc = SUPR3Init(NULL); 719 739 if (RT_FAILURE(rc)) … … 722 742 return 1; 723 743 } 744 #endif 724 745 PVM pVM; 725 746 if (createFakeVM(&pVM)) -
trunk/src/VBox/VMM/testcase/tstVMStruct.h
r80191 r80281 1419 1419 GEN_CHECK_OFF(VM, pUVM); 1420 1420 GEN_CHECK_OFF(VM, pVMR3); 1421 #ifdef VBOX_BUGREF_9217 1422 GEN_CHECK_OFF(VM, pVMR0ForCall); 1423 #else 1421 1424 GEN_CHECK_OFF(VM, pVMR0); 1425 #endif 1422 1426 GEN_CHECK_OFF(VM, pVMRC); 1427 #if defined(VBOX_BUGREF_9217) && defined(IN_RING0) 1428 GEN_CHECK_OFF(VM, hSelfUnsafe); 1429 GEN_CHECK_OFF(VM, cCpusUnsafe); 1430 #else 1423 1431 GEN_CHECK_OFF(VM, hSelf); 1424 1432 GEN_CHECK_OFF(VM, cCpus); 1433 #endif 1425 1434 GEN_CHECK_OFF(VM, uCpuExecutionCap); 1426 1435 GEN_CHECK_OFF(VM, cbSelf); … … 1454 1463 GEN_CHECK_OFF(VM, cfgm); 1455 1464 GEN_CHECK_OFF(VM, apic); 1465 #ifndef VBOX_BUGREF_9217 1456 1466 GEN_CHECK_OFF(VM, aCpus); 1467 #endif 1457 1468 1458 1469 … … 1462 1473 GEN_CHECK_OFF(VMCPU, pUVCpu); 1463 1474 GEN_CHECK_OFF(VMCPU, pVMR3); 1475 #ifndef VBOX_BUGREF_9217 1464 1476 GEN_CHECK_OFF(VMCPU, pVMR0); 1477 #endif 1465 1478 GEN_CHECK_OFF(VMCPU, pVMRC); 1466 1479 GEN_CHECK_OFF(VMCPU, idCpu); -
trunk/src/VBox/VMM/testcase/tstVMStructSize.cpp
r80191 r80281 254 254 255 255 PVM pVM = NULL; NOREF(pVM); 256 #ifndef VBOX_BUGREF_9217 256 257 CHECK_MEMBER_ALIGNMENT(VM, aCpus[0], PAGE_SIZE); 257 258 CHECK_MEMBER_ALIGNMENT(VM, aCpus[1], PAGE_SIZE); … … 262 263 CHECK_MEMBER_ALIGNMENT(VM, aCpus[0].cpum.s.Hyper, 64); 263 264 CHECK_MEMBER_ALIGNMENT(VM, aCpus[1].cpum.s.Hyper, 64); 264 # ifdef VBOX_WITH_VMMR0_DISABLE_LAPIC_NMI265 # ifdef VBOX_WITH_VMMR0_DISABLE_LAPIC_NMI 265 266 CHECK_MEMBER_ALIGNMENT(VM, aCpus[0].cpum.s.pvApicBase, 8); 266 # endif267 # endif 267 268 268 269 CHECK_MEMBER_ALIGNMENT(VM, aCpus[0].iem.s.DataTlb, 64); 269 270 CHECK_MEMBER_ALIGNMENT(VM, aCpus[0].iem.s.CodeTlb, 64); 271 #endif 270 272 271 273 CHECK_MEMBER_ALIGNMENT(VMCPU, vmm.s.u64CallRing3Arg, 8); … … 282 284 283 285 /* the VMCPUs are page aligned TLB hit reasons. */ 286 #ifndef VBOX_BUGREF_9217 284 287 CHECK_MEMBER_ALIGNMENT(VM, aCpus, 4096); 288 #endif 285 289 CHECK_SIZE_ALIGNMENT(VMCPU, 4096); 286 290
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