Changeset 80722 in vbox for trunk/src/VBox/VMM
- Timestamp:
- Sep 11, 2019 9:21:47 AM (5 years ago)
- svn:sync-xref-src-repo-rev:
- 133263
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMR0/PDMR0Device.cpp
r80706 r80722 284 284 pDevIns, pDevIns->iInstance, pPciDev, pPciDev->uDevFn, iIrq, iLevel)); 285 285 PGVM pGVM = pDevIns->Internal.s.pGVM; 286 PPDMPCIBUS pPciBus = pPciDev->Int.s.pPdmBusR0; 286 size_t const idxBus = pPciDev->Int.s.idxPdmBus; 287 AssertReturnVoid(idxBus < RT_ELEMENTS(pGVM->pdm.s.aPciBuses)); 288 PPDMPCIBUS pPciBus = &pGVM->pdm.s.aPciBuses[idxBus]; 287 289 288 290 pdmLock(pGVM); -
trunk/src/VBox/VMM/VMMR3/PDMDevHlp.cpp
r80704 r80722 1735 1735 { 1736 1736 uPciDevNo = pPrevPciDev->uDevFn >> 3; 1737 uDefPciBusNo = pPrevPciDev->Int.s. pPdmBusR3->iBus;1737 uDefPciBusNo = pPrevPciDev->Int.s.idxPdmBus; 1738 1738 } 1739 1739 else … … 1757 1757 pOtherPciDev = pOtherPciDev->Int.s.pNextR3; 1758 1758 uPciDevNo = pOtherPciDev->uDevFn >> 3; 1759 uDefPciBusNo = pOtherPciDev->Int.s. pPdmBusR3->iBus;1759 uDefPciBusNo = pOtherPciDev->Int.s.idxPdmBus; 1760 1760 } 1761 1761 } … … 1780 1780 RT_ELEMENTS(pVM->pdm.s.aPciBuses), pDevIns->pReg->szName, pDevIns->iInstance), 1781 1781 VERR_PDM_NO_PCI_BUS); 1782 PPDMPCIBUS pBus = pPciDev->Int.s.pPdmBusR3 = &pVM->pdm.s.aPciBuses[u8Bus]; 1782 pPciDev->Int.s.idxPdmBus = u8Bus; 1783 PPDMPCIBUS pBus = &pVM->pdm.s.aPciBuses[u8Bus]; 1783 1784 if (pBus->pDevInsR3) 1784 1785 { … … 1835 1836 pPciDev->Int.s.fReassignableFunNo = uPciFunNo >= VBOX_PCI_MAX_FUNCTIONS; 1836 1837 pPciDev->Int.s.pDevInsR3 = pDevIns; 1837 pPciDev->Int.s.pPdmBusR3 = pBus; 1838 if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0) 1839 { 1840 pPciDev->Int.s.pDevInsR0 = pDevIns->pDevInsR0RemoveMe; 1841 pPciDev->Int.s.pPdmBusR0 = MMHyperR3ToR0(pVM, pBus); 1842 } 1843 else 1844 { 1845 pPciDev->Int.s.pDevInsR0 = NIL_RTR0PTR; 1846 pPciDev->Int.s.pPdmBusR0 = NIL_RTR0PTR; 1847 } 1848 1849 //if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC) 1850 //{ 1851 // pPciDev->Int.s.pDevInsRC = MMHyperR3ToRC(pVM, pDevIns); 1852 // pPciDev->Int.s.pPdmBusRC = MMHyperR3ToRC(pVM, pBus); 1853 //} 1854 //else 1855 { 1856 pPciDev->Int.s.pDevInsRC = NIL_RTRCPTR; 1857 pPciDev->Int.s.pPdmBusRC = NIL_RTRCPTR; 1858 } 1838 pPciDev->Int.s.idxPdmBus = u8Bus; 1859 1839 1860 1840 /* Set some of the public members too. */ … … 1878 1858 pPrevPciDev->Int.s.pNextR3 = pPciDev; 1879 1859 pPrevPciDev->Int.s.pNextR0 = NIL_RTRCPTR; 1880 pPrevPciDev->Int.s.pNextRC = NIL_RTRCPTR;1881 1860 } 1882 1861 else … … 1933 1912 VERR_INVALID_FLAGS); 1934 1913 1935 PPDMPCIBUS pBus = pPciDev->Int.s.pPdmBusR3; Assert(pBus); 1936 PVM pVM = pDevIns->Internal.s.pVMR3; 1914 PVM pVM = pDevIns->Internal.s.pVMR3; 1915 size_t const idxBus = pPciDev->Int.s.idxPdmBus; 1916 AssertReturn(idxBus < RT_ELEMENTS(pVM->pdm.s.aPciBuses), VERR_WRONG_ORDER); 1917 PPDMPCIBUS pBus = &pVM->pdm.s.aPciBuses[idxBus]; 1918 1937 1919 pdmLock(pVM); 1938 1920 int rc; … … 2037 2019 cbRegion = cbRegionAligned * 2; /* round up */ 2038 2020 2039 PPDMPCIBUS pBus = pPciDev->Int.s.pPdmBusR3; 2040 Assert(pBus); 2021 size_t const idxBus = pPciDev->Int.s.idxPdmBus; 2022 AssertReturn(idxBus < RT_ELEMENTS(pVM->pdm.s.aPciBuses), VERR_WRONG_ORDER); 2023 PPDMPCIBUS pBus = &pVM->pdm.s.aPciBuses[idxBus]; 2024 2041 2025 pdmLock(pVM); 2042 2026 int rc = pBus->pfnIORegionRegisterR3(pBus->pDevInsR3, pPciDev, iRegion, cbRegion, enmType, pfnCallback); … … 2070 2054 AssertPtrNull(pPciDev); 2071 2055 2072 PPDMPCIBUS pBus = pPciDev->Int.s.pPdmBusR3; 2073 AssertRelease(pBus); 2056 size_t const idxBus = pPciDev->Int.s.idxPdmBus; 2057 AssertReleaseReturnVoid(idxBus < RT_ELEMENTS(pVM->pdm.s.aPciBuses)); 2058 PPDMPCIBUS pBus = &pVM->pdm.s.aPciBuses[idxBus]; 2074 2059 AssertRelease(VMR3GetState(pVM) != VMSTATE_RUNNING); 2075 2060 … … 2159 2144 * Must have a PCI device registered! 2160 2145 */ 2161 PPDMPCIBUS pBus = pPciDev->Int.s.pPdmBusR3; 2162 Assert(pBus); 2163 PVM pVM = pDevIns->Internal.s.pVMR3; 2146 PVM pVM = pDevIns->Internal.s.pVMR3; 2147 size_t const idxBus = pPciDev->Int.s.idxPdmBus; 2148 AssertReturnVoid(idxBus < RT_ELEMENTS(pVM->pdm.s.aPciBuses)); 2149 PPDMPCIBUS pBus = &pVM->pdm.s.aPciBuses[idxBus]; 2164 2150 2165 2151 pdmLock(pVM); … … 4883 4869 if (pPciDev) 4884 4870 { 4885 PPDMPCIBUS pBus = pPciDev->Int.s.pPdmBusR3; 4886 Assert(pBus); 4871 size_t const idxBus = pPciDev->Int.s.idxPdmBus; 4872 AssertBreak(idxBus < RT_ELEMENTS(pVM->pdm.s.aPciBuses)); 4873 PPDMPCIBUS pBus = &pVM->pdm.s.aPciBuses[idxBus]; 4887 4874 4888 4875 pdmLock(pVM);
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