Changeset 81106 in vbox for trunk/src/VBox/HostDrivers/Support/SUPDrvGip.cpp

Timestamp:

Oct 3, 2019 9:23:00 PM (5 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

133729

Message:

IPRT,SUP,*: Some GIP related fixes for supporting APIC IDs over 256 and more than 256 CPUs. bugref:9501

File:

• trunk/src/VBox/HostDrivers/Support/SUPDrvGip.cpp (modified) (12 diffs)

trunk/src/VBox/HostDrivers/Support/SUPDrvGip.cpp

@@ -189 +189 @@
 
 
+/**
+ * Gets the APIC ID using the best available method, slow version.
+ */
+static uint32_t supdrvGipGetApicIdSlow(void)
+{
+    uint32_t const idApic = ASMGetApicId();
+
+    /* The Intel CPU topology leaf: */
+    uint32_t uOther = ASMCpuId_EAX(0);
+    if (uOther >= UINT32_C(0xb) && ASMIsValidStdRange(uOther))
+    {
+        uOther = ASMGetApicIdExt0B();
+        if ((uOther & 0xff) == idApic)
+            return uOther;
+        AssertMsgFailed(("ASMGetApicIdExt0B=>%#x idApic=%#x\n", uOther, idApic));
+    }
+
+    /* The AMD leaf: */
+    uOther = ASMCpuId_EAX(UINT32_C(0x80000000));
+    if (uOther >= UINT32_C(0x8000001e) && ASMIsValidExtRange(uOther))
+    {
+        uOther = ASMGetApicIdExt8000001E();
+        if ((uOther & 0xff) == idApic)
+            return uOther;
+        AssertMsgFailed(("ASMGetApicIdExt8000001E=>%#x idApic=%#x\n", uOther, idApic));
+    }
+    return idApic;
+}
+
+
 /*
  *
@@ -235 +265 @@
         if (RT_LIKELY(iCpu < pGip->cCpus && pGip->aCPUs[iCpu].idCpu == idCpu))
             supdrvGipReInitCpu(&pGip->aCPUs[iCpu], *(uint64_t *)pvUser2);
-    }
+        else
+            LogRelMax(64, ("supdrvGipReInitCpuCallback: iCpu=%#x out of bounds (%#zx, idApic=%#x)\n",
+                           iCpu, RT_ELEMENTS(pGip->aiCpuFromApicId), idApic));
+    }
+    else
+        LogRelMax(64, ("supdrvGipReInitCpuCallback: idApic=%#x out of bounds (%#zx)\n",
+                       idApic, RT_ELEMENTS(pGip->aiCpuFromApicId)));
 
     NOREF(pvUser2);
@@ -248 +284 @@
     /** Bitmap of APIC IDs that has been seen (initialized to zero).
      *  Used to detect duplicate APIC IDs (paranoia). */
-    uint8_t volatile    bmApicId[1024 / 8];
+    uint8_t volatile    bmApicId[4096 / 8];
     /** Mask of supported GIP CPU getter methods (SUPGIPGETCPU_XXX) (all bits set
      *  initially). The callback clears the methods not detected. */
@@ -611 +647 @@
                 if (RT_SUCCESS(rc))
                 {
-                    SUPDRVGIPDETECTGETCPU DetectState;
-                    RT_BZERO((void *)&DetectState.bmApicId, sizeof(DetectState.bmApicId));
-                    DetectState.fSupported   = UINT32_MAX;
-                    DetectState.idCpuProblem = NIL_RTCPUID;
-                    rc = RTMpOnAll(supdrvGipDetectGetGipCpuCallback, &DetectState, pGipR0);
-                    if (DetectState.idCpuProblem == NIL_RTCPUID)
+                    PSUPDRVGIPDETECTGETCPU pDetectState = (PSUPDRVGIPDETECTGETCPU)RTMemTmpAllocZ(sizeof(*pDetectState));
+                    if (pDetectState)
                     {
-                        if (   DetectState.fSupported != UINT32_MAX
-                            && DetectState.fSupported != 0)
+                        pDetectState->fSupported   = UINT32_MAX;
+                        pDetectState->idCpuProblem = NIL_RTCPUID;
+                        rc = RTMpOnAll(supdrvGipDetectGetGipCpuCallback, pDetectState, pGipR0);
+                        if (pDetectState->idCpuProblem == NIL_RTCPUID)
                         {
-                            if (pGipR0->fGetGipCpu != DetectState.fSupported)
+                            if (   pDetectState->fSupported != UINT32_MAX
+                                && pDetectState->fSupported != 0)
                             {
-                                pGipR0->fGetGipCpu = DetectState.fSupported;
-                                LogRel(("SUPR0GipMap: fGetGipCpu=%#x\n", DetectState.fSupported));
+                                if (pGipR0->fGetGipCpu != pDetectState->fSupported)
+                                {
+                                    pGipR0->fGetGipCpu = pDetectState->fSupported;
+                                    LogRel(("SUPR0GipMap: fGetGipCpu=%#x\n", pDetectState->fSupported));
+                                }
+                            }
+                            else
+                            {
+                                LogRel(("SUPR0GipMap: No supported ways of getting the APIC ID or CPU number in ring-3! (%#x)\n",
+                                        pDetectState->fSupported));
+                                rc = VERR_UNSUPPORTED_CPU;
                             }
                         }
                         else
                         {
-                            LogRel(("SUPR0GipMap: No supported ways of getting the APIC ID or CPU number in ring-3! (%#x)\n",
-                                    DetectState.fSupported));
-                            rc = VERR_UNSUPPORTED_CPU;
+                            LogRel(("SUPR0GipMap: APIC ID, CPU ID or CPU set index problem detected on CPU #%u (%#x)!\n",
+                                    pDetectState->idCpuProblem, pDetectState->idCpuProblem));
+                            rc = VERR_INVALID_CPU_ID;
                         }
+                        RTMemTmpFree(pDetectState);
                     }
                     else
-                    {
-                        LogRel(("SUPR0GipMap: APIC ID, CPU ID or CPU set index problem detected on CPU #%u (%#x)!\n",
-                                DetectState.idCpuProblem, DetectState.idCpuProblem));
-                        rc = VERR_INVALID_CPU_ID;
-                    }
+                        rc = VERR_NO_TMP_MEMORY;
                 }
 
@@ -1392 +1433 @@
     supdrvGipInitCpu(pGip, &pGip->aCPUs[i], u64NanoTS, pGip->u64CpuHz);
 
-    idApic = supdrvGipGetApicId(pGip);
+    idApic = supdrvGipGetApicIdSlow();
     ASMAtomicWriteU16(&pGip->aCPUs[i].idApic,  idApic);
     ASMAtomicWriteS16(&pGip->aCPUs[i].iCpuSet, (int16_t)iCpuSet);
@@ -1408 +1449 @@
     if (idApic < RT_ELEMENTS(pGip->aiCpuFromApicId))
         ASMAtomicWriteU16(&pGip->aiCpuFromApicId[idApic],     i);
+    else
+        LogRelMax(64, ("supdrvGipMpEventOnlineOrInitOnCpu: idApic=%#x is out of bounds (%#zx, i=%u, iCpuSet=%d)\n",
+                       idApic, RT_ELEMENTS(pGip->aiCpuFromApicId), i, iCpuSet));
     if ((unsigned)iCpuSet < RT_ELEMENTS(pGip->aiCpuFromCpuSetIdx))
         ASMAtomicWriteU16(&pGip->aiCpuFromCpuSetIdx[iCpuSet], i);
+    else
+        LogRelMax(64, ("supdrvGipMpEventOnlineOrInitOnCpu: iCpuSet=%d is out of bounds (%#zx, i=%u, idApic=%d)\n",
+                       iCpuSet, RT_ELEMENTS(pGip->aiCpuFromApicId), i, idApic));
 
     /* Add this CPU to this set of CPUs we need to calculate the TSC-delta for. */
@@ -1881 +1928 @@
         pGip->aiCpuFromCpuSetIdx[i] = UINT16_MAX;
     for (i = 0; i < RT_ELEMENTS(pGip->aoffCpuGroup); i++)
-        pGip->aoffCpuGroup[i] = UINT16_MAX;
+        pGip->aoffCpuGroup[i]       = UINT32_MAX;
     for (i = 0; i < cCpus; i++)
         supdrvGipInitCpu(pGip, &pGip->aCPUs[i], u64NanoTS, 0 /*uCpuHz*/);
@@ -2024 +2071 @@
             RTCpuSetEmpty(&pDevExt->TscDeltaCpuSet);
             RTCpuSetEmpty(&pDevExt->TscDeltaObtainedCpuSet);
-    #ifdef SUPDRV_USE_TSC_DELTA_THREAD
+#ifdef SUPDRV_USE_TSC_DELTA_THREAD
             if (pGip->enmUseTscDelta > SUPGIPUSETSCDELTA_ZERO_CLAIMED)
                 rc = supdrvTscDeltaThreadInit(pDevExt);
-    #endif
+#endif
             if (RT_SUCCESS(rc))
             {
@@ -2040 +2087 @@
                     if (RT_SUCCESS(rc))
                     {
-    #ifdef SUPDRV_USE_TSC_DELTA_THREAD
+#ifdef SUPDRV_USE_TSC_DELTA_THREAD
                         supdrvTscDeltaThreadStartMeasurement(pDevExt, true /* fForceAll */);
-    #else
+#else
                         uint16_t iCpu;
                         if (pGip->enmUseTscDelta > SUPGIPUSETSCDELTA_ZERO_CLAIMED)
@@ -2066 +2113 @@
                         }
                         if (RT_SUCCESS(rc))
-    #endif
+#endif
                         {
                             /*
@@ -4894 +4941 @@
                 /* This really shouldn't happen. */
                 AssertMsgFailed(("idCpu=%#x iCpuSet=%#x (%d)\n", RTMpCpuId(), iCpuSet, iCpuSet));
-                pReq->u.Out.idApic = supdrvGipGetApicId(pGip);
+                pReq->u.Out.idApic = supdrvGipGetApicIdSlow();
                 pReq->u.Out.u64AdjustedTsc = ASMReadTSC();
                 ASMSetFlags(fEFlags);
@@ -4914 +4961 @@
             pReq->u.Out.idApic = pGip->aCPUs[iGipCpu].idApic;
         else
-            pReq->u.Out.idApic = supdrvGipGetApicId(pGip);
+            pReq->u.Out.idApic = supdrvGipGetApicIdSlow();
         pReq->u.Out.u64AdjustedTsc = ASMReadTSC();
         ASMSetFlags(fEFlags);