VirtualBox

Ignore:
Timestamp:
Nov 6, 2019 8:23:17 PM (5 years ago)
Author:
vboxsync
Message:

DevVirtioNet,Virtio: Converted to new PDM device model. bugref:9218

File:
1 edited

Legend:

Unmodified
Added
Removed

  • trunk/src/VBox/Devices/VirtIO/Virtio.h

    r81703 r81720  
    2525
    2626
    27 /** Pointer to the core (/common) state of a VirtIO PCI device. */
     27/** Pointer to the core shared state of a VirtIO PCI device */
    2828typedef struct VPCISTATE *PVPCISTATE;
     29/** Pointer to the core ring-3 state of a VirtIO PCI device */
     30typedef struct VPCISTATER3 *PVPCISTATER3;
     31/** Pointer to the core ring-0 state of a VirtIO PCI device */
     32typedef struct VPCISTATER0 *PVPCISTATER0;
     33/** Pointer to the core raw-mode state of a VirtIO PCI device */
     34typedef struct VPCISTATERC *PVPCISTATERC;
     35
     36/** Pointer to the core current context state of a VirtIO PCI device */
     37typedef CTX_SUFF(PVPCISTATE) PVPCISTATECC;
     38/** The core current context state of a VirtIO PCI device */
     39typedef struct CTX_SUFF(VPCISTATE) VPCISTATECC;
    2940
    3041
    … …  
    121132typedef VRING *PVRING;
    122133
     134typedef struct VQUEUE
     135{
     136    VRING       VRing;
     137    uint16_t    uNextAvailIndex;
     138    uint16_t    uNextUsedIndex;
     139    uint32_t    uPageNumber;
     140    char        szName[16];
     141} VQUEUE;
     142typedef VQUEUE *PVQUEUE;
     143
    123144/**
    124145 * Queue callback (consumer?).
    125146 *
    126147 * @param   pDevIns         The device instance.
    127  * @param   pVPciState      Pointer to the VirtIO PCI core state.
    128148 * @param   pQueue          Pointer to the queue structure.
    129149 */
    130 typedef DECLCALLBACK(void) FNVPCIQUEUECALLBACK(PPDMDEVINS pDevIns, PVPCISTATE pVPciState, struct VQueue *pQueue);
     150typedef DECLCALLBACK(void) FNVPCIQUEUECALLBACK(PPDMDEVINS pDevIns, PVQUEUE pQueue);
    131151/** Pointer to a VQUEUE callback function. */
    132152typedef FNVPCIQUEUECALLBACK *PFNVPCIQUEUECALLBACK;
    133153
    134 typedef struct VQueue
    135 {
    136     VRING    VRing;
    137     uint16_t uNextAvailIndex;
    138     uint16_t uNextUsedIndex;
    139     uint32_t uPageNumber;
     154typedef struct VQUEUER3
     155{
    140156    R3PTRTYPE(PFNVPCIQUEUECALLBACK) pfnCallback;
    141     R3PTRTYPE(const char *)         pcszName;
    142 } VQUEUE;
    143 typedef VQUEUE *PVQUEUE;
     157} VQUEUER3;
     158typedef VQUEUER3 *PVQUEUER3;
    144159
    145160typedef struct VQueueElemSeg
    … …  
    170185
    171186/**
    172  * The core (/common) state of the VirtIO PCI device
     187 * The core shared state of a VirtIO PCI device
     188 */
     189typedef struct VPCISTATE
     190{
     191    PDMCRITSECT             cs;      /**< Critical section - what is it protecting? */
     192    /** Read-only part, never changes after initialization. */
     193    char                    szInstance[8];         /**< Instance name, e.g. VNet#1. */
     194
     195    /* Read/write part, protected with critical section. */
     196    /** Status LED. */
     197    PDMLED                  led;
     198
     199    uint32_t                uGuestFeatures;
     200    uint16_t                uQueueSelector;         /**< An index in aQueues array. */
     201    uint8_t                 uStatus; /**< Device Status (bits are device-specific). */
     202    uint8_t                 uISR;                   /**< Interrupt Status Register. */
     203
     204    /** Number of queues actually used. */
     205    uint32_t                cQueues;
     206    uint32_t                u32Padding;
     207    /** Shared queue data. */
     208    VQUEUE                  Queues[VIRTIO_MAX_NQUEUES];
     209
     210#ifdef VBOX_WITH_STATISTICS
     211    STAMPROFILEADV          StatIOReadR3;
     212    STAMPROFILEADV          StatIOReadR0;
     213    STAMPROFILEADV          StatIOReadRC;
     214    STAMPROFILEADV          StatIOWriteR3;
     215    STAMPROFILEADV          StatIOWriteR0;
     216    STAMPROFILEADV          StatIOWriteRC;
     217    STAMCOUNTER             StatIntsRaised;
     218    STAMCOUNTER             StatIntsSkipped;
     219    STAMPROFILE             StatCsR3;
     220    STAMPROFILE             StatCsR0;
     221    STAMPROFILE             StatCsRC;
     222#endif
     223} VPCISTATE;
     224
     225
     226/**
     227 * The core ring-3 state of a VirtIO PCI device
    173228 *
    174229 * @implements  PDMILEDPORTS
    175230 */
    176 typedef struct VPCISTATE
    177 {
    178     PDMCRITSECT            cs;      /**< Critical section - what is it protecting? */
    179     /* Read-only part, never changes after initialization. */
    180     char                   szInstance[8];         /**< Instance name, e.g. VNet#1. */
    181 
    182 #if HC_ARCH_BITS != 64
    183     uint32_t               padding1;
    184 #endif
    185 
     231typedef struct VPCISTATER3
     232{
    186233    /** Status LUN: Base interface. */
    187     PDMIBASE               IBase;
     234    PDMIBASE                        IBase;
    188235    /** Status LUN: LED port interface. */
    189     PDMILEDPORTS           ILeds;
     236    PDMILEDPORTS                    ILeds;
    190237    /** Status LUN: LED connector (peer). */
    191     R3PTRTYPE(PPDMILEDCONNECTORS) pLedsConnector;
    192 
    193     PPDMDEVINSR3           pDevInsR3;                   /**< Device instance - R3. */
    194     PPDMDEVINSR0           pDevInsR0;                   /**< Device instance - R0. */
    195     PPDMDEVINSRC           pDevInsRC;                   /**< Device instance - RC. */
    196 
    197 #if HC_ARCH_BITS == 64
    198     uint32_t               padding2;
    199 #endif
    200 
    201     /** Base port of I/O space region. */
    202     RTIOPORT               IOPortBase;
    203 
    204     /* Read/write part, protected with critical section. */
    205     /** Status LED. */
    206     PDMLED                 led;
    207 
    208     uint32_t               uGuestFeatures;
    209     uint16_t               uQueueSelector;         /**< An index in aQueues array. */
    210     uint8_t                uStatus; /**< Device Status (bits are device-specific). */
    211     uint8_t                uISR;                   /**< Interrupt Status Register. */
    212 
    213 #if HC_ARCH_BITS != 64
    214     uint32_t               padding3;
    215 #endif
    216 
    217     uint32_t               nQueues;       /**< Actual number of queues used. */
    218     VQUEUE                 Queues[VIRTIO_MAX_NQUEUES];
    219 
    220 #ifdef VBOX_WITH_STATISTICS
    221     STAMPROFILEADV         StatIOReadR3;
    222     STAMPROFILEADV         StatIOReadR0;
    223     STAMPROFILEADV         StatIOReadRC;
    224     STAMPROFILEADV         StatIOWriteR3;
    225     STAMPROFILEADV         StatIOWriteR0;
    226     STAMPROFILEADV         StatIOWriteRC;
    227     STAMCOUNTER            StatIntsRaised;
    228     STAMCOUNTER            StatIntsSkipped;
    229     STAMPROFILE            StatCsR3;
    230     STAMPROFILE            StatCsR0;
    231     STAMPROFILE            StatCsRC;
    232 #endif
    233 } VPCISTATE;
     238    R3PTRTYPE(PPDMILEDCONNECTORS)   pLedsConnector;
     239    /** Pointer to the shared state. */
     240    R3PTRTYPE(PVPCISTATE)           pShared;
     241    /** Ring-3 per-queue data. */
     242    VQUEUER3                        Queues[VIRTIO_MAX_NQUEUES];
     243} VPCISTATER3;
     244
     245
     246/**
     247 * The core ring-0 state of a VirtIO PCI device
     248 */
     249typedef struct VPCISTATER0
     250{
     251    uint64_t                uUnused;
     252} VPCISTATER0;
     253
     254
     255/**
     256 * The core raw-mode state of a VirtIO PCI device
     257 */
     258typedef struct VPCISTATERC
     259{
     260    uint64_t                uUnused;
     261} VPCISTATERC;
     262
    234263
    235264/** @name VirtIO port I/O callbacks.
    … …  
    242271     DECLCALLBACKMEMBER(int,      pfnGetConfig)(PVPCISTATE pVPciState, uint32_t offCfg, uint32_t cb, void *pvData);
    243272     DECLCALLBACKMEMBER(int,      pfnSetConfig)(PVPCISTATE pVPciState, uint32_t offCfg, uint32_t cb, void *pvData);
    244      DECLCALLBACKMEMBER(int,      pfnReset)(PVPCISTATE pVPciState);
    245      DECLCALLBACKMEMBER(void,     pfnReady)(PVPCISTATE pVPciState);
     273     DECLCALLBACKMEMBER(int,      pfnReset)(PPDMDEVINS pDevIns);
     274     DECLCALLBACKMEMBER(void,     pfnReady)(PPDMDEVINS pDevIns);
    246275} VPCIIOCALLBACKS;
    247276/** Pointer to a const VirtIO port I/O callback structure. */
    … …  
    249278/** @} */
    250279
    251 int vpciRaiseInterrupt(VPCISTATE *pState, int rcBusy, uint8_t u8IntCause);
    252 int vpciIOPortIn(PPDMDEVINS         pDevIns,
    253                  PVPCISTATE         pState,
    254                  RTIOPORT           port,
    255                  uint32_t          *pu32,
    256                  unsigned           cb,
    257                  PCVPCIIOCALLBACKS  pCallbacks);
    258 
    259 int vpciIOPortOut(PPDMDEVINS        pDevIns,
    260                   PVPCISTATE        pState,
    261                   RTIOPORT          port,
    262                   uint32_t          u32,
    263                   unsigned          cb,
    264                   PCVPCIIOCALLBACKS pCallbacks);
    265 
    266 void  vpciSetWriteLed(PVPCISTATE pState, bool fOn);
    267 void  vpciSetReadLed(PVPCISTATE pState, bool fOn);
    268 int   vpciSaveExec(PVPCISTATE pState, PSSMHANDLE pSSM);
    269 int   vpciLoadExec(PVPCISTATE pState, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass, uint32_t nQueues);
    270 int   vpciConstruct(PPDMDEVINS pDevIns, VPCISTATE *pState, int iInstance, const char *pcszNameFmt,
    271                     uint16_t uDeviceId, uint16_t uClass, uint32_t nQueues);
    272 int   vpciDestruct(VPCISTATE* pState);
    273 void  vpciRelocate(PPDMDEVINS pDevIns, RTGCINTPTR offDelta);
    274 void  vpciReset(PVPCISTATE pState);
    275 void *vpciQueryInterface(struct PDMIBASE *pInterface, const char *pszIID);
    276 PVQUEUE vpciAddQueue(VPCISTATE* pState, unsigned uSize, PFNVPCIQUEUECALLBACK pfnCallback, const char *pcszName);
     280int   vpciR3Init(PPDMDEVINS pDevIns, PVPCISTATE pThis, PVPCISTATECC pThisCC, uint16_t uDeviceId, uint16_t uClass, uint32_t cQueues);
     281int   vpciRZInit(PPDMDEVINS pDevIns, PVPCISTATE pThis, PVPCISTATECC pThisCC);
     282int   vpciR3Term(PPDMDEVINS pDevIns, PVPCISTATE pThis);
     283
     284int   vpciRaiseInterrupt(PPDMDEVINS pDevIns, PVPCISTATE pThis, int rcBusy, uint8_t u8IntCause);
     285int   vpciIOPortIn(PPDMDEVINS pDevIns, PVPCISTATE pThis, RTIOPORT offPort,
     286                   uint32_t *pu32, unsigned cb,PCVPCIIOCALLBACKS pCallbacks);
     287int   vpciIOPortOut(PPDMDEVINS pDevIns, PVPCISTATE pThis, PVPCISTATECC pThisCC, RTIOPORT offPort,
     288                    uint32_t u32, unsigned cb, PCVPCIIOCALLBACKS pCallbacks);
     289
     290void  vpciR3SetWriteLed(PVPCISTATE pThis, bool fOn);
     291void  vpciR3SetReadLed(PVPCISTATE pThis, bool fOn);
     292int   vpciR3SaveExec(PCPDMDEVHLPR3 pHlp, PVPCISTATE pThis, PSSMHANDLE pSSM);
     293int   vpciR3LoadExec(PCPDMDEVHLPR3 pHlp, PVPCISTATE pThis, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass, uint32_t cQueues);
     294void  vpciReset(PPDMDEVINS pDevIns, PVPCISTATE pThis);
     295void *vpciR3QueryInterface(PVPCISTATECC pThisCC, const char *pszIID);
     296PVQUEUE vpciR3AddQueue(PVPCISTATE pThis, PVPCISTATECC pThisCC, unsigned uSize, PFNVPCIQUEUECALLBACK pfnCallback, const char *pcszName);
    277297
    278298#define VPCI_CS
    279 DECLINLINE(int) vpciCsEnter(VPCISTATE *pState, int rcBusy)
     299DECLINLINE(int) vpciCsEnter(PPDMDEVINS pDevIns, PVPCISTATE pThis, int rcBusy)
    280300{
    281301#ifdef VPCI_CS
    282     STAM_PROFILE_START(&pState->CTX_SUFF(StatCs), a);
    283     int rc = PDMCritSectEnter(&pState->cs, rcBusy);
    284     STAM_PROFILE_STOP(&pState->CTX_SUFF(StatCs), a);
     302    STAM_PROFILE_START(&pThis->CTX_SUFF(StatCs), a);
     303    int rc = PDMDevHlpCritSectEnter(pDevIns, &pThis->cs, rcBusy);
     304    STAM_PROFILE_STOP(&pThis->CTX_SUFF(StatCs), a);
    285305    return rc;
    286306#else
     307    RT_NOREF(pDevIns, pThis, rcBusy);
    287308    return VINF_SUCCESS;
    288309#endif
    289310}
    290311
    291 DECLINLINE(void) vpciCsLeave(VPCISTATE *pState)
     312DECLINLINE(void) vpciCsLeave(PPDMDEVINS pDevIns, PVPCISTATE pThis)
    292313{
    293314#ifdef VPCI_CS
    294     PDMCritSectLeave(&pState->cs);
     315    PDMDevHlpCritSectLeave(pDevIns, &pThis->cs);
    295316#endif
    296317}
    297318
    298 void vringSetNotification(PVPCISTATE pState, PVRING pVRing, bool fEnabled);
    299 
    300 DECLINLINE(uint16_t) vringReadAvailIndex(PVPCISTATE pState, PVRING pVRing)
    301 {
    302     uint16_t tmp;
    303 
    304     PDMDevHlpPhysRead(pState->CTX_SUFF(pDevIns),
    305                       pVRing->addrAvail + RT_UOFFSETOF(VRINGAVAIL, uNextFreeIndex),
    306                       &tmp, sizeof(tmp));
    307     return tmp;
    308 }
    309 
    310 bool vqueueSkip(PVPCISTATE pState, PVQUEUE pQueue);
    311 bool vqueueGet(PVPCISTATE pState, PVQUEUE pQueue, PVQUEUEELEM pElem, bool fRemove = true);
    312 void vqueuePut(PVPCISTATE pState, PVQUEUE pQueue, PVQUEUEELEM pElem, uint32_t uLen, uint32_t uReserved = 0);
    313 void vqueueNotify(PVPCISTATE pState, PVQUEUE pQueue);
    314 void vqueueSync(PVPCISTATE pState, PVQUEUE pQueue);
    315 
    316 DECLINLINE(bool) vqueuePeek(PVPCISTATE pState, PVQUEUE pQueue, PVQUEUEELEM pElem)
    317 {
    318     return vqueueGet(pState, pQueue, pElem, /* fRemove */ false);
    319 }
    320 
    321 DECLINLINE(bool) vqueueIsReady(PVPCISTATE pState, PVQUEUE pQueue)
    322 {
    323     NOREF(pState);
     319void vringSetNotification(PPDMDEVINS pDevIns, PVRING pVRing, bool fEnabled);
     320
     321DECLINLINE(uint16_t) vringReadAvailIndex(PPDMDEVINS pDevIns, PVRING pVRing)
     322{
     323    uint16_t idx = 0;
     324    PDMDevHlpPhysRead(pDevIns, pVRing->addrAvail + RT_UOFFSETOF(VRINGAVAIL, uNextFreeIndex), &idx, sizeof(idx));
     325    return idx;
     326}
     327
     328bool vqueueSkip(PPDMDEVINS pDevIns, PVPCISTATE pThis, PVQUEUE pQueue);
     329bool vqueueGet(PPDMDEVINS pDevIns, PVPCISTATE pThis, PVQUEUE pQueue, PVQUEUEELEM pElem, bool fRemove = true);
     330void vqueuePut(PPDMDEVINS pDevIns, PVPCISTATE pThis, PVQUEUE pQueue, PVQUEUEELEM pElem, uint32_t uLen, uint32_t uReserved = 0);
     331void vqueueNotify(PPDMDEVINS pDevIns, PVPCISTATE pThis, PVQUEUE pQueue);
     332void vqueueSync(PPDMDEVINS pDevIns, PVPCISTATE pThis, PVQUEUE pQueue);
     333
     334DECLINLINE(bool) vqueuePeek(PPDMDEVINS pDevIns, PVPCISTATE pThis, PVQUEUE pQueue, PVQUEUEELEM pElem)
     335{
     336    return vqueueGet(pDevIns, pThis, pQueue, pElem, /* fRemove */ false);
     337}
     338
     339DECLINLINE(bool) vqueueIsReady(PVQUEUE pQueue)
     340{
    324341    return !!pQueue->VRing.addrAvail;
    325342}
    326343
    327 DECLINLINE(bool) vqueueIsEmpty(PVPCISTATE pState, PVQUEUE pQueue)
    328 {
    329     return (vringReadAvailIndex(pState, &pQueue->VRing) == pQueue->uNextAvailIndex);
    330 }
     344DECLINLINE(bool) vqueueIsEmpty(PPDMDEVINS pDevIns, PVQUEUE pQueue)
     345{
     346    return vringReadAvailIndex(pDevIns, &pQueue->VRing) == pQueue->uNextAvailIndex;
     347}
     348
     349void vpcR3iDumpStateWorker(PVPCISTATE pThis, PCDBGFINFOHLP pHlp);
    331350
    332351#endif /* !VBOX_INCLUDED_SRC_VirtIO_Virtio_h */
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