Changeset 81898 in vbox for trunk/src/VBox/Devices/PC/DevPit-i8254.cpp
- Timestamp:
- Nov 16, 2019 4:59:23 PM (5 years ago)
- File:
-
- 1 edited
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trunk/src/VBox/Devices/PC/DevPit-i8254.cpp
r81591 r81898 105 105 * Acquires the PIT lock or returns. 106 106 */ 107 #define DEVPIT_LOCK_RETURN(a_p This, a_rcBusy) \107 #define DEVPIT_LOCK_RETURN(a_pDevIns, a_pThis, a_rcBusy) \ 108 108 do { \ 109 int rcLock = PDM CritSectEnter(&(a_pThis)->CritSect, (a_rcBusy)); \109 int rcLock = PDMDevHlpCritSectEnter((a_pDevIns), &(a_pThis)->CritSect, (a_rcBusy)); \ 110 110 if (rcLock != VINF_SUCCESS) \ 111 111 return rcLock; \ … … 115 115 * Releases the PIT lock. 116 116 */ 117 #define DEVPIT_UNLOCK(a_p This) \118 do { PDM CritSectLeave(&(a_pThis)->CritSect); } while (0)117 #define DEVPIT_UNLOCK(a_pDevIns, a_pThis) \ 118 do { PDMDevHlpCritSectLeave((a_pDevIns), &(a_pThis)->CritSect); } while (0) 119 119 120 120 … … 122 122 * Acquires the TM lock and PIT lock, returns on failure. 123 123 */ 124 #define DEVPIT_LOCK_BOTH_RETURN(a_p This, a_rcBusy) \124 #define DEVPIT_LOCK_BOTH_RETURN(a_pDevIns, a_pThis, a_rcBusy) \ 125 125 do { \ 126 126 int rcLock = TMTimerLock((a_pThis)->channels[0].CTX_SUFF(pTimer), (a_rcBusy)); \ 127 127 if (rcLock != VINF_SUCCESS) \ 128 128 return rcLock; \ 129 rcLock = PDM CritSectEnter(&(a_pThis)->CritSect, (a_rcBusy)); \129 rcLock = PDMDevHlpCritSectEnter((a_pDevIns), &(a_pThis)->CritSect, (a_rcBusy)); \ 130 130 if (rcLock != VINF_SUCCESS) \ 131 131 { \ … … 139 139 * Acquires the TM lock and PIT lock, ignores failures. 140 140 */ 141 # define DEVPIT_R3_LOCK_BOTH(a_p This) \141 # define DEVPIT_R3_LOCK_BOTH(a_pDevIns, a_pThis) \ 142 142 do { \ 143 143 TMTimerLock((a_pThis)->channels[0].CTX_SUFF(pTimer), VERR_IGNORED); \ 144 PDM CritSectEnter(&(a_pThis)->CritSect, VERR_IGNORED); \144 PDMDevHlpCritSectEnter((a_pDevIns), &(a_pThis)->CritSect, VERR_IGNORED); \ 145 145 } while (0) 146 146 #endif /* IN_RING3 */ … … 149 149 * Releases the PIT lock and TM lock. 150 150 */ 151 #define DEVPIT_UNLOCK_BOTH(a_p This) \151 #define DEVPIT_UNLOCK_BOTH(a_pDevIns, a_pThis) \ 152 152 do { \ 153 PDM CritSectLeave(&(a_pThis)->CritSect); \153 PDMDevHlpCritSectLeave((a_pDevIns), &(a_pThis)->CritSect); \ 154 154 TMTimerUnlock((a_pThis)->channels[0].CTX_SUFF(pTimer)); \ 155 155 } while (0) … … 665 665 int ret; 666 666 667 DEVPIT_LOCK_RETURN(p This, VINF_IOM_R3_IOPORT_READ);667 DEVPIT_LOCK_RETURN(pDevIns, pThis, VINF_IOM_R3_IOPORT_READ); 668 668 if (pChan->status_latched) 669 669 { 670 670 pChan->status_latched = 0; 671 671 ret = pChan->status; 672 DEVPIT_UNLOCK(p This);672 DEVPIT_UNLOCK(pDevIns, pThis); 673 673 } 674 674 else if (pChan->count_latched) … … 690 690 break; 691 691 } 692 DEVPIT_UNLOCK(p This);692 DEVPIT_UNLOCK(pDevIns, pThis); 693 693 } 694 694 else 695 695 { 696 DEVPIT_UNLOCK(p This);697 DEVPIT_LOCK_BOTH_RETURN(p This, VINF_IOM_R3_IOPORT_READ);696 DEVPIT_UNLOCK(pDevIns, pThis); 697 DEVPIT_LOCK_BOTH_RETURN(pDevIns, pThis, VINF_IOM_R3_IOPORT_READ); 698 698 int count; 699 699 switch (pChan->read_state) … … 719 719 break; 720 720 } 721 DEVPIT_UNLOCK_BOTH(p This);721 DEVPIT_UNLOCK_BOTH(pDevIns, pThis); 722 722 } 723 723 … … 766 766 { 767 767 /* read-back command */ 768 DEVPIT_LOCK_BOTH_RETURN(p This, VINF_IOM_R3_IOPORT_WRITE);768 DEVPIT_LOCK_BOTH_RETURN(pDevIns, pThis, VINF_IOM_R3_IOPORT_WRITE); 769 769 for (channel = 0; channel < RT_ELEMENTS(pThis->channels); channel++) 770 770 { … … 787 787 } 788 788 } 789 DEVPIT_UNLOCK_BOTH(p This);789 DEVPIT_UNLOCK_BOTH(pDevIns, pThis); 790 790 } 791 791 else … … 795 795 if (access == 0) 796 796 { 797 DEVPIT_LOCK_BOTH_RETURN(p This, VINF_IOM_R3_IOPORT_WRITE);797 DEVPIT_LOCK_BOTH_RETURN(pDevIns, pThis, VINF_IOM_R3_IOPORT_WRITE); 798 798 pit_latch_count(pChan); 799 DEVPIT_UNLOCK_BOTH(p This);799 DEVPIT_UNLOCK_BOTH(pDevIns, pThis); 800 800 } 801 801 else 802 802 { 803 DEVPIT_LOCK_RETURN(p This, VINF_IOM_R3_IOPORT_WRITE);803 DEVPIT_LOCK_RETURN(pDevIns, pThis, VINF_IOM_R3_IOPORT_WRITE); 804 804 pChan->rw_mode = access; 805 805 pChan->read_state = access; … … 809 809 pChan->bcd = u32 & 1; 810 810 /* XXX: update irq timer ? */ 811 DEVPIT_UNLOCK(p This);811 DEVPIT_UNLOCK(pDevIns, pThis); 812 812 } 813 813 } … … 825 825 RT_UNTRUSTED_VALIDATED_FENCE(); /* paranoia */ 826 826 PPITCHANNEL pChan = &pThis->channels[uPort]; 827 DEVPIT_LOCK_BOTH_RETURN(p This, VINF_IOM_R3_IOPORT_WRITE);827 DEVPIT_LOCK_BOTH_RETURN(pDevIns, pThis, VINF_IOM_R3_IOPORT_WRITE); 828 828 switch (pChan->write_state) 829 829 { … … 844 844 break; 845 845 } 846 DEVPIT_UNLOCK_BOTH(p This);846 DEVPIT_UNLOCK_BOTH(pDevIns, pThis); 847 847 #endif /* !IN_RING3 */ 848 848 } … … 856 856 PDMBOTHCBDECL(int) pitIOPortSpeakerRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT uPort, uint32_t *pu32, unsigned cb) 857 857 { 858 RT_NOREF 2(pvUser, uPort);858 RT_NOREF(pvUser, uPort); 859 859 if (cb == 1) 860 860 { 861 861 PPITSTATE pThis = PDMDEVINS_2_DATA(pDevIns, PPITSTATE); 862 DEVPIT_LOCK_BOTH_RETURN(p This, VINF_IOM_R3_IOPORT_READ);862 DEVPIT_LOCK_BOTH_RETURN(pDevIns, pThis, VINF_IOM_R3_IOPORT_READ); 863 863 864 864 const uint64_t u64Now = TMTimerGet(pThis->channels[0].CTX_SUFF(pTimer)); … … 882 882 const int fTimer2GateStatus = pit_get_gate(pThis, 2); 883 883 884 DEVPIT_UNLOCK_BOTH(p This);884 DEVPIT_UNLOCK_BOTH(pDevIns, pThis); 885 885 886 886 *pu32 = fTimer2GateStatus … … 902 902 PDMBOTHCBDECL(int) pitIOPortSpeakerWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT uPort, uint32_t u32, unsigned cb) 903 903 { 904 RT_NOREF 2(pvUser, uPort);904 RT_NOREF(pvUser, uPort); 905 905 if (cb == 1) 906 906 { 907 907 PPITSTATE pThis = PDMDEVINS_2_DATA(pDevIns, PPITSTATE); 908 DEVPIT_LOCK_BOTH_RETURN(p This, VERR_IGNORED);908 DEVPIT_LOCK_BOTH_RETURN(pDevIns, pThis, VERR_IGNORED); 909 909 910 910 pThis->speaker_data_on = (u32 >> 1) & 1; … … 914 914 * abstract the details, and if necessary create a thread to minimize 915 915 * impact on VM execution. */ 916 # ifdef RT_OS_LINUX916 # ifdef RT_OS_LINUX 917 917 if (pThis->enmSpeakerEmu != PIT_SPEAKER_EMU_NONE) 918 918 { … … 992 992 } 993 993 } 994 # endif995 996 DEVPIT_UNLOCK_BOTH(p This);994 # endif /* RT_OS_LINUX */ 995 996 DEVPIT_UNLOCK_BOTH(pDevIns, pThis); 997 997 } 998 998 Log(("pitIOPortSpeakerWrite: uPort=%#x cb=%x u32=%#x\n", uPort, cb, u32)); … … 1008 1008 static DECLCALLBACK(int) pitLiveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uPass) 1009 1009 { 1010 RT_NOREF1(uPass); 1011 PPITSTATE pThis = PDMDEVINS_2_DATA(pDevIns, PPITSTATE); 1012 SSMR3PutIOPort(pSSM, pThis->IOPortBaseCfg); 1013 SSMR3PutU8( pSSM, pThis->channels[0].irq); 1014 SSMR3PutBool( pSSM, pThis->fSpeakerCfg); 1010 PPITSTATE pThis = PDMDEVINS_2_DATA(pDevIns, PPITSTATE); 1011 PCPDMDEVHLPR3 pHlp = pDevIns->pHlpR3; 1012 RT_NOREF(uPass); 1013 pHlp->pfnSSMPutIOPort(pSSM, pThis->IOPortBaseCfg); 1014 pHlp->pfnSSMPutU8( pSSM, pThis->channels[0].irq); 1015 pHlp->pfnSSMPutBool( pSSM, pThis->fSpeakerCfg); 1015 1016 return VINF_SSM_DONT_CALL_AGAIN; 1016 1017 } … … 1022 1023 static DECLCALLBACK(int) pitSaveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM) 1023 1024 { 1024 PPITSTATE pThis = PDMDEVINS_2_DATA(pDevIns, PPITSTATE); 1025 PDMCritSectEnter(&pThis->CritSect, VERR_IGNORED); 1025 PPITSTATE pThis = PDMDEVINS_2_DATA(pDevIns, PPITSTATE); 1026 PCPDMDEVHLPR3 pHlp = pDevIns->pHlpR3; 1027 PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_IGNORED); 1026 1028 1027 1029 /* The config. */ … … 1032 1034 { 1033 1035 PPITCHANNEL pChan = &pThis->channels[i]; 1034 SSMR3PutU32(pSSM, pChan->count);1035 SSMR3PutU16(pSSM, pChan->latched_count);1036 SSMR3PutU8(pSSM, pChan->count_latched);1037 SSMR3PutU8(pSSM, pChan->status_latched);1038 SSMR3PutU8(pSSM, pChan->status);1039 SSMR3PutU8(pSSM, pChan->read_state);1040 SSMR3PutU8(pSSM, pChan->write_state);1041 SSMR3PutU8(pSSM, pChan->write_latch);1042 SSMR3PutU8(pSSM, pChan->rw_mode);1043 SSMR3PutU8(pSSM, pChan->mode);1044 SSMR3PutU8(pSSM, pChan->bcd);1045 SSMR3PutU8(pSSM, pChan->gate);1046 SSMR3PutU64(pSSM, pChan->count_load_time);1047 SSMR3PutU64(pSSM, pChan->u64NextTS);1048 SSMR3PutU64(pSSM, pChan->u64ReloadTS);1049 SSMR3PutS64(pSSM, pChan->next_transition_time);1036 pHlp->pfnSSMPutU32(pSSM, pChan->count); 1037 pHlp->pfnSSMPutU16(pSSM, pChan->latched_count); 1038 pHlp->pfnSSMPutU8(pSSM, pChan->count_latched); 1039 pHlp->pfnSSMPutU8(pSSM, pChan->status_latched); 1040 pHlp->pfnSSMPutU8(pSSM, pChan->status); 1041 pHlp->pfnSSMPutU8(pSSM, pChan->read_state); 1042 pHlp->pfnSSMPutU8(pSSM, pChan->write_state); 1043 pHlp->pfnSSMPutU8(pSSM, pChan->write_latch); 1044 pHlp->pfnSSMPutU8(pSSM, pChan->rw_mode); 1045 pHlp->pfnSSMPutU8(pSSM, pChan->mode); 1046 pHlp->pfnSSMPutU8(pSSM, pChan->bcd); 1047 pHlp->pfnSSMPutU8(pSSM, pChan->gate); 1048 pHlp->pfnSSMPutU64(pSSM, pChan->count_load_time); 1049 pHlp->pfnSSMPutU64(pSSM, pChan->u64NextTS); 1050 pHlp->pfnSSMPutU64(pSSM, pChan->u64ReloadTS); 1051 pHlp->pfnSSMPutS64(pSSM, pChan->next_transition_time); 1050 1052 if (pChan->CTX_SUFF(pTimer)) 1051 1053 TMR3TimerSave(pChan->CTX_SUFF(pTimer), pSSM); 1052 1054 } 1053 1055 1054 SSMR3PutS32(pSSM, pThis->speaker_data_on);1056 pHlp->pfnSSMPutS32(pSSM, pThis->speaker_data_on); 1055 1057 #ifdef FAKE_REFRESH_CLOCK 1056 SSMR3PutS32(pSSM, pThis->dummy_refresh_clock);1058 pHlp->pfnSSMPutS32(pSSM, pThis->dummy_refresh_clock); 1057 1059 #else 1058 SSMR3PutS32(pSSM, 0);1060 pHlp->pfnSSMPutS32(pSSM, 0); 1059 1061 #endif 1060 1062 1061 SSMR3PutBool(pSSM, pThis->fDisabledByHpet);1062 1063 PDM CritSectLeave(&pThis->CritSect);1063 pHlp->pfnSSMPutBool(pSSM, pThis->fDisabledByHpet); 1064 1065 PDMDevHlpCritSectLeave(pDevIns, &pThis->CritSect); 1064 1066 return VINF_SUCCESS; 1065 1067 } … … 1071 1073 static DECLCALLBACK(int) pitLoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass) 1072 1074 { 1073 PPITSTATE pThis = PDMDEVINS_2_DATA(pDevIns, PPITSTATE); 1074 int rc; 1075 PPITSTATE pThis = PDMDEVINS_2_DATA(pDevIns, PPITSTATE); 1076 PCPDMDEVHLPR3 pHlp = pDevIns->pHlpR3; 1077 int rc; 1075 1078 1076 1079 if ( uVersion != PIT_SAVED_STATE_VERSION … … 1083 1086 { 1084 1087 RTIOPORT IOPortBaseCfg; 1085 rc = SSMR3GetIOPort(pSSM, &IOPortBaseCfg); AssertRCReturn(rc, rc);1088 rc = pHlp->pfnSSMGetIOPort(pSSM, &IOPortBaseCfg); AssertRCReturn(rc, rc); 1086 1089 if (IOPortBaseCfg != pThis->IOPortBaseCfg) 1087 return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("Config mismatch - IOPortBaseCfg: saved=%RTiop config=%RTiop"),1090 return pHlp->pfnSSMSetCfgError(pSSM, RT_SRC_POS, N_("Config mismatch - IOPortBaseCfg: saved=%RTiop config=%RTiop"), 1088 1091 IOPortBaseCfg, pThis->IOPortBaseCfg); 1089 1092 1090 1093 uint8_t u8Irq; 1091 rc = SSMR3GetU8(pSSM, &u8Irq); AssertRCReturn(rc, rc);1094 rc = pHlp->pfnSSMGetU8(pSSM, &u8Irq); AssertRCReturn(rc, rc); 1092 1095 if (u8Irq != pThis->channels[0].irq) 1093 return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("Config mismatch - u8Irq: saved=%#x config=%#x"),1096 return pHlp->pfnSSMSetCfgError(pSSM, RT_SRC_POS, N_("Config mismatch - u8Irq: saved=%#x config=%#x"), 1094 1097 u8Irq, pThis->channels[0].irq); 1095 1098 1096 1099 bool fSpeakerCfg; 1097 rc = SSMR3GetBool(pSSM, &fSpeakerCfg); AssertRCReturn(rc, rc);1100 rc = pHlp->pfnSSMGetBool(pSSM, &fSpeakerCfg); AssertRCReturn(rc, rc); 1098 1101 if (fSpeakerCfg != pThis->fSpeakerCfg) 1099 return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("Config mismatch - fSpeakerCfg: saved=%RTbool config=%RTbool"),1102 return pHlp->pfnSSMSetCfgError(pSSM, RT_SRC_POS, N_("Config mismatch - fSpeakerCfg: saved=%RTbool config=%RTbool"), 1100 1103 fSpeakerCfg, pThis->fSpeakerCfg); 1101 1104 } … … 1108 1111 { 1109 1112 PPITCHANNEL pChan = &pThis->channels[i]; 1110 SSMR3GetU32(pSSM, &pChan->count);1111 SSMR3GetU16(pSSM, &pChan->latched_count);1112 SSMR3GetU8(pSSM, &pChan->count_latched);1113 SSMR3GetU8(pSSM, &pChan->status_latched);1114 SSMR3GetU8(pSSM, &pChan->status);1115 SSMR3GetU8(pSSM, &pChan->read_state);1116 SSMR3GetU8(pSSM, &pChan->write_state);1117 SSMR3GetU8(pSSM, &pChan->write_latch);1118 SSMR3GetU8(pSSM, &pChan->rw_mode);1119 SSMR3GetU8(pSSM, &pChan->mode);1120 SSMR3GetU8(pSSM, &pChan->bcd);1121 SSMR3GetU8(pSSM, &pChan->gate);1122 SSMR3GetU64(pSSM, &pChan->count_load_time);1123 SSMR3GetU64(pSSM, &pChan->u64NextTS);1124 SSMR3GetU64(pSSM, &pChan->u64ReloadTS);1125 SSMR3GetS64(pSSM, &pChan->next_transition_time);1113 pHlp->pfnSSMGetU32(pSSM, &pChan->count); 1114 pHlp->pfnSSMGetU16(pSSM, &pChan->latched_count); 1115 pHlp->pfnSSMGetU8(pSSM, &pChan->count_latched); 1116 pHlp->pfnSSMGetU8(pSSM, &pChan->status_latched); 1117 pHlp->pfnSSMGetU8(pSSM, &pChan->status); 1118 pHlp->pfnSSMGetU8(pSSM, &pChan->read_state); 1119 pHlp->pfnSSMGetU8(pSSM, &pChan->write_state); 1120 pHlp->pfnSSMGetU8(pSSM, &pChan->write_latch); 1121 pHlp->pfnSSMGetU8(pSSM, &pChan->rw_mode); 1122 pHlp->pfnSSMGetU8(pSSM, &pChan->mode); 1123 pHlp->pfnSSMGetU8(pSSM, &pChan->bcd); 1124 pHlp->pfnSSMGetU8(pSSM, &pChan->gate); 1125 pHlp->pfnSSMGetU64(pSSM, &pChan->count_load_time); 1126 pHlp->pfnSSMGetU64(pSSM, &pChan->u64NextTS); 1127 pHlp->pfnSSMGetU64(pSSM, &pChan->u64ReloadTS); 1128 pHlp->pfnSSMGetS64(pSSM, &pChan->next_transition_time); 1126 1129 if (pChan->CTX_SUFF(pTimer)) 1127 1130 { … … 1129 1132 LogRel(("PIT: mode=%d count=%#x (%u) - %d.%02d Hz (ch=%d) (restore)\n", 1130 1133 pChan->mode, pChan->count, pChan->count, PIT_FREQ / pChan->count, (PIT_FREQ * 100 / pChan->count) % 100, i)); 1131 PDM CritSectEnter(&pThis->CritSect, VERR_IGNORED);1134 PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_IGNORED); 1132 1135 TMTimerSetFrequencyHint(pChan->CTX_SUFF(pTimer), PIT_FREQ / pChan->count); 1133 PDM CritSectLeave(&pThis->CritSect);1136 PDMDevHlpCritSectLeave(pDevIns, &pThis->CritSect); 1134 1137 } 1135 1138 pThis->channels[i].cRelLogEntries = 0; 1136 1139 } 1137 1140 1138 SSMR3GetS32(pSSM, &pThis->speaker_data_on);1141 pHlp->pfnSSMGetS32(pSSM, &pThis->speaker_data_on); 1139 1142 #ifdef FAKE_REFRESH_CLOCK 1140 SSMR3GetS32(pSSM, &pThis->dummy_refresh_clock);1143 pHlp->pfnSSMGetS32(pSSM, &pThis->dummy_refresh_clock); 1141 1144 #else 1142 1145 int32_t u32Dummy; 1143 SSMR3GetS32(pSSM, &u32Dummy);1146 pHlp->pfnSSMGetS32(pSSM, &u32Dummy); 1144 1147 #endif 1145 1148 if (uVersion > PIT_SAVED_STATE_VERSION_VBOX_31) 1146 SSMR3GetBool(pSSM, &pThis->fDisabledByHpet);1149 pHlp->pfnSSMGetBool(pSSM, &pThis->fDisabledByHpet); 1147 1150 1148 1151 return VINF_SUCCESS; … … 1158 1161 static DECLCALLBACK(void) pitTimer(PPDMDEVINS pDevIns, PTMTIMER pTimer, void *pvUser) 1159 1162 { 1160 RT_NOREF 1(pDevIns);1163 RT_NOREF(pDevIns); 1161 1164 PPITCHANNEL pChan = (PPITCHANNEL)pvUser; 1162 1165 STAM_PROFILE_ADV_START(&pChan->CTX_SUFF(pPit)->StatPITHandler, a); 1163 1166 1164 1167 Log(("pitTimer\n")); 1165 Assert(PDM CritSectIsOwner(&PDMDEVINS_2_DATA(pDevIns, PPITSTATE)->CritSect));1168 Assert(PDMDevHlpCritSectIsOwner(pDevIns, &PDMDEVINS_2_DATA(pDevIns, PPITSTATE)->CritSect)); 1166 1169 Assert(TMTimerIsLockOwner(pTimer)); 1167 1170 … … 1179 1182 static DECLCALLBACK(void) pitInfo(PPDMDEVINS pDevIns, PCDBGFINFOHLP pHlp, const char *pszArgs) 1180 1183 { 1181 RT_NOREF 1(pszArgs);1184 RT_NOREF(pszArgs); 1182 1185 PPITSTATE pThis = PDMDEVINS_2_DATA(pDevIns, PPITSTATE); 1183 1186 unsigned i; … … 1221 1224 static DECLCALLBACK(void) pitNotifyHpetLegacyNotify_ModeChanged(PPDMIHPETLEGACYNOTIFY pInterface, bool fActivated) 1222 1225 { 1223 PPITSTATE pThis = RT_FROM_MEMBER(pInterface, PITSTATE, IHpetLegacyNotify); 1224 PDMCritSectEnter(&pThis->CritSect, VERR_IGNORED); 1226 PPITSTATE pThis = RT_FROM_MEMBER(pInterface, PITSTATE, IHpetLegacyNotify); 1227 PPDMDEVINS pDevIns = pThis->pDevIns; 1228 PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_IGNORED); 1225 1229 1226 1230 pThis->fDisabledByHpet = fActivated; 1227 1231 1228 PDM CritSectLeave(&pThis->CritSect);1232 PDMDevHlpCritSectLeave(pDevIns, &pThis->CritSect); 1229 1233 } 1230 1234 … … 1252 1256 static DECLCALLBACK(void) pitRelocate(PPDMDEVINS pDevIns, RTGCINTPTR offDelta) 1253 1257 { 1254 RT_NOREF 1(offDelta);1258 RT_NOREF(offDelta); 1255 1259 PPITSTATE pThis = PDMDEVINS_2_DATA(pDevIns, PPITSTATE); 1256 1260 LogFlow(("pitRelocate: \n")); … … 1274 1278 LogFlow(("pitReset: \n")); 1275 1279 1276 DEVPIT_R3_LOCK_BOTH(p This);1280 DEVPIT_R3_LOCK_BOTH(pDevIns, pThis); 1277 1281 1278 1282 pThis->fDisabledByHpet = false; … … 1300 1304 } 1301 1305 1302 DEVPIT_UNLOCK_BOTH(p This);1306 DEVPIT_UNLOCK_BOTH(pDevIns, pThis); 1303 1307 } 1304 1308 … … 1310 1314 { 1311 1315 PDMDEV_CHECK_VERSIONS_RETURN(pDevIns); 1312 PPITSTATE pThis = PDMDEVINS_2_DATA(pDevIns, PPITSTATE); 1313 int rc; 1314 uint8_t u8Irq; 1315 uint16_t u16Base; 1316 bool fSpeaker; 1317 bool fGCEnabled; 1318 bool fR0Enabled; 1319 unsigned i; 1316 PPITSTATE pThis = PDMDEVINS_2_DATA(pDevIns, PPITSTATE); 1317 PCPDMDEVHLPR3 pHlp = pDevIns->pHlpR3; 1318 int rc; 1319 uint8_t u8Irq; 1320 uint16_t u16Base; 1321 bool fSpeaker; 1322 unsigned i; 1320 1323 Assert(iInstance == 0); 1321 1324 1322 1325 /* 1323 * Validate configuration.1326 * Validate and read the configuration. 1324 1327 */ 1325 if (!CFGMR3AreValuesValid(pCfg, "Irq\0" "Base\0" 1326 "SpeakerEnabled\0" "PassthroughSpeaker\0" "PassthroughSpeakerDevice\0" 1327 "R0Enabled\0" "GCEnabled\0")) 1328 return VERR_PDM_DEVINS_UNKNOWN_CFG_VALUES; 1328 PDMDEV_VALIDATE_CONFIG_RETURN(pDevIns, "Irq|Base|SpeakerEnabled|PassthroughSpeaker|PassthroughSpeakerDevice", ""); 1329 1330 rc = pHlp->pfnCFGMQueryU8Def(pCfg, "Irq", &u8Irq, 0); 1331 if (RT_FAILURE(rc)) 1332 return PDMDEV_SET_ERROR(pDevIns, rc, N_("Configuration error: Querying \"Irq\" as a uint8_t failed")); 1333 1334 rc = pHlp->pfnCFGMQueryU16Def(pCfg, "Base", &u16Base, 0x40); 1335 if (RT_FAILURE(rc)) 1336 return PDMDEV_SET_ERROR(pDevIns, rc, N_("Configuration error: Querying \"Base\" as a uint16_t failed")); 1337 1338 rc = pHlp->pfnCFGMQueryBoolDef(pCfg, "SpeakerEnabled", &fSpeaker, true); 1339 if (RT_FAILURE(rc)) 1340 return PDMDEV_SET_ERROR(pDevIns, rc, N_("Configuration error: Querying \"SpeakerEnabled\" as a bool failed")); 1341 1342 uint8_t uPassthroughSpeaker; 1343 char *pszPassthroughSpeakerDevice = NULL; 1344 rc = pHlp->pfnCFGMQueryU8Def(pCfg, "PassthroughSpeaker", &uPassthroughSpeaker, 0); 1345 if (RT_FAILURE(rc)) 1346 return PDMDEV_SET_ERROR(pDevIns, rc, N_("Configuration error: failed to read PassthroughSpeaker as uint8_t")); 1347 if (uPassthroughSpeaker) 1348 { 1349 rc = pHlp->pfnCFGMQueryStringAllocDef(pCfg, "PassthroughSpeakerDevice", &pszPassthroughSpeakerDevice, NULL); 1350 if (RT_FAILURE(rc)) 1351 return PDMDEV_SET_ERROR(pDevIns, rc, N_("Configuration error: failed to read PassthroughSpeakerDevice as string")); 1352 } 1329 1353 1330 1354 /* 1331 1355 * Init the data. 1332 1356 */ 1333 rc = CFGMR3QueryU8Def(pCfg, "Irq", &u8Irq, 0);1334 if (RT_FAILURE(rc))1335 return PDMDEV_SET_ERROR(pDevIns, rc,1336 N_("Configuration error: Querying \"Irq\" as a uint8_t failed"));1337 1338 rc = CFGMR3QueryU16Def(pCfg, "Base", &u16Base, 0x40);1339 if (RT_FAILURE(rc))1340 return PDMDEV_SET_ERROR(pDevIns, rc,1341 N_("Configuration error: Querying \"Base\" as a uint16_t failed"));1342 1343 rc = CFGMR3QueryBoolDef(pCfg, "SpeakerEnabled", &fSpeaker, true);1344 if (RT_FAILURE(rc))1345 return PDMDEV_SET_ERROR(pDevIns, rc,1346 N_("Configuration error: Querying \"SpeakerEnabled\" as a bool failed"));1347 1348 uint8_t uPassthroughSpeaker;1349 char *pszPassthroughSpeakerDevice = NULL;1350 rc = CFGMR3QueryU8Def(pCfg, "PassthroughSpeaker", &uPassthroughSpeaker, 0);1351 if (RT_FAILURE(rc))1352 return PDMDEV_SET_ERROR(pDevIns, rc,1353 N_("Configuration error: failed to read PassthroughSpeaker as uint8_t"));1354 if (uPassthroughSpeaker)1355 {1356 rc = CFGMR3QueryStringAllocDef(pCfg, "PassthroughSpeakerDevice", &pszPassthroughSpeakerDevice, NULL);1357 if (RT_FAILURE(rc))1358 return PDMDEV_SET_ERROR(pDevIns, rc,1359 N_("Configuration error: failed to read PassthroughSpeakerDevice as string"));1360 }1361 1362 rc = CFGMR3QueryBoolDef(pCfg, "GCEnabled", &fGCEnabled, true);1363 if (RT_FAILURE(rc))1364 return PDMDEV_SET_ERROR(pDevIns, rc,1365 N_("Configuration error: Querying \"GCEnabled\" as a bool failed"));1366 1367 rc = CFGMR3QueryBoolDef(pCfg, "R0Enabled", &fR0Enabled, true);1368 if (RT_FAILURE(rc))1369 return PDMDEV_SET_ERROR(pDevIns, rc,1370 N_("Configuration error: failed to read R0Enabled as boolean"));1371 1372 1357 pThis->pDevIns = pDevIns; 1373 1358 pThis->IOPortBaseCfg = u16Base; … … 1425 1410 if (pszPassthroughSpeakerDevice) 1426 1411 { 1427 MMR3HeapFree(pszPassthroughSpeakerDevice);1412 PDMDevHlpMMHeapFree(pDevIns, pszPassthroughSpeakerDevice); 1428 1413 pszPassthroughSpeakerDevice = NULL; 1429 1414 } … … 1473 1458 if (RT_FAILURE(rc)) 1474 1459 return rc; 1475 if ( fGCEnabled)1460 if (pDevIns->fRCEnabled) 1476 1461 { 1477 1462 rc = PDMDevHlpIOPortRegisterRC(pDevIns, u16Base, 4, 0, "pitIOPortWrite", "pitIOPortRead", NULL, NULL, "i8254 Programmable Interval Timer"); … … 1479 1464 return rc; 1480 1465 } 1481 if ( fR0Enabled)1466 if (pDevIns->fR0Enabled) 1482 1467 { 1483 1468 rc = PDMDevHlpIOPortRegisterR0(pDevIns, u16Base, 4, 0, "pitIOPortWrite", "pitIOPortRead", NULL, NULL, "i8254 Programmable Interval Timer"); … … 1491 1476 if (RT_FAILURE(rc)) 1492 1477 return rc; 1493 if ( fGCEnabled)1478 if (pDevIns->fRCEnabled) 1494 1479 { 1495 1480 rc = PDMDevHlpIOPortRegisterRC(pDevIns, 0x61, 1, 0, NULL, "pitIOPortSpeakerRead", NULL, NULL, "PC Speaker");
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