VirtualBox

Changeset 81900 in vbox


Ignore:
Timestamp:
Nov 16, 2019 8:10:15 PM (5 years ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
134695
Message:

DevPit-i8254: Converted the timer to new handle based interface. Eliminated pPitR3 and friends in the channels. bugref:9218

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/src/VBox/Devices/PC/DevPit-i8254.cpp

    r81898 r81900  
    124124#define DEVPIT_LOCK_BOTH_RETURN(a_pDevIns, a_pThis, a_rcBusy)  \
    125125    do { \
    126         int rcLock = TMTimerLock((a_pThis)->channels[0].CTX_SUFF(pTimer), (a_rcBusy)); \
     126        int rcLock = PDMDevHlpTimerLock((a_pDevIns), (a_pThis)->channels[0].hTimer, (a_rcBusy)); \
    127127        if (rcLock != VINF_SUCCESS) \
    128128            return rcLock; \
     
    130130        if (rcLock != VINF_SUCCESS) \
    131131        { \
    132             TMTimerUnlock((a_pThis)->channels[0].CTX_SUFF(pTimer)); \
     132            PDMDevHlpTimerUnlock((a_pDevIns), (a_pThis)->channels[0].hTimer); \
    133133            return rcLock; \
    134134        } \
     
    141141# define DEVPIT_R3_LOCK_BOTH(a_pDevIns, a_pThis)  \
    142142    do { \
    143         TMTimerLock((a_pThis)->channels[0].CTX_SUFF(pTimer), VERR_IGNORED); \
     143        PDMDevHlpTimerLock((a_pDevIns), (a_pThis)->channels[0].hTimer, VERR_IGNORED); \
    144144        PDMDevHlpCritSectEnter((a_pDevIns), &(a_pThis)->CritSect, VERR_IGNORED); \
    145145    } while (0)
     
    152152    do { \
    153153        PDMDevHlpCritSectLeave((a_pDevIns), &(a_pThis)->CritSect); \
    154         TMTimerUnlock((a_pThis)->channels[0].CTX_SUFF(pTimer)); \
     154        PDMDevHlpTimerUnlock((a_pDevIns), (a_pThis)->channels[0].hTimer); \
    155155    } while (0)
    156156
     
    165165typedef struct PITCHANNEL
    166166{
    167     /** Pointer to the instance data - R3 Ptr. */
    168     R3PTRTYPE(struct PITSTATE *)    pPitR3;
    169     /** The timer - R3 Ptr.
     167    /** The timer.
    170168     * @note Only channel 0 has a timer.  */
    171     PTMTIMERR3                      pTimerR3;
    172     /** Pointer to the instance data - R0 Ptr. */
    173     R0PTRTYPE(struct PITSTATE *)    pPitR0;
    174     /** The timer - R0 Ptr.
    175      * @note Only channel 0 has a timer.  */
    176     PTMTIMERR0                      pTimerR0;
    177     /** Pointer to the instance data - RC Ptr. */
    178     RCPTRTYPE(struct PITSTATE *)    pPitRC;
    179     /** The timer - RC Ptr.
    180      * @note Only channel 0 has a timer.  */
    181     PTMTIMERRC                      pTimerRC;
    182     /** The virtual time stamp at the last reload. (only used in mode 2 for now) */
     169    TMTIMERHANDLE                   hTimer;
     170    /** The virtual time stamp at the last reload (only used in mode 2 for now). */
    183171    uint64_t                        u64ReloadTS;
    184172    /** The actual time of the next tick.
     
    186174    uint64_t                        u64NextTS;
    187175
    188     /** (count_load_time is only set by TMTimerGet() which returns uint64_t) */
     176    /** (count_load_time is only set by PDMDevHlpTimerGet() which returns uint64_t) */
    189177    uint64_t count_load_time;
    190178    /* irq handling */
     
    192180    int32_t irq;
    193181    /** Number of release log entries. Used to prevent flooding. */
    194     uint32_t cRelLogEntries;
     182    uint8_t cRelLogEntries;
     183    /** The channel number. */
     184    uint8_t iChan;
     185    uint8_t abAlignment[2];
    195186
    196187    uint32_t count; /* can be 65536 */
     
    272263*********************************************************************************************************************************/
    273264#ifdef IN_RING3
    274 static void pit_irq_timer_update(PPITCHANNEL pChan, uint64_t current_time, uint64_t now, bool in_timer);
     265static void pit_irq_timer_update(PPDMDEVINS pDevIns, PPITSTATE pThis, PPITCHANNEL pChan,
     266                                 uint64_t current_time, uint64_t now, bool in_timer);
    275267#endif
    276268
     
    319311#endif /* IN_RING3 */
    320312
    321 static int pit_get_count(PPITCHANNEL pChan)
     313static int pit_get_count(PPDMDEVINS pDevIns, PPITSTATE pThis, PPITCHANNEL pChan)
    322314{
    323315    uint64_t d;
    324     PTMTIMER pTimer = pChan->CTX_SUFF(pPit)->channels[0].CTX_SUFF(pTimer);
    325     Assert(TMTimerIsLockOwner(pTimer));
     316    TMTIMERHANDLE hTimer = pThis->channels[0].hTimer;
     317    Assert(PDMDevHlpTimerIsLockOwner(pDevIns, hTimer));
    326318
    327319    if (EFFECTIVE_MODE(pChan->mode) == 2)
     
    329321        if (pChan->u64NextTS == UINT64_MAX)
    330322        {
    331             d = ASMMultU64ByU32DivByU32(TMTimerGet(pTimer) - pChan->count_load_time, PIT_FREQ, TMTimerGetFreq(pTimer));
     323            d = ASMMultU64ByU32DivByU32(PDMDevHlpTimerGet(pDevIns, hTimer) - pChan->count_load_time,
     324                                        PIT_FREQ, PDMDevHlpTimerGetFreq(pDevIns, hTimer));
    332325            return pChan->count - (d % pChan->count); /** @todo check this value. */
    333326        }
     
    335328        if (!Interval)
    336329            return pChan->count - 1; /** @todo This is WRONG! But I'm too tired to fix it properly and just want to shut up a DIV/0 trap now. */
    337         d = TMTimerGet(pTimer);
     330        d = PDMDevHlpTimerGet(pDevIns, hTimer);
    338331        d = ASMMultU64ByU32DivByU32(d - pChan->u64ReloadTS, pChan->count, Interval);
    339332        if (d >= pChan->count)
     
    342335    }
    343336
    344     d = ASMMultU64ByU32DivByU32(TMTimerGet(pTimer) - pChan->count_load_time, PIT_FREQ, TMTimerGetFreq(pTimer));
     337    d = ASMMultU64ByU32DivByU32(PDMDevHlpTimerGet(pDevIns, hTimer) - pChan->count_load_time,
     338                                PIT_FREQ, PDMDevHlpTimerGetFreq(pDevIns, hTimer));
    345339    int counter;
    346340    switch (EFFECTIVE_MODE(pChan->mode))
     
    365359
    366360/* get pit output bit */
    367 static int pit_get_out1(PPITCHANNEL pChan, int64_t current_time)
    368 {
    369     PTMTIMER pTimer = pChan->CTX_SUFF(pPit)->channels[0].CTX_SUFF(pTimer);
     361static int pit_get_out1(PPDMDEVINS pDevIns, PPITSTATE pThis, PPITCHANNEL pChan, int64_t current_time)
     362{
     363    TMTIMERHANDLE hTimer = pThis->channels[0].hTimer;
    370364    uint64_t d;
    371365    int out;
    372366
    373     d = ASMMultU64ByU32DivByU32(current_time - pChan->count_load_time, PIT_FREQ, TMTimerGetFreq(pTimer));
     367    d = ASMMultU64ByU32DivByU32(current_time - pChan->count_load_time, PIT_FREQ, PDMDevHlpTimerGetFreq(pDevIns, hTimer));
    374368    switch (EFFECTIVE_MODE(pChan->mode))
    375369    {
     
    400394
    401395
    402 static int pit_get_out(PPITSTATE pThis, int channel, int64_t current_time)
     396static int pit_get_out(PPDMDEVINS pDevIns, PPITSTATE pThis, int channel, int64_t current_time)
    403397{
    404398    PPITCHANNEL pChan = &pThis->channels[channel];
    405     return pit_get_out1(pChan, current_time);
     399    return pit_get_out1(pDevIns, pThis, pChan, current_time);
    406400}
    407401
     
    415409
    416410/* if already latched, do not latch again */
    417 static void pit_latch_count(PPITCHANNEL pChan)
     411static void pit_latch_count(PPDMDEVINS pDevIns, PPITSTATE pThis, PPITCHANNEL pChan)
    418412{
    419413    if (!pChan->count_latched)
    420414    {
    421         pChan->latched_count = pit_get_count(pChan);
     415        pChan->latched_count = pit_get_count(pDevIns, pThis, pChan);
    422416        pChan->count_latched = pChan->rw_mode;
    423417        LogFlow(("pit_latch_count: latched_count=%#06x / %10RU64 ns (c=%#06x m=%d)\n",
     
    430424
    431425/* val must be 0 or 1 */
    432 static void pit_set_gate(PPITSTATE pThis, int channel, int val)
    433 {
    434     PPITCHANNEL pChan  = &pThis->channels[channel];
    435     PTMTIMER    pTimer = pChan->CTX_SUFF(pPit)->channels[0].CTX_SUFF(pTimer);
     426static void pit_set_gate(PPDMDEVINS pDevIns, PPITSTATE pThis, int channel, int val)
     427{
     428    PPITCHANNEL     pChan  = &pThis->channels[channel];
     429    TMTIMERHANDLE   hTimer = pThis->channels[0].hTimer;
    436430
    437431    Assert((val & 1) == val);
    438     Assert(TMTimerIsLockOwner(pTimer));
     432    Assert(PDMDevHlpTimerIsLockOwner(pDevIns, hTimer));
    439433
    440434    switch (EFFECTIVE_MODE(pChan->mode))
     
    451445                /* restart counting on rising edge */
    452446                Log(("pit_set_gate: restarting mode %d\n", pChan->mode));
    453                 pChan->count_load_time = TMTimerGet(pTimer);
    454                 pit_irq_timer_update(pChan, pChan->count_load_time, pChan->count_load_time, false);
     447                pChan->count_load_time = PDMDevHlpTimerGet(pDevIns, hTimer);
     448                pit_irq_timer_update(pDevIns, pThis, pChan, pChan->count_load_time, pChan->count_load_time, false);
    455449            }
    456450            break;
     
    461455                /* restart counting on rising edge */
    462456                Log(("pit_set_gate: restarting mode %d\n", pChan->mode));
    463                 pChan->count_load_time = pChan->u64ReloadTS = TMTimerGet(pTimer);
    464                 pit_irq_timer_update(pChan, pChan->count_load_time, pChan->count_load_time, false);
     457                pChan->count_load_time = pChan->u64ReloadTS = PDMDevHlpTimerGet(pDevIns, hTimer);
     458                pit_irq_timer_update(pDevIns, pThis, pChan, pChan->count_load_time, pChan->count_load_time, false);
    465459            }
    466460            /* XXX: disable/enable counting */
     
    470464}
    471465
    472 static void pit_load_count(PPITCHANNEL pChan, int val)
    473 {
    474     PTMTIMER pTimer = pChan->CTX_SUFF(pPit)->channels[0].CTX_SUFF(pTimer);
    475     Assert(TMTimerIsLockOwner(pTimer));
     466static void pit_load_count(PPDMDEVINS pDevIns, PPITSTATE pThis, PPITCHANNEL pChan, int val)
     467{
     468    TMTIMERHANDLE hTimer = pThis->channels[0].hTimer;
     469    Assert(PDMDevHlpTimerIsLockOwner(pDevIns, hTimer));
    476470
    477471    if (val == 0)
    478472        val = 0x10000;
    479     pChan->count_load_time = pChan->u64ReloadTS = TMTimerGet(pTimer);
     473    pChan->count_load_time = pChan->u64ReloadTS = PDMDevHlpTimerGet(pDevIns, hTimer);
    480474    pChan->count = val;
    481     pit_irq_timer_update(pChan, pChan->count_load_time, pChan->count_load_time, false);
     475    pit_irq_timer_update(pDevIns, pThis, pChan, pChan->count_load_time, pChan->count_load_time, false);
    482476
    483477    /* log the new rate (ch 0 only). */
    484     if (pChan->pTimerR3 /* ch 0 */)
    485     {
    486         if (pChan->cRelLogEntries++ < 32)
     478    if (pChan->hTimer != NIL_TMTIMERHANDLE /* ch 0 */)
     479    {
     480        if (pChan->cRelLogEntries < 32)
     481        {
     482            pChan->cRelLogEntries++;
    487483            LogRel(("PIT: mode=%d count=%#x (%u) - %d.%02d Hz (ch=0)\n",
    488484                    pChan->mode, pChan->count, pChan->count, PIT_FREQ / pChan->count, (PIT_FREQ * 100 / pChan->count) % 100));
     485        }
    489486        else
    490487            Log(("PIT: mode=%d count=%#x (%u) - %d.%02d Hz (ch=0)\n",
    491488                 pChan->mode, pChan->count, pChan->count, PIT_FREQ / pChan->count, (PIT_FREQ * 100 / pChan->count) % 100));
    492         TMTimerSetFrequencyHint(pChan->CTX_SUFF(pTimer), PIT_FREQ / pChan->count);
     489        PDMDevHlpTimerSetFrequencyHint(pDevIns, hTimer, PIT_FREQ / pChan->count);
    493490    }
    494491    else
    495492        Log(("PIT: mode=%d count=%#x (%u) - %d.%02d Hz (ch=%d)\n",
    496493             pChan->mode, pChan->count, pChan->count, PIT_FREQ / pChan->count, (PIT_FREQ * 100 / pChan->count) % 100,
    497              pChan - &pChan->CTX_SUFF(pPit)->channels[0]));
     494             pChan - &pThis->channels[0]));
    498495}
    499496
    500497/* return -1 if no transition will occur.  */
    501 static int64_t pit_get_next_transition_time(PPITCHANNEL pChan, uint64_t current_time)
    502 {
    503     PTMTIMER pTimer = pChan->CTX_SUFF(pPit)->channels[0].CTX_SUFF(pTimer);
     498static int64_t pit_get_next_transition_time(PPDMDEVINS pDevIns, PPITSTATE pThis, PPITCHANNEL pChan, uint64_t current_time)
     499{
     500    TMTIMERHANDLE hTimer = pThis->channels[0].hTimer;
    504501    uint64_t d, next_time, base;
    505502    uint32_t period2;
    506503
    507     d = ASMMultU64ByU32DivByU32(current_time - pChan->count_load_time, PIT_FREQ, TMTimerGetFreq(pTimer));
    508     switch(EFFECTIVE_MODE(pChan->mode))
     504    d = ASMMultU64ByU32DivByU32(current_time - pChan->count_load_time, PIT_FREQ, PDMDevHlpTimerGetFreq(pDevIns, hTimer));
     505    switch (EFFECTIVE_MODE(pChan->mode))
    509506    {
    510507        default:
     
    568565    /* convert to timer units */
    569566    LogFlow(("PIT: next_time=%'14RU64 %'20RU64 mode=%#x count=%#06x\n", next_time,
    570              ASMMultU64ByU32DivByU32(next_time, TMTimerGetFreq(pTimer), PIT_FREQ), pChan->mode, pChan->count));
    571     next_time = pChan->count_load_time + ASMMultU64ByU32DivByU32(next_time, TMTimerGetFreq(pTimer), PIT_FREQ);
     567             ASMMultU64ByU32DivByU32(next_time, PDMDevHlpTimerGetFreq(pDevIns, hTimer), PIT_FREQ), pChan->mode, pChan->count));
     568    next_time = pChan->count_load_time + ASMMultU64ByU32DivByU32(next_time, PDMDevHlpTimerGetFreq(pDevIns, hTimer), PIT_FREQ);
    572569
    573570    /* fix potential rounding problems */
     
    582579}
    583580
    584 static void pit_irq_timer_update(PPITCHANNEL pChan, uint64_t current_time, uint64_t now, bool in_timer)
     581static void pit_irq_timer_update(PPDMDEVINS pDevIns, PPITSTATE pThis, PPITCHANNEL pChan,
     582                                 uint64_t current_time, uint64_t now, bool in_timer)
    585583{
    586584    int64_t expire_time;
    587585    int irq_level;
    588     Assert(TMTimerIsLockOwner(pChan->CTX_SUFF(pPit)->channels[0].CTX_SUFF(pTimer)));
    589 
    590     if (!pChan->CTX_SUFF(pTimer))
     586    Assert(PDMDevHlpTimerIsLockOwner(pDevIns, pThis->channels[0].hTimer));
     587
     588    if (pChan->hTimer == NIL_TMTIMERHANDLE)
    591589        return;
    592     expire_time = pit_get_next_transition_time(pChan, current_time);
    593     irq_level = pit_get_out1(pChan, current_time) ? PDM_IRQ_LEVEL_HIGH : PDM_IRQ_LEVEL_LOW;
     590    expire_time = pit_get_next_transition_time(pDevIns, pThis, pChan, current_time);
     591    irq_level = pit_get_out1(pDevIns, pThis, pChan, current_time) ? PDM_IRQ_LEVEL_HIGH : PDM_IRQ_LEVEL_LOW;
    594592
    595593    /* If PIT is disabled by HPET - simply disconnect ticks from interrupt controllers,
    596594     * but do not modify other aspects of device operation.
    597595     */
    598     if (!pChan->pPitR3->fDisabledByHpet)
    599     {
    600         PPDMDEVINS pDevIns = pChan->CTX_SUFF(pPit)->pDevIns;
    601 
     596    if (!pThis->fDisabledByHpet)
     597    {
    602598        switch (EFFECTIVE_MODE(pChan->mode))
    603599        {
     
    625621    {
    626622        pChan->u64ReloadTS = now;
    627         STAM_COUNTER_INC(&pChan->CTX_SUFF(pPit)->StatPITIrq);
     623        STAM_COUNTER_INC(&pThis->StatPITIrq);
    628624    }
    629625
     
    632628        Log3(("pit_irq_timer_update: next=%'RU64 now=%'RU64\n", expire_time, now));
    633629        pChan->u64NextTS = expire_time;
    634         TMTimerSet(pChan->CTX_SUFF(pTimer), pChan->u64NextTS);
     630        PDMDevHlpTimerSet(pDevIns, pChan->hTimer, pChan->u64NextTS);
    635631    }
    636632    else
    637633    {
    638634        LogFlow(("PIT: m=%d count=%#4x irq_level=%#x stopped\n", pChan->mode, pChan->count, irq_level));
    639         TMTimerStop(pChan->CTX_SUFF(pTimer));
     635        PDMDevHlpTimerStop(pDevIns, pChan->hTimer);
    640636        pChan->u64NextTS = UINT64_MAX;
    641637    }
     
    701697            default:
    702698            case RW_STATE_LSB:
    703                 count = pit_get_count(pChan);
     699                count = pit_get_count(pDevIns, pThis, pChan);
    704700                ret = count & 0xff;
    705701                break;
    706702            case RW_STATE_MSB:
    707                 count = pit_get_count(pChan);
     703                count = pit_get_count(pDevIns, pThis, pChan);
    708704                ret = (count >> 8) & 0xff;
    709705                break;
    710706            case RW_STATE_WORD0:
    711                 count = pit_get_count(pChan);
     707                count = pit_get_count(pDevIns, pThis, pChan);
    712708                ret = count & 0xff;
    713709                pChan->read_state = RW_STATE_WORD1;
    714710                break;
    715711            case RW_STATE_WORD1:
    716                 count = pit_get_count(pChan);
     712                count = pit_get_count(pDevIns, pThis, pChan);
    717713                ret = (count >> 8) & 0xff;
    718714                pChan->read_state = RW_STATE_WORD0;
     
    773769                {
    774770                    if (!(u32 & 0x20))
    775                         pit_latch_count(pChan);
     771                        pit_latch_count(pDevIns, pThis, pChan);
    776772                    if (!(u32 & 0x10) && !pChan->status_latched)
    777773                    {
    778774                        /* status latch */
    779775                        /* XXX: add BCD and null count */
    780                         PTMTIMER pTimer = pChan->CTX_SUFF(pPit)->channels[0].CTX_SUFF(pTimer);
    781                         pChan->status = (pit_get_out1(pChan, TMTimerGet(pTimer)) << 7)
     776                        pChan->status = (pit_get_out1(pDevIns, pThis, pChan,
     777                                                      PDMDevHlpTimerGet(pDevIns, pThis->channels[0].hTimer)) << 7)
    782778                                      | (pChan->rw_mode << 4)
    783779                                      | (pChan->mode << 1)
     
    796792            {
    797793                DEVPIT_LOCK_BOTH_RETURN(pDevIns, pThis, VINF_IOM_R3_IOPORT_WRITE);
    798                 pit_latch_count(pChan);
     794                pit_latch_count(pDevIns, pThis, pChan);
    799795                DEVPIT_UNLOCK_BOTH(pDevIns, pThis);
    800796            }
     
    830826            default:
    831827            case RW_STATE_LSB:
    832                 pit_load_count(pChan, u32);
     828                pit_load_count(pDevIns, pThis, pChan, u32);
    833829                break;
    834830            case RW_STATE_MSB:
    835                 pit_load_count(pChan, u32 << 8);
     831                pit_load_count(pDevIns, pThis, pChan, u32 << 8);
    836832                break;
    837833            case RW_STATE_WORD0:
     
    840836                break;
    841837            case RW_STATE_WORD1:
    842                 pit_load_count(pChan, pChan->write_latch | (u32 << 8));
     838                pit_load_count(pDevIns, pThis, pChan, pChan->write_latch | (u32 << 8));
    843839                pChan->write_state = RW_STATE_WORD0;
    844840                break;
     
    862858        DEVPIT_LOCK_BOTH_RETURN(pDevIns, pThis, VINF_IOM_R3_IOPORT_READ);
    863859
    864         const uint64_t u64Now = TMTimerGet(pThis->channels[0].CTX_SUFF(pTimer));
    865         Assert(TMTimerGetFreq(pThis->channels[0].CTX_SUFF(pTimer)) == 1000000000); /* lazy bird. */
     860        const uint64_t u64Now = PDMDevHlpTimerGet(pDevIns, pThis->channels[0].hTimer);
     861        Assert(PDMDevHlpTimerGetFreq(pDevIns, pThis->channels[0].hTimer) == 1000000000); /* lazy bird. */
    866862
    867863        /* bit 6,7 Parity error stuff. */
    868864        /* bit 5 - mirrors timer 2 output condition. */
    869         const int fOut = pit_get_out(pThis, 2, u64Now);
     865        const int fOut = pit_get_out(pDevIns, pThis, 2, u64Now);
    870866        /* bit 4 - toggled with each (DRAM?) refresh request, every 15.085 u-op Chan.
    871867                   ASSUMES ns timer freq, see assertion above. */
     
    909905
    910906        pThis->speaker_data_on = (u32 >> 1) & 1;
    911         pit_set_gate(pThis, 2, u32 & 1);
     907        pit_set_gate(pDevIns, pThis, 2, u32 & 1);
    912908
    913909        /** @todo r=klaus move this to a (system-specific) driver, which can
     
    10501046        pHlp->pfnSSMPutU64(pSSM, pChan->u64ReloadTS);
    10511047        pHlp->pfnSSMPutS64(pSSM, pChan->next_transition_time);
    1052         if (pChan->CTX_SUFF(pTimer))
    1053             TMR3TimerSave(pChan->CTX_SUFF(pTimer), pSSM);
     1048        if (pChan->hTimer)
     1049            PDMDevHlpTimerSave(pDevIns, pChan->hTimer, pSSM);
    10541050    }
    10551051
     
    11271123        pHlp->pfnSSMGetU64(pSSM, &pChan->u64ReloadTS);
    11281124        pHlp->pfnSSMGetS64(pSSM, &pChan->next_transition_time);
    1129         if (pChan->CTX_SUFF(pTimer))
    1130         {
    1131             TMR3TimerLoad(pChan->CTX_SUFF(pTimer), pSSM);
     1125        if (pChan->hTimer)
     1126        {
     1127            PDMDevHlpTimerLoad(pDevIns, pChan->hTimer, pSSM);
    11321128            LogRel(("PIT: mode=%d count=%#x (%u) - %d.%02d Hz (ch=%d) (restore)\n",
    11331129                    pChan->mode, pChan->count, pChan->count, PIT_FREQ / pChan->count, (PIT_FREQ * 100 / pChan->count) % 100, i));
    11341130            PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_IGNORED);
    1135             TMTimerSetFrequencyHint(pChan->CTX_SUFF(pTimer), PIT_FREQ / pChan->count);
     1131            PDMDevHlpTimerSetFrequencyHint(pDevIns, pChan->hTimer, PIT_FREQ / pChan->count);
    11361132            PDMDevHlpCritSectLeave(pDevIns, &pThis->CritSect);
    11371133        }
     
    11611157static DECLCALLBACK(void) pitTimer(PPDMDEVINS pDevIns, PTMTIMER pTimer, void *pvUser)
    11621158{
    1163     RT_NOREF(pDevIns);
     1159    PPITSTATE   pThis = PDMDEVINS_2_DATA(pDevIns, PPITSTATE);
    11641160    PPITCHANNEL pChan = (PPITCHANNEL)pvUser;
    1165     STAM_PROFILE_ADV_START(&pChan->CTX_SUFF(pPit)->StatPITHandler, a);
     1161    RT_NOREF(pTimer);
     1162    STAM_PROFILE_ADV_START(&pThis->StatPITHandler, a);
    11661163
    11671164    Log(("pitTimer\n"));
    1168     Assert(PDMDevHlpCritSectIsOwner(pDevIns, &PDMDEVINS_2_DATA(pDevIns, PPITSTATE)->CritSect));
    1169     Assert(TMTimerIsLockOwner(pTimer));
    1170 
    1171     pit_irq_timer_update(pChan, pChan->next_transition_time, TMTimerGet(pTimer), true);
    1172 
    1173     STAM_PROFILE_ADV_STOP(&pChan->CTX_SUFF(pPit)->StatPITHandler, a);
     1165    Assert(PDMDevHlpCritSectIsOwner(pDevIns, &pThis->CritSect));
     1166    Assert(PDMDevHlpTimerIsLockOwner(pDevIns, pChan->hTimer));
     1167
     1168    pit_irq_timer_update(pDevIns, pThis, pChan, pChan->next_transition_time, PDMDevHlpTimerGet(pDevIns, pChan->hTimer), true);
     1169
     1170    STAM_PROFILE_ADV_STOP(&pThis->StatPITHandler, a);
    11741171}
    11751172
     
    12521249
    12531250/**
    1254  * @interface_method_impl{PDMDEVREG,pfnRelocate}
    1255  */
    1256 static DECLCALLBACK(void) pitRelocate(PPDMDEVINS pDevIns, RTGCINTPTR offDelta)
    1257 {
    1258     RT_NOREF(offDelta);
    1259     PPITSTATE pThis = PDMDEVINS_2_DATA(pDevIns, PPITSTATE);
    1260     LogFlow(("pitRelocate: \n"));
    1261 
    1262     for (unsigned i = 0; i < RT_ELEMENTS(pThis->channels); i++)
    1263     {
    1264         PPITCHANNEL pChan = &pThis->channels[i];
    1265         if (pChan->pTimerR3)
    1266             pChan->pTimerRC = TMTimerRCPtr(pChan->pTimerR3);
    1267         pThis->channels[i].pPitRC = PDMINS_2_DATA_RCPTR(pDevIns);
    1268     }
    1269 }
    1270 
    1271 
    1272 /**
    12731251 * @interface_method_impl{PDMDEVREG,pfnReset}
    12741252 */
     
    13011279        pChan->mode = 3;
    13021280        pChan->gate = (i != 2);
    1303         pit_load_count(pChan, 0);
     1281        pit_load_count(pDevIns, pThis, pChan, 0);
    13041282    }
    13051283
     
    14171395    for (i = 0; i < RT_ELEMENTS(pThis->channels); i++)
    14181396    {
    1419         pThis->channels[i].pPitR3 = pThis;
    1420         pThis->channels[i].pPitR0 = PDMINS_2_DATA_R0PTR(pDevIns);
    1421         pThis->channels[i].pPitRC = PDMINS_2_DATA_RCPTR(pDevIns);
     1397        pThis->channels[i].hTimer = NIL_TMTIMERHANDLE;
     1398        pThis->channels[i].iChan  = i;
    14221399    }
    14231400
     
    14421419     * Create the timer, make it take our critsect.
    14431420     */
    1444     rc = PDMDevHlpTMTimerCreate(pDevIns, TMCLOCK_VIRTUAL_SYNC, pitTimer, &pThis->channels[0],
    1445                                 TMTIMER_FLAGS_NO_CRIT_SECT, "i8254 Programmable Interval Timer",
    1446                                 &pThis->channels[0].pTimerR3);
    1447     if (RT_FAILURE(rc))
    1448         return rc;
    1449     pThis->channels[0].pTimerRC = TMTimerRCPtr(pThis->channels[0].pTimerR3);
    1450     pThis->channels[0].pTimerR0 = TMTimerR0Ptr(pThis->channels[0].pTimerR3);
    1451     rc = TMR3TimerSetCritSect(pThis->channels[0].pTimerR3, &pThis->CritSect);
     1421    rc = PDMDevHlpTimerCreate(pDevIns, TMCLOCK_VIRTUAL_SYNC, pitTimer, &pThis->channels[0],
     1422                              TMTIMER_FLAGS_NO_CRIT_SECT, "i8254 Programmable Interval Timer", &pThis->channels[0].hTimer);
     1423    AssertRCReturn(rc, rc);
     1424    rc = PDMDevHlpTimerSetCritSect(pDevIns, pThis->channels[0].hTimer, &pThis->CritSect);
    14521425    AssertRCReturn(rc, rc);
    14531426
     
    15321505    /* .pfnConstruct = */           pitConstruct,
    15331506    /* .pfnDestruct = */            NULL,
    1534     /* .pfnRelocate = */            pitRelocate,
     1507    /* .pfnRelocate = */            NULL,
    15351508    /* .pfnMemSetup = */            NULL,
    15361509    /* .pfnPowerOn = */             NULL,
Note: See TracChangeset for help on using the changeset viewer.

© 2025 Oracle Support Privacy / Do Not Sell My Info Terms of Use Trademark Policy Automated Access Etiquette