Changeset 81900 in vbox
- Timestamp:
- Nov 16, 2019 8:10:15 PM (5 years ago)
- svn:sync-xref-src-repo-rev:
- 134695
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/Devices/PC/DevPit-i8254.cpp
r81898 r81900 124 124 #define DEVPIT_LOCK_BOTH_RETURN(a_pDevIns, a_pThis, a_rcBusy) \ 125 125 do { \ 126 int rcLock = TMTimerLock((a_pThis)->channels[0].CTX_SUFF(pTimer), (a_rcBusy)); \126 int rcLock = PDMDevHlpTimerLock((a_pDevIns), (a_pThis)->channels[0].hTimer, (a_rcBusy)); \ 127 127 if (rcLock != VINF_SUCCESS) \ 128 128 return rcLock; \ … … 130 130 if (rcLock != VINF_SUCCESS) \ 131 131 { \ 132 TMTimerUnlock((a_pThis)->channels[0].CTX_SUFF(pTimer)); \132 PDMDevHlpTimerUnlock((a_pDevIns), (a_pThis)->channels[0].hTimer); \ 133 133 return rcLock; \ 134 134 } \ … … 141 141 # define DEVPIT_R3_LOCK_BOTH(a_pDevIns, a_pThis) \ 142 142 do { \ 143 TMTimerLock((a_pThis)->channels[0].CTX_SUFF(pTimer), VERR_IGNORED); \143 PDMDevHlpTimerLock((a_pDevIns), (a_pThis)->channels[0].hTimer, VERR_IGNORED); \ 144 144 PDMDevHlpCritSectEnter((a_pDevIns), &(a_pThis)->CritSect, VERR_IGNORED); \ 145 145 } while (0) … … 152 152 do { \ 153 153 PDMDevHlpCritSectLeave((a_pDevIns), &(a_pThis)->CritSect); \ 154 TMTimerUnlock((a_pThis)->channels[0].CTX_SUFF(pTimer)); \154 PDMDevHlpTimerUnlock((a_pDevIns), (a_pThis)->channels[0].hTimer); \ 155 155 } while (0) 156 156 … … 165 165 typedef struct PITCHANNEL 166 166 { 167 /** Pointer to the instance data - R3 Ptr. */ 168 R3PTRTYPE(struct PITSTATE *) pPitR3; 169 /** The timer - R3 Ptr. 167 /** The timer. 170 168 * @note Only channel 0 has a timer. */ 171 PTMTIMERR3 pTimerR3; 172 /** Pointer to the instance data - R0 Ptr. */ 173 R0PTRTYPE(struct PITSTATE *) pPitR0; 174 /** The timer - R0 Ptr. 175 * @note Only channel 0 has a timer. */ 176 PTMTIMERR0 pTimerR0; 177 /** Pointer to the instance data - RC Ptr. */ 178 RCPTRTYPE(struct PITSTATE *) pPitRC; 179 /** The timer - RC Ptr. 180 * @note Only channel 0 has a timer. */ 181 PTMTIMERRC pTimerRC; 182 /** The virtual time stamp at the last reload. (only used in mode 2 for now) */ 169 TMTIMERHANDLE hTimer; 170 /** The virtual time stamp at the last reload (only used in mode 2 for now). */ 183 171 uint64_t u64ReloadTS; 184 172 /** The actual time of the next tick. … … 186 174 uint64_t u64NextTS; 187 175 188 /** (count_load_time is only set by TMTimerGet() which returns uint64_t) */176 /** (count_load_time is only set by PDMDevHlpTimerGet() which returns uint64_t) */ 189 177 uint64_t count_load_time; 190 178 /* irq handling */ … … 192 180 int32_t irq; 193 181 /** Number of release log entries. Used to prevent flooding. */ 194 uint32_t cRelLogEntries; 182 uint8_t cRelLogEntries; 183 /** The channel number. */ 184 uint8_t iChan; 185 uint8_t abAlignment[2]; 195 186 196 187 uint32_t count; /* can be 65536 */ … … 272 263 *********************************************************************************************************************************/ 273 264 #ifdef IN_RING3 274 static void pit_irq_timer_update(PPITCHANNEL pChan, uint64_t current_time, uint64_t now, bool in_timer); 265 static void pit_irq_timer_update(PPDMDEVINS pDevIns, PPITSTATE pThis, PPITCHANNEL pChan, 266 uint64_t current_time, uint64_t now, bool in_timer); 275 267 #endif 276 268 … … 319 311 #endif /* IN_RING3 */ 320 312 321 static int pit_get_count(PP ITCHANNEL pChan)313 static int pit_get_count(PPDMDEVINS pDevIns, PPITSTATE pThis, PPITCHANNEL pChan) 322 314 { 323 315 uint64_t d; 324 PTMTIMER pTimer = pChan->CTX_SUFF(pPit)->channels[0].CTX_SUFF(pTimer);325 Assert( TMTimerIsLockOwner(pTimer));316 TMTIMERHANDLE hTimer = pThis->channels[0].hTimer; 317 Assert(PDMDevHlpTimerIsLockOwner(pDevIns, hTimer)); 326 318 327 319 if (EFFECTIVE_MODE(pChan->mode) == 2) … … 329 321 if (pChan->u64NextTS == UINT64_MAX) 330 322 { 331 d = ASMMultU64ByU32DivByU32(TMTimerGet(pTimer) - pChan->count_load_time, PIT_FREQ, TMTimerGetFreq(pTimer)); 323 d = ASMMultU64ByU32DivByU32(PDMDevHlpTimerGet(pDevIns, hTimer) - pChan->count_load_time, 324 PIT_FREQ, PDMDevHlpTimerGetFreq(pDevIns, hTimer)); 332 325 return pChan->count - (d % pChan->count); /** @todo check this value. */ 333 326 } … … 335 328 if (!Interval) 336 329 return pChan->count - 1; /** @todo This is WRONG! But I'm too tired to fix it properly and just want to shut up a DIV/0 trap now. */ 337 d = TMTimerGet(pTimer);330 d = PDMDevHlpTimerGet(pDevIns, hTimer); 338 331 d = ASMMultU64ByU32DivByU32(d - pChan->u64ReloadTS, pChan->count, Interval); 339 332 if (d >= pChan->count) … … 342 335 } 343 336 344 d = ASMMultU64ByU32DivByU32(TMTimerGet(pTimer) - pChan->count_load_time, PIT_FREQ, TMTimerGetFreq(pTimer)); 337 d = ASMMultU64ByU32DivByU32(PDMDevHlpTimerGet(pDevIns, hTimer) - pChan->count_load_time, 338 PIT_FREQ, PDMDevHlpTimerGetFreq(pDevIns, hTimer)); 345 339 int counter; 346 340 switch (EFFECTIVE_MODE(pChan->mode)) … … 365 359 366 360 /* get pit output bit */ 367 static int pit_get_out1(PP ITCHANNEL pChan, int64_t current_time)368 { 369 PTMTIMER pTimer = pChan->CTX_SUFF(pPit)->channels[0].CTX_SUFF(pTimer);361 static int pit_get_out1(PPDMDEVINS pDevIns, PPITSTATE pThis, PPITCHANNEL pChan, int64_t current_time) 362 { 363 TMTIMERHANDLE hTimer = pThis->channels[0].hTimer; 370 364 uint64_t d; 371 365 int out; 372 366 373 d = ASMMultU64ByU32DivByU32(current_time - pChan->count_load_time, PIT_FREQ, TMTimerGetFreq(pTimer));367 d = ASMMultU64ByU32DivByU32(current_time - pChan->count_load_time, PIT_FREQ, PDMDevHlpTimerGetFreq(pDevIns, hTimer)); 374 368 switch (EFFECTIVE_MODE(pChan->mode)) 375 369 { … … 400 394 401 395 402 static int pit_get_out(PP ITSTATE pThis, int channel, int64_t current_time)396 static int pit_get_out(PPDMDEVINS pDevIns, PPITSTATE pThis, int channel, int64_t current_time) 403 397 { 404 398 PPITCHANNEL pChan = &pThis->channels[channel]; 405 return pit_get_out1(p Chan, current_time);399 return pit_get_out1(pDevIns, pThis, pChan, current_time); 406 400 } 407 401 … … 415 409 416 410 /* if already latched, do not latch again */ 417 static void pit_latch_count(PP ITCHANNEL pChan)411 static void pit_latch_count(PPDMDEVINS pDevIns, PPITSTATE pThis, PPITCHANNEL pChan) 418 412 { 419 413 if (!pChan->count_latched) 420 414 { 421 pChan->latched_count = pit_get_count(p Chan);415 pChan->latched_count = pit_get_count(pDevIns, pThis, pChan); 422 416 pChan->count_latched = pChan->rw_mode; 423 417 LogFlow(("pit_latch_count: latched_count=%#06x / %10RU64 ns (c=%#06x m=%d)\n", … … 430 424 431 425 /* val must be 0 or 1 */ 432 static void pit_set_gate(PP ITSTATE pThis, int channel, int val)433 { 434 PPITCHANNEL pChan = &pThis->channels[channel];435 PTMTIMER pTimer = pChan->CTX_SUFF(pPit)->channels[0].CTX_SUFF(pTimer);426 static void pit_set_gate(PPDMDEVINS pDevIns, PPITSTATE pThis, int channel, int val) 427 { 428 PPITCHANNEL pChan = &pThis->channels[channel]; 429 TMTIMERHANDLE hTimer = pThis->channels[0].hTimer; 436 430 437 431 Assert((val & 1) == val); 438 Assert( TMTimerIsLockOwner(pTimer));432 Assert(PDMDevHlpTimerIsLockOwner(pDevIns, hTimer)); 439 433 440 434 switch (EFFECTIVE_MODE(pChan->mode)) … … 451 445 /* restart counting on rising edge */ 452 446 Log(("pit_set_gate: restarting mode %d\n", pChan->mode)); 453 pChan->count_load_time = TMTimerGet(pTimer);454 pit_irq_timer_update(p Chan, pChan->count_load_time, pChan->count_load_time, false);447 pChan->count_load_time = PDMDevHlpTimerGet(pDevIns, hTimer); 448 pit_irq_timer_update(pDevIns, pThis, pChan, pChan->count_load_time, pChan->count_load_time, false); 455 449 } 456 450 break; … … 461 455 /* restart counting on rising edge */ 462 456 Log(("pit_set_gate: restarting mode %d\n", pChan->mode)); 463 pChan->count_load_time = pChan->u64ReloadTS = TMTimerGet(pTimer);464 pit_irq_timer_update(p Chan, pChan->count_load_time, pChan->count_load_time, false);457 pChan->count_load_time = pChan->u64ReloadTS = PDMDevHlpTimerGet(pDevIns, hTimer); 458 pit_irq_timer_update(pDevIns, pThis, pChan, pChan->count_load_time, pChan->count_load_time, false); 465 459 } 466 460 /* XXX: disable/enable counting */ … … 470 464 } 471 465 472 static void pit_load_count(PP ITCHANNEL pChan, int val)473 { 474 PTMTIMER pTimer = pChan->CTX_SUFF(pPit)->channels[0].CTX_SUFF(pTimer);475 Assert( TMTimerIsLockOwner(pTimer));466 static void pit_load_count(PPDMDEVINS pDevIns, PPITSTATE pThis, PPITCHANNEL pChan, int val) 467 { 468 TMTIMERHANDLE hTimer = pThis->channels[0].hTimer; 469 Assert(PDMDevHlpTimerIsLockOwner(pDevIns, hTimer)); 476 470 477 471 if (val == 0) 478 472 val = 0x10000; 479 pChan->count_load_time = pChan->u64ReloadTS = TMTimerGet(pTimer);473 pChan->count_load_time = pChan->u64ReloadTS = PDMDevHlpTimerGet(pDevIns, hTimer); 480 474 pChan->count = val; 481 pit_irq_timer_update(p Chan, pChan->count_load_time, pChan->count_load_time, false);475 pit_irq_timer_update(pDevIns, pThis, pChan, pChan->count_load_time, pChan->count_load_time, false); 482 476 483 477 /* log the new rate (ch 0 only). */ 484 if (pChan->pTimerR3 /* ch 0 */) 485 { 486 if (pChan->cRelLogEntries++ < 32) 478 if (pChan->hTimer != NIL_TMTIMERHANDLE /* ch 0 */) 479 { 480 if (pChan->cRelLogEntries < 32) 481 { 482 pChan->cRelLogEntries++; 487 483 LogRel(("PIT: mode=%d count=%#x (%u) - %d.%02d Hz (ch=0)\n", 488 484 pChan->mode, pChan->count, pChan->count, PIT_FREQ / pChan->count, (PIT_FREQ * 100 / pChan->count) % 100)); 485 } 489 486 else 490 487 Log(("PIT: mode=%d count=%#x (%u) - %d.%02d Hz (ch=0)\n", 491 488 pChan->mode, pChan->count, pChan->count, PIT_FREQ / pChan->count, (PIT_FREQ * 100 / pChan->count) % 100)); 492 TMTimerSetFrequencyHint(pChan->CTX_SUFF(pTimer), PIT_FREQ / pChan->count);489 PDMDevHlpTimerSetFrequencyHint(pDevIns, hTimer, PIT_FREQ / pChan->count); 493 490 } 494 491 else 495 492 Log(("PIT: mode=%d count=%#x (%u) - %d.%02d Hz (ch=%d)\n", 496 493 pChan->mode, pChan->count, pChan->count, PIT_FREQ / pChan->count, (PIT_FREQ * 100 / pChan->count) % 100, 497 pChan - &p Chan->CTX_SUFF(pPit)->channels[0]));494 pChan - &pThis->channels[0])); 498 495 } 499 496 500 497 /* return -1 if no transition will occur. */ 501 static int64_t pit_get_next_transition_time(PP ITCHANNEL pChan, uint64_t current_time)502 { 503 PTMTIMER pTimer = pChan->CTX_SUFF(pPit)->channels[0].CTX_SUFF(pTimer);498 static int64_t pit_get_next_transition_time(PPDMDEVINS pDevIns, PPITSTATE pThis, PPITCHANNEL pChan, uint64_t current_time) 499 { 500 TMTIMERHANDLE hTimer = pThis->channels[0].hTimer; 504 501 uint64_t d, next_time, base; 505 502 uint32_t period2; 506 503 507 d = ASMMultU64ByU32DivByU32(current_time - pChan->count_load_time, PIT_FREQ, TMTimerGetFreq(pTimer));508 switch (EFFECTIVE_MODE(pChan->mode))504 d = ASMMultU64ByU32DivByU32(current_time - pChan->count_load_time, PIT_FREQ, PDMDevHlpTimerGetFreq(pDevIns, hTimer)); 505 switch (EFFECTIVE_MODE(pChan->mode)) 509 506 { 510 507 default: … … 568 565 /* convert to timer units */ 569 566 LogFlow(("PIT: next_time=%'14RU64 %'20RU64 mode=%#x count=%#06x\n", next_time, 570 ASMMultU64ByU32DivByU32(next_time, TMTimerGetFreq(pTimer), PIT_FREQ), pChan->mode, pChan->count));571 next_time = pChan->count_load_time + ASMMultU64ByU32DivByU32(next_time, TMTimerGetFreq(pTimer), PIT_FREQ);567 ASMMultU64ByU32DivByU32(next_time, PDMDevHlpTimerGetFreq(pDevIns, hTimer), PIT_FREQ), pChan->mode, pChan->count)); 568 next_time = pChan->count_load_time + ASMMultU64ByU32DivByU32(next_time, PDMDevHlpTimerGetFreq(pDevIns, hTimer), PIT_FREQ); 572 569 573 570 /* fix potential rounding problems */ … … 582 579 } 583 580 584 static void pit_irq_timer_update(PPITCHANNEL pChan, uint64_t current_time, uint64_t now, bool in_timer) 581 static void pit_irq_timer_update(PPDMDEVINS pDevIns, PPITSTATE pThis, PPITCHANNEL pChan, 582 uint64_t current_time, uint64_t now, bool in_timer) 585 583 { 586 584 int64_t expire_time; 587 585 int irq_level; 588 Assert( TMTimerIsLockOwner(pChan->CTX_SUFF(pPit)->channels[0].CTX_SUFF(pTimer)));589 590 if ( !pChan->CTX_SUFF(pTimer))586 Assert(PDMDevHlpTimerIsLockOwner(pDevIns, pThis->channels[0].hTimer)); 587 588 if (pChan->hTimer == NIL_TMTIMERHANDLE) 591 589 return; 592 expire_time = pit_get_next_transition_time(p Chan, current_time);593 irq_level = pit_get_out1(p Chan, current_time) ? PDM_IRQ_LEVEL_HIGH : PDM_IRQ_LEVEL_LOW;590 expire_time = pit_get_next_transition_time(pDevIns, pThis, pChan, current_time); 591 irq_level = pit_get_out1(pDevIns, pThis, pChan, current_time) ? PDM_IRQ_LEVEL_HIGH : PDM_IRQ_LEVEL_LOW; 594 592 595 593 /* If PIT is disabled by HPET - simply disconnect ticks from interrupt controllers, 596 594 * but do not modify other aspects of device operation. 597 595 */ 598 if (!pChan->pPitR3->fDisabledByHpet) 599 { 600 PPDMDEVINS pDevIns = pChan->CTX_SUFF(pPit)->pDevIns; 601 596 if (!pThis->fDisabledByHpet) 597 { 602 598 switch (EFFECTIVE_MODE(pChan->mode)) 603 599 { … … 625 621 { 626 622 pChan->u64ReloadTS = now; 627 STAM_COUNTER_INC(&p Chan->CTX_SUFF(pPit)->StatPITIrq);623 STAM_COUNTER_INC(&pThis->StatPITIrq); 628 624 } 629 625 … … 632 628 Log3(("pit_irq_timer_update: next=%'RU64 now=%'RU64\n", expire_time, now)); 633 629 pChan->u64NextTS = expire_time; 634 TMTimerSet(pChan->CTX_SUFF(pTimer), pChan->u64NextTS);630 PDMDevHlpTimerSet(pDevIns, pChan->hTimer, pChan->u64NextTS); 635 631 } 636 632 else 637 633 { 638 634 LogFlow(("PIT: m=%d count=%#4x irq_level=%#x stopped\n", pChan->mode, pChan->count, irq_level)); 639 TMTimerStop(pChan->CTX_SUFF(pTimer));635 PDMDevHlpTimerStop(pDevIns, pChan->hTimer); 640 636 pChan->u64NextTS = UINT64_MAX; 641 637 } … … 701 697 default: 702 698 case RW_STATE_LSB: 703 count = pit_get_count(p Chan);699 count = pit_get_count(pDevIns, pThis, pChan); 704 700 ret = count & 0xff; 705 701 break; 706 702 case RW_STATE_MSB: 707 count = pit_get_count(p Chan);703 count = pit_get_count(pDevIns, pThis, pChan); 708 704 ret = (count >> 8) & 0xff; 709 705 break; 710 706 case RW_STATE_WORD0: 711 count = pit_get_count(p Chan);707 count = pit_get_count(pDevIns, pThis, pChan); 712 708 ret = count & 0xff; 713 709 pChan->read_state = RW_STATE_WORD1; 714 710 break; 715 711 case RW_STATE_WORD1: 716 count = pit_get_count(p Chan);712 count = pit_get_count(pDevIns, pThis, pChan); 717 713 ret = (count >> 8) & 0xff; 718 714 pChan->read_state = RW_STATE_WORD0; … … 773 769 { 774 770 if (!(u32 & 0x20)) 775 pit_latch_count(p Chan);771 pit_latch_count(pDevIns, pThis, pChan); 776 772 if (!(u32 & 0x10) && !pChan->status_latched) 777 773 { 778 774 /* status latch */ 779 775 /* XXX: add BCD and null count */ 780 PTMTIMER pTimer = pChan->CTX_SUFF(pPit)->channels[0].CTX_SUFF(pTimer);781 pChan->status = (pit_get_out1(pChan, TMTimerGet(pTimer)) << 7)776 pChan->status = (pit_get_out1(pDevIns, pThis, pChan, 777 PDMDevHlpTimerGet(pDevIns, pThis->channels[0].hTimer)) << 7) 782 778 | (pChan->rw_mode << 4) 783 779 | (pChan->mode << 1) … … 796 792 { 797 793 DEVPIT_LOCK_BOTH_RETURN(pDevIns, pThis, VINF_IOM_R3_IOPORT_WRITE); 798 pit_latch_count(p Chan);794 pit_latch_count(pDevIns, pThis, pChan); 799 795 DEVPIT_UNLOCK_BOTH(pDevIns, pThis); 800 796 } … … 830 826 default: 831 827 case RW_STATE_LSB: 832 pit_load_count(p Chan, u32);828 pit_load_count(pDevIns, pThis, pChan, u32); 833 829 break; 834 830 case RW_STATE_MSB: 835 pit_load_count(p Chan, u32 << 8);831 pit_load_count(pDevIns, pThis, pChan, u32 << 8); 836 832 break; 837 833 case RW_STATE_WORD0: … … 840 836 break; 841 837 case RW_STATE_WORD1: 842 pit_load_count(p Chan, pChan->write_latch | (u32 << 8));838 pit_load_count(pDevIns, pThis, pChan, pChan->write_latch | (u32 << 8)); 843 839 pChan->write_state = RW_STATE_WORD0; 844 840 break; … … 862 858 DEVPIT_LOCK_BOTH_RETURN(pDevIns, pThis, VINF_IOM_R3_IOPORT_READ); 863 859 864 const uint64_t u64Now = TMTimerGet(pThis->channels[0].CTX_SUFF(pTimer));865 Assert( TMTimerGetFreq(pThis->channels[0].CTX_SUFF(pTimer)) == 1000000000); /* lazy bird. */860 const uint64_t u64Now = PDMDevHlpTimerGet(pDevIns, pThis->channels[0].hTimer); 861 Assert(PDMDevHlpTimerGetFreq(pDevIns, pThis->channels[0].hTimer) == 1000000000); /* lazy bird. */ 866 862 867 863 /* bit 6,7 Parity error stuff. */ 868 864 /* bit 5 - mirrors timer 2 output condition. */ 869 const int fOut = pit_get_out(p This, 2, u64Now);865 const int fOut = pit_get_out(pDevIns, pThis, 2, u64Now); 870 866 /* bit 4 - toggled with each (DRAM?) refresh request, every 15.085 u-op Chan. 871 867 ASSUMES ns timer freq, see assertion above. */ … … 909 905 910 906 pThis->speaker_data_on = (u32 >> 1) & 1; 911 pit_set_gate(p This, 2, u32 & 1);907 pit_set_gate(pDevIns, pThis, 2, u32 & 1); 912 908 913 909 /** @todo r=klaus move this to a (system-specific) driver, which can … … 1050 1046 pHlp->pfnSSMPutU64(pSSM, pChan->u64ReloadTS); 1051 1047 pHlp->pfnSSMPutS64(pSSM, pChan->next_transition_time); 1052 if (pChan-> CTX_SUFF(pTimer))1053 TMR3TimerSave(pChan->CTX_SUFF(pTimer), pSSM);1048 if (pChan->hTimer) 1049 PDMDevHlpTimerSave(pDevIns, pChan->hTimer, pSSM); 1054 1050 } 1055 1051 … … 1127 1123 pHlp->pfnSSMGetU64(pSSM, &pChan->u64ReloadTS); 1128 1124 pHlp->pfnSSMGetS64(pSSM, &pChan->next_transition_time); 1129 if (pChan-> CTX_SUFF(pTimer))1130 { 1131 TMR3TimerLoad(pChan->CTX_SUFF(pTimer), pSSM);1125 if (pChan->hTimer) 1126 { 1127 PDMDevHlpTimerLoad(pDevIns, pChan->hTimer, pSSM); 1132 1128 LogRel(("PIT: mode=%d count=%#x (%u) - %d.%02d Hz (ch=%d) (restore)\n", 1133 1129 pChan->mode, pChan->count, pChan->count, PIT_FREQ / pChan->count, (PIT_FREQ * 100 / pChan->count) % 100, i)); 1134 1130 PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_IGNORED); 1135 TMTimerSetFrequencyHint(pChan->CTX_SUFF(pTimer), PIT_FREQ / pChan->count);1131 PDMDevHlpTimerSetFrequencyHint(pDevIns, pChan->hTimer, PIT_FREQ / pChan->count); 1136 1132 PDMDevHlpCritSectLeave(pDevIns, &pThis->CritSect); 1137 1133 } … … 1161 1157 static DECLCALLBACK(void) pitTimer(PPDMDEVINS pDevIns, PTMTIMER pTimer, void *pvUser) 1162 1158 { 1163 RT_NOREF(pDevIns);1159 PPITSTATE pThis = PDMDEVINS_2_DATA(pDevIns, PPITSTATE); 1164 1160 PPITCHANNEL pChan = (PPITCHANNEL)pvUser; 1165 STAM_PROFILE_ADV_START(&pChan->CTX_SUFF(pPit)->StatPITHandler, a); 1161 RT_NOREF(pTimer); 1162 STAM_PROFILE_ADV_START(&pThis->StatPITHandler, a); 1166 1163 1167 1164 Log(("pitTimer\n")); 1168 Assert(PDMDevHlpCritSectIsOwner(pDevIns, & PDMDEVINS_2_DATA(pDevIns, PPITSTATE)->CritSect));1169 Assert( TMTimerIsLockOwner(pTimer));1170 1171 pit_irq_timer_update(p Chan, pChan->next_transition_time, TMTimerGet(pTimer), true);1172 1173 STAM_PROFILE_ADV_STOP(&p Chan->CTX_SUFF(pPit)->StatPITHandler, a);1165 Assert(PDMDevHlpCritSectIsOwner(pDevIns, &pThis->CritSect)); 1166 Assert(PDMDevHlpTimerIsLockOwner(pDevIns, pChan->hTimer)); 1167 1168 pit_irq_timer_update(pDevIns, pThis, pChan, pChan->next_transition_time, PDMDevHlpTimerGet(pDevIns, pChan->hTimer), true); 1169 1170 STAM_PROFILE_ADV_STOP(&pThis->StatPITHandler, a); 1174 1171 } 1175 1172 … … 1252 1249 1253 1250 /** 1254 * @interface_method_impl{PDMDEVREG,pfnRelocate}1255 */1256 static DECLCALLBACK(void) pitRelocate(PPDMDEVINS pDevIns, RTGCINTPTR offDelta)1257 {1258 RT_NOREF(offDelta);1259 PPITSTATE pThis = PDMDEVINS_2_DATA(pDevIns, PPITSTATE);1260 LogFlow(("pitRelocate: \n"));1261 1262 for (unsigned i = 0; i < RT_ELEMENTS(pThis->channels); i++)1263 {1264 PPITCHANNEL pChan = &pThis->channels[i];1265 if (pChan->pTimerR3)1266 pChan->pTimerRC = TMTimerRCPtr(pChan->pTimerR3);1267 pThis->channels[i].pPitRC = PDMINS_2_DATA_RCPTR(pDevIns);1268 }1269 }1270 1271 1272 /**1273 1251 * @interface_method_impl{PDMDEVREG,pfnReset} 1274 1252 */ … … 1301 1279 pChan->mode = 3; 1302 1280 pChan->gate = (i != 2); 1303 pit_load_count(p Chan, 0);1281 pit_load_count(pDevIns, pThis, pChan, 0); 1304 1282 } 1305 1283 … … 1417 1395 for (i = 0; i < RT_ELEMENTS(pThis->channels); i++) 1418 1396 { 1419 pThis->channels[i].pPitR3 = pThis; 1420 pThis->channels[i].pPitR0 = PDMINS_2_DATA_R0PTR(pDevIns); 1421 pThis->channels[i].pPitRC = PDMINS_2_DATA_RCPTR(pDevIns); 1397 pThis->channels[i].hTimer = NIL_TMTIMERHANDLE; 1398 pThis->channels[i].iChan = i; 1422 1399 } 1423 1400 … … 1442 1419 * Create the timer, make it take our critsect. 1443 1420 */ 1444 rc = PDMDevHlpTMTimerCreate(pDevIns, TMCLOCK_VIRTUAL_SYNC, pitTimer, &pThis->channels[0], 1445 TMTIMER_FLAGS_NO_CRIT_SECT, "i8254 Programmable Interval Timer", 1446 &pThis->channels[0].pTimerR3); 1447 if (RT_FAILURE(rc)) 1448 return rc; 1449 pThis->channels[0].pTimerRC = TMTimerRCPtr(pThis->channels[0].pTimerR3); 1450 pThis->channels[0].pTimerR0 = TMTimerR0Ptr(pThis->channels[0].pTimerR3); 1451 rc = TMR3TimerSetCritSect(pThis->channels[0].pTimerR3, &pThis->CritSect); 1421 rc = PDMDevHlpTimerCreate(pDevIns, TMCLOCK_VIRTUAL_SYNC, pitTimer, &pThis->channels[0], 1422 TMTIMER_FLAGS_NO_CRIT_SECT, "i8254 Programmable Interval Timer", &pThis->channels[0].hTimer); 1423 AssertRCReturn(rc, rc); 1424 rc = PDMDevHlpTimerSetCritSect(pDevIns, pThis->channels[0].hTimer, &pThis->CritSect); 1452 1425 AssertRCReturn(rc, rc); 1453 1426 … … 1532 1505 /* .pfnConstruct = */ pitConstruct, 1533 1506 /* .pfnDestruct = */ NULL, 1534 /* .pfnRelocate = */ pitRelocate,1507 /* .pfnRelocate = */ NULL, 1535 1508 /* .pfnMemSetup = */ NULL, 1536 1509 /* .pfnPowerOn = */ NULL,
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