Changeset 81933 in vbox

Timestamp:

Nov 18, 2019 8:52:53 AM (5 years ago)

Author:

vboxsync

Message:

DevLpc-new: Converted to new PDM device style. bugref:9218

File:

• trunk/src/VBox/Devices/PC/DevLpc-new.cpp (modified) (10 diffs)

trunk/src/VBox/Devices/PC/DevLpc-new.cpp

@@ -46 +46 @@
 typedef struct LPCSTATE
 {
-    /** Pointer to the ring-3 device instance. */
-    PPDMDEVINSR3    pDevInsR3;
-
     /** The root complex base address. */
     RTGCPHYS32      GCPhys32Rcba;
-    /** Set if R0/RC context is enabled.   */
-    bool            fRZEnabled;
     /** The ICH version (7 or 9). */
     uint8_t         uIchVersion;
     /** Explicit padding. */
-    uint8_t         abPadding[HC_ARCH_BITS == 32 ? 2 : 6];
+    uint8_t         abPadding[HC_ARCH_BITS == 32 ? 3 : 7];
 
     /** Number of MMIO reads. */
@@ -66 +61 @@
     /** Number of PCI config space writes. */
     STAMCOUNTER     StatPciCfgWrites;
+
+    /** Handle to the MMIO region. */
+    IOMMMIOHANDLE   hMmio;
 } LPCSTATE;
 /** Pointer to the LPC state. */
@@ -74 +72 @@
 
 /**
- * @callback_method_impl{FNIOMMMIOREAD}
- */
-PDMBOTHCBDECL(int) lpcMmioRead(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void *pv, unsigned cb)
+ * @callback_method_impl{FNIOMMMIONEWREAD}
+ */
+static DECLCALLBACK(VBOXSTRICTRC) lpcMmioRead(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS off, void *pv, unsigned cb)
 {
     RT_NOREF(pvUser, cb);
     PLPCSTATE        pThis  = PDMDEVINS_2_DATA(pDevIns, PLPCSTATE);
-    RTGCPHYS32 const offReg = (RTGCPHYS32)GCPhysAddr - pThis->GCPhys32Rcba;
-    Assert(cb == 4); Assert(!(GCPhysAddr & 3)); /* IOMMMIO_FLAGS_READ_DWORD should make sure of this */
+    Assert(cb == 4); Assert(!(off & 3)); /* IOMMMIO_FLAGS_READ_DWORD should make sure of this */
 
     uint32_t *puValue = (uint32_t *)pv;
-    if (offReg == LPC_REG_HPET_CONFIG_POINTER)
+    if (off == LPC_REG_HPET_CONFIG_POINTER)
     {
         *puValue = 0xf0;
         Log(("lpcMmioRead: HPET_CONFIG_POINTER: %#x\n", *puValue));
     }
-    else if (offReg == LPC_REG_GCS)
+    else if (off == LPC_REG_GCS)
     {
         *puValue = 0;
@@ -97 +94 @@
     {
         *puValue = 0;
-        Log(("lpcMmioRead: WARNING! Unknown register %#x!\n", offReg));
+        Log(("lpcMmioRead: WARNING! Unknown register %#RGp!\n", off));
     }
 
@@ -106 +103 @@
 
 /**
- * @callback_method_impl{FNIOMMMIOWRITE}
- */
-PDMBOTHCBDECL(int) lpcMmioWrite(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void const *pv, unsigned cb)
-{
+ * @callback_method_impl{FNIOMMMIONEWWRITE}
+ */
+static DECLCALLBACK(VBOXSTRICTRC) lpcMmioWrite(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS off, void const *pv, unsigned cb)
+{
+    PLPCSTATE        pThis  = PDMDEVINS_2_DATA(pDevIns, PLPCSTATE);
     RT_NOREF(pvUser, pv);
-    PLPCSTATE        pThis  = PDMDEVINS_2_DATA(pDevIns, PLPCSTATE);
-    RTGCPHYS32 const offReg = (RTGCPHYS32)GCPhysAddr - pThis->GCPhys32Rcba;
 
     if (cb == 4)
     {
-        if (offReg == LPC_REG_GCS)
+        if (off == LPC_REG_GCS)
             Log(("lpcMmioWrite: Ignorning write to GCS: %.*Rhxs\n", cb, pv));
         else
-            Log(("lpcMmioWrite: Ignorning write to unknown register %#x: %.*Rhxs\n", offReg, cb, pv));
+            Log(("lpcMmioWrite: Ignorning write to unknown register %#RGp: %.*Rhxs\n", off, cb, pv));
     }
     else
-        Log(("lpcMmioWrite: WARNING! Ignoring non-DWORD write to offReg=%#x: %.*Rhxs\n", offReg, cb, pv));
+        Log(("lpcMmioWrite: WARNING! Ignoring non-DWORD write to off=%#RGp: %.*Rhxs\n", off, cb, pv));
 
     STAM_REL_COUNTER_INC(&pThis->StatMmioWrites);
@@ -214 +210 @@
 {
     PDMDEV_CHECK_VERSIONS_RETURN(pDevIns);
-    PLPCSTATE pThis = PDMDEVINS_2_DATA(pDevIns, PLPCSTATE);
+    PLPCSTATE       pThis = PDMDEVINS_2_DATA(pDevIns, PLPCSTATE);
+    PCPDMDEVHLPR3   pHlp  = pDevIns->pHlpR3;
     Assert(iInstance == 0); RT_NOREF(iInstance);
-
-    /*
-     * Initialize state.
-     */
-    pThis->pDevInsR3 = pDevIns;
 
     /*
      * Read configuration.
      */
-    PDMDEV_VALIDATE_CONFIG_RETURN(pDevIns, "RZEnabled|RCBA|ICHVersion", "");
-
-    int rc = CFGMR3QueryBoolDef(pCfg, "RZEnabled", &pThis->fRZEnabled, true);
-    if (RT_FAILURE(rc))
-        return PDMDEV_SET_ERROR(pDevIns, rc, N_("Configuration error: Failed to query boolean value \"RZEnabled\""));
-
-    rc = CFGMR3QueryU8Def(pCfg, "ICHVersion", &pThis->uIchVersion, 7 /** @todo 9 */);
+    PDMDEV_VALIDATE_CONFIG_RETURN(pDevIns, "RCBA|ICHVersion", "");
+
+    int rc = pHlp->pfnCFGMQueryU8Def(pCfg, "ICHVersion", &pThis->uIchVersion, 7 /** @todo 9 */);
     if (RT_FAILURE(rc))
         return PDMDEV_SET_ERROR(pDevIns, rc, N_("Configuration error: Failed to query boolean value \"ICHVersion\""));
@@ -238 +226 @@
         return PDMDEV_SET_ERROR(pDevIns, rc, N_("Configuration error: Invalid \"ICHVersion\" value (must be 7 or 9)"));
 
-    rc = CFGMR3QueryU32Def(pCfg, "RCBA", &pThis->GCPhys32Rcba, UINT32_C(0xfed1c000));
+    rc = pHlp->pfnCFGMQueryU32Def(pCfg, "RCBA", &pThis->GCPhys32Rcba, UINT32_C(0xfed1c000));
     if (RT_FAILURE(rc))
         return PDMDEV_SET_ERROR(pDevIns, rc, N_("Configuration error: Failed to query boolean value \"RCBA\""));
@@ -359 +347 @@
     /** @todo This should actually be done when RCBA is enabled, but was
      *        mentioned above we just want this working. */
-    rc = PDMDevHlpMMIORegister(pDevIns, pThis->GCPhys32Rcba, 0x4000, pThis,
-                               IOMMMIO_FLAGS_READ_DWORD | IOMMMIO_FLAGS_WRITE_PASSTHRU,
-                               lpcMmioWrite, lpcMmioRead, "LPC Memory");
+    rc = PDMDevHlpMmioCreateAndMap(pDevIns, pThis->GCPhys32Rcba, 0x4000, lpcMmioWrite, lpcMmioRead,
+                                   IOMMMIO_FLAGS_READ_DWORD | IOMMMIO_FLAGS_WRITE_PASSTHRU,
+                                   "LPC Memory", &pThis->hMmio);
     AssertRCReturn(rc, rc);
 
@@ -368 +356 @@
      * Debug info and stats.
      */
-    PDMDevHlpSTAMRegister(pDevIns, &pThis->StatMmioReads,    STAMTYPE_COUNTER, "/Devices/LPC/MMIOReads", STAMUNIT_OCCURENCES, "MMIO reads");
-    PDMDevHlpSTAMRegister(pDevIns, &pThis->StatMmioWrites,   STAMTYPE_COUNTER, "/Devices/LPC/MMIOWrites", STAMUNIT_OCCURENCES, "MMIO writes");
-    PDMDevHlpSTAMRegister(pDevIns, &pThis->StatPciCfgReads,  STAMTYPE_COUNTER, "/Devices/LPC/ConfigReads", STAMUNIT_OCCURENCES, "PCI config reads");
-    PDMDevHlpSTAMRegister(pDevIns, &pThis->StatPciCfgWrites, STAMTYPE_COUNTER, "/Devices/LPC/ConfigWrites", STAMUNIT_OCCURENCES, "PCI config writes");
+    PDMDevHlpSTAMRegister(pDevIns, &pThis->StatMmioReads,    STAMTYPE_COUNTER, "MMIOReads", STAMUNIT_OCCURENCES, "MMIO reads");
+    PDMDevHlpSTAMRegister(pDevIns, &pThis->StatMmioWrites,   STAMTYPE_COUNTER, "MMIOWrites", STAMUNIT_OCCURENCES, "MMIO writes");
+    PDMDevHlpSTAMRegister(pDevIns, &pThis->StatPciCfgReads,  STAMTYPE_COUNTER, "ConfigReads", STAMUNIT_OCCURENCES, "PCI config reads");
+    PDMDevHlpSTAMRegister(pDevIns, &pThis->StatPciCfgWrites, STAMTYPE_COUNTER, "ConfigWrites", STAMUNIT_OCCURENCES, "PCI config writes");
 
     PDMDevHlpDBGFInfoRegister(pDevIns, "lpc", "Display LPC status. (no arguments)", lpcInfo);
@@ -388 +376 @@
     /* .uReserved0 = */             0,
     /* .szName = */                 "lpc",
-    /* .fFlags = */                 PDM_DEVREG_FLAGS_DEFAULT_BITS,
+    /* .fFlags = */                 PDM_DEVREG_FLAGS_DEFAULT_BITS | PDM_DEVREG_FLAGS_NEW_STYLE,
     /* .fClass = */                 PDM_DEVREG_CLASS_MISC,
     /* .cMaxInstances = */          1,