Changeset 82019 in vbox
- Timestamp:
- Nov 20, 2019 10:36:50 AM (5 years ago)
- File:
-
- 1 edited
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- Added
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trunk/src/VBox/Devices/PC/DevACPI.cpp
r82014 r82019 283 283 * The ACPI device state. 284 284 */ 285 typedef struct ACPIS tate285 typedef struct ACPISTATE 286 286 { 287 287 /** Critical section protecting the ACPI state. */ … … 511 511 /** @} */ 512 512 513 } ACPIS tate, ACPISTATE;513 } ACPISTATE; 514 514 /** Pointer to the shared ACPI device state. */ 515 515 typedef ACPISTATE *PACPISTATE; … … 801 801 *********************************************************************************************************************************/ 802 802 #ifdef IN_RING3 803 static int acpiR3PlantTables(PPDMDEVINS pDevIns, ACPIState *pThis);803 static int acpiR3PlantTables(PPDMDEVINS pDevIns, PACPISTATE pThis); 804 804 #endif 805 805 … … 810 810 } 811 811 812 DECLINLINE(bool) pm1a_level( ACPIState *pThis)812 DECLINLINE(bool) pm1a_level(PACPISTATE pThis) 813 813 { 814 814 return (pThis->pm1a_ctl & SCI_EN) … … 816 816 } 817 817 818 DECLINLINE(bool) gpe0_level( ACPIState *pThis)818 DECLINLINE(bool) gpe0_level(PACPISTATE pThis) 819 819 { 820 820 return !!(pThis->gpe0_en & pThis->gpe0_sts); 821 821 } 822 822 823 DECLINLINE(bool) smbus_level(PPDMDEVINS pDevIns, ACPIState *pThis)823 DECLINLINE(bool) smbus_level(PPDMDEVINS pDevIns, PACPISTATE pThis) 824 824 { 825 825 PPDMPCIDEV pPciDev = pDevIns->apPciDevs[0]; … … 830 830 } 831 831 832 DECLINLINE(bool) acpiSCILevel(PPDMDEVINS pDevIns, ACPIState *pThis)832 DECLINLINE(bool) acpiSCILevel(PPDMDEVINS pDevIns, PACPISTATE pThis) 833 833 { 834 834 return pm1a_level(pThis) || gpe0_level(pThis) || smbus_level(pDevIns, pThis); … … 848 848 * @param en The new PM1a.EN value. 849 849 */ 850 static void acpiUpdatePm1a(PPDMDEVINS pDevIns, ACPIState *pThis, uint32_t sts, uint32_t en)850 static void acpiUpdatePm1a(PPDMDEVINS pDevIns, PACPISTATE pThis, uint32_t sts, uint32_t en) 851 851 { 852 852 Assert(PDMDevHlpCritSectIsOwner(pDevIns, &pThis->CritSect)); … … 876 876 * @param en The new GPE0.EN value. 877 877 */ 878 static void apicR3UpdateGpe0(PPDMDEVINS pDevIns, ACPIState *pThis, uint32_t sts, uint32_t en)878 static void apicR3UpdateGpe0(PPDMDEVINS pDevIns, PACPISTATE pThis, uint32_t sts, uint32_t en) 879 879 { 880 880 Assert(PDMDevHlpCritSectIsOwner(pDevIns, &pThis->CritSect)); … … 911 911 * @returns Strict VBox status code. 912 912 */ 913 static VBOXSTRICTRC acpiR3DoSleep(PPDMDEVINS pDevIns, ACPIState *pThis)913 static VBOXSTRICTRC acpiR3DoSleep(PPDMDEVINS pDevIns, PACPISTATE pThis) 914 914 { 915 915 /* We must set WAK_STS on resume (includes restore) so the guest knows that … … 944 944 static DECLCALLBACK(int) acpiR3Port_PowerButtonPress(PPDMIACPIPORT pInterface) 945 945 { 946 ACPIState *pThis = RT_FROM_MEMBER(pInterface, ACPIState, IACPIPort);946 PACPISTATE pThis = RT_FROM_MEMBER(pInterface, ACPISTATE, IACPIPort); 947 947 PPDMDEVINS pDevIns = pThis->pDevIns; 948 948 DEVACPI_LOCK_R3(pDevIns, pThis); … … 961 961 static DECLCALLBACK(int) acpiR3Port_GetPowerButtonHandled(PPDMIACPIPORT pInterface, bool *pfHandled) 962 962 { 963 ACPIState *pThis = RT_FROM_MEMBER(pInterface, ACPIState, IACPIPort);963 PACPISTATE pThis = RT_FROM_MEMBER(pInterface, ACPISTATE, IACPIPort); 964 964 PPDMDEVINS pDevIns = pThis->pDevIns; 965 965 DEVACPI_LOCK_R3(pDevIns, pThis); … … 977 977 static DECLCALLBACK(int) acpiR3Port_GetGuestEnteredACPIMode(PPDMIACPIPORT pInterface, bool *pfEntered) 978 978 { 979 ACPIState *pThis = RT_FROM_MEMBER(pInterface, ACPIState, IACPIPort);979 PACPISTATE pThis = RT_FROM_MEMBER(pInterface, ACPISTATE, IACPIPort); 980 980 PPDMDEVINS pDevIns = pThis->pDevIns; 981 981 DEVACPI_LOCK_R3(pDevIns, pThis); … … 992 992 static DECLCALLBACK(int) acpiR3Port_GetCpuStatus(PPDMIACPIPORT pInterface, unsigned uCpu, bool *pfLocked) 993 993 { 994 ACPIState *pThis = RT_FROM_MEMBER(pInterface, ACPIState, IACPIPort);994 PACPISTATE pThis = RT_FROM_MEMBER(pInterface, ACPISTATE, IACPIPort); 995 995 PPDMDEVINS pDevIns = pThis->pDevIns; 996 996 DEVACPI_LOCK_R3(pDevIns, pThis); … … 1010 1010 static DECLCALLBACK(int) acpiR3Port_SleepButtonPress(PPDMIACPIPORT pInterface) 1011 1011 { 1012 ACPIState *pThis = RT_FROM_MEMBER(pInterface, ACPIState, IACPIPort);1012 PACPISTATE pThis = RT_FROM_MEMBER(pInterface, ACPISTATE, IACPIPort); 1013 1013 PPDMDEVINS pDevIns = pThis->pDevIns; 1014 1014 DEVACPI_LOCK_R3(pDevIns, pThis); … … 1029 1029 static DECLCALLBACK(int) acpiR3Port_MonitorHotPlugEvent(PPDMIACPIPORT pInterface) 1030 1030 { 1031 ACPIState *pThis = RT_FROM_MEMBER(pInterface, ACPIState, IACPIPort);1031 PACPISTATE pThis = RT_FROM_MEMBER(pInterface, ACPISTATE, IACPIPort); 1032 1032 PPDMDEVINS pDevIns = pThis->pDevIns; 1033 1033 DEVACPI_LOCK_R3(pDevIns, pThis); … … 1048 1048 static DECLCALLBACK(int) acpiR3Port_BatteryStatusChangeEvent(PPDMIACPIPORT pInterface) 1049 1049 { 1050 ACPIState *pThis = RT_FROM_MEMBER(pInterface, ACPIState, IACPIPort);1050 PACPISTATE pThis = RT_FROM_MEMBER(pInterface, ACPISTATE, IACPIPort); 1051 1051 PPDMDEVINS pDevIns = pThis->pDevIns; 1052 1052 DEVACPI_LOCK_R3(pDevIns, pThis); … … 1068 1068 * @param uNow The current time. 1069 1069 */ 1070 static void acpiR3PmTimerReset(PPDMDEVINS pDevIns, ACPIState *pThis, uint64_t uNow)1070 static void acpiR3PmTimerReset(PPDMDEVINS pDevIns, PACPISTATE pThis, uint64_t uNow) 1071 1071 { 1072 1072 uint64_t uTimerFreq = PDMDevHlpTimerGetFreq(pDevIns, pThis->hPmTimer); … … 1089 1089 * @param u64Now The current time 1090 1090 */ 1091 static void acpiPmTimerUpdate(PPDMDEVINS pDevIns, ACPIState *pThis, uint64_t u64Now)1091 static void acpiPmTimerUpdate(PPDMDEVINS pDevIns, PACPISTATE pThis, uint64_t u64Now) 1092 1092 { 1093 1093 uint32_t msb = pThis->uPmTimerVal & TMR_VAL_MSB; … … 1132 1132 * @param pThis The ACPI shared instance data. 1133 1133 */ 1134 static int acpiR3FetchBatteryStatus( ACPIState *pThis)1134 static int acpiR3FetchBatteryStatus(PACPISTATE pThis) 1135 1135 { 1136 1136 uint32_t *p = pThis->au8BatteryInfo; … … 1170 1170 * @param pThis The ACPI shared instance data. 1171 1171 */ 1172 static int acpiR3FetchBatteryInfo( ACPIState *pThis)1172 static int acpiR3FetchBatteryInfo(PACPISTATE pThis) 1173 1173 { 1174 1174 uint32_t *p = pThis->au8BatteryInfo; … … 1193 1193 * @param pThis The ACPI shared instance data. 1194 1194 */ 1195 static uint32_t acpiR3GetBatteryDeviceStatus( ACPIState *pThis)1195 static uint32_t acpiR3GetBatteryDeviceStatus(PACPISTATE pThis) 1196 1196 { 1197 1197 bool fPresent; /* battery present? */ … … 1222 1222 * @param pThis The ACPI shared instance data. 1223 1223 */ 1224 static uint32_t acpiR3GetPowerSource( ACPIState *pThis)1224 static uint32_t acpiR3GetPowerSource(PACPISTATE pThis) 1225 1225 { 1226 1226 /* query the current power source from the host driver */ … … 2015 2015 * @param pThis The ACPI shared instance data. 2016 2016 */ 2017 static void acpiR3PmPCIBIOSFake(PPDMDEVINS pDevIns, ACPIState *pThis)2017 static void acpiR3PmPCIBIOSFake(PPDMDEVINS pDevIns, PACPISTATE pThis) 2018 2018 { 2019 2019 PPDMPCIDEV pPciDev = pDevIns->apPciDevs[0]; … … 2031 2031 * @param offset The offset into the I/O space, or -1 if invalid. 2032 2032 */ 2033 static RTIOPORT acpiR3CalcPmPort( ACPIState *pThis, int32_t offset)2033 static RTIOPORT acpiR3CalcPmPort(PACPISTATE pThis, int32_t offset) 2034 2034 { 2035 2035 Assert(pThis->uPmIoPortBase != 0); … … 2049 2049 * @param pThis The ACPI shared instance data. 2050 2050 */ 2051 static int acpiR3MapPmIoPorts(PPDMDEVINS pDevIns, ACPIState *pThis)2051 static int acpiR3MapPmIoPorts(PPDMDEVINS pDevIns, PACPISTATE pThis) 2052 2052 { 2053 2053 if (pThis->uPmIoPortBase == 0) … … 2078 2078 * @param pThis The ACPI shared instance data. 2079 2079 */ 2080 static int acpiR3UnmapPmIoPorts(PPDMDEVINS pDevIns, ACPIState *pThis)2080 static int acpiR3UnmapPmIoPorts(PPDMDEVINS pDevIns, PACPISTATE pThis) 2081 2081 { 2082 2082 if (pThis->uPmIoPortBase != 0) … … 2109 2109 * @param NewIoPortBase The new base address of the I/O ports. 2110 2110 */ 2111 static int acpiR3UpdatePmHandlers(PPDMDEVINS pDevIns, ACPIState *pThis, RTIOPORT NewIoPortBase)2111 static int acpiR3UpdatePmHandlers(PPDMDEVINS pDevIns, PACPISTATE pThis, RTIOPORT NewIoPortBase) 2112 2112 { 2113 2113 Log(("acpi: rebasing PM 0x%x -> 0x%x\n", pThis->uPmIoPortBase, NewIoPortBase)); … … 2296 2296 * @param pThis The ACPI shared instance data. 2297 2297 */ 2298 static void acpiR3SMBusPCIBIOSFake(PPDMDEVINS pDevIns, ACPIState *pThis)2298 static void acpiR3SMBusPCIBIOSFake(PPDMDEVINS pDevIns, PACPISTATE pThis) 2299 2299 { 2300 2300 PPDMPCIDEV pPciDev = pDevIns->apPciDevs[0]; … … 2315 2315 * @param pThis The ACPI shared instance data. 2316 2316 */ 2317 static void acpiR3SMBusResetDevice( ACPIState *pThis)2317 static void acpiR3SMBusResetDevice(PACPISTATE pThis) 2318 2318 { 2319 2319 pThis->u8SMBusHstSts = 0x00; … … 2339 2339 * @param pThis The ACPI shared instance data. 2340 2340 */ 2341 static int acpiR3MapSMBusIoPorts(PPDMDEVINS pDevIns, ACPIState *pThis)2341 static int acpiR3MapSMBusIoPorts(PPDMDEVINS pDevIns, PACPISTATE pThis) 2342 2342 { 2343 2343 if (pThis->uSMBusIoPortBase != 0) … … 2356 2356 * @param pThis The ACPI shared instance data. 2357 2357 */ 2358 static int acpiR3UnmapSMBusPorts(PPDMDEVINS pDevIns, ACPIState *pThis)2358 static int acpiR3UnmapSMBusPorts(PPDMDEVINS pDevIns, PACPISTATE pThis) 2359 2359 { 2360 2360 if (pThis->uSMBusIoPortBase != 0) … … 2376 2376 * @param NewIoPortBase The new base address of the I/O ports. 2377 2377 */ 2378 static int acpiR3UpdateSMBusHandlers(PPDMDEVINS pDevIns, ACPIState *pThis, RTIOPORT NewIoPortBase)2378 static int acpiR3UpdateSMBusHandlers(PPDMDEVINS pDevIns, PACPISTATE pThis, RTIOPORT NewIoPortBase) 2379 2379 { 2380 2380 Log(("acpi: rebasing SMBus 0x%x -> 0x%x\n", pThis->uSMBusIoPortBase, NewIoPortBase)); … … 2407 2407 static const SSMFIELD g_AcpiSavedStateFields4[] = 2408 2408 { 2409 SSMFIELD_ENTRY(ACPIS tate, pm1a_en),2410 SSMFIELD_ENTRY(ACPIS tate, pm1a_sts),2411 SSMFIELD_ENTRY(ACPIS tate, pm1a_ctl),2412 SSMFIELD_ENTRY(ACPIS tate, u64PmTimerInitial),2413 SSMFIELD_ENTRY(ACPIS tate, gpe0_en),2414 SSMFIELD_ENTRY(ACPIS tate, gpe0_sts),2415 SSMFIELD_ENTRY(ACPIS tate, uBatteryIndex),2416 SSMFIELD_ENTRY(ACPIS tate, uSystemInfoIndex),2417 SSMFIELD_ENTRY(ACPIS tate, u64RamSize),2418 SSMFIELD_ENTRY(ACPIS tate, u8IndexShift),2419 SSMFIELD_ENTRY(ACPIS tate, u8UseIOApic),2420 SSMFIELD_ENTRY(ACPIS tate, uSleepState),2409 SSMFIELD_ENTRY(ACPISTATE, pm1a_en), 2410 SSMFIELD_ENTRY(ACPISTATE, pm1a_sts), 2411 SSMFIELD_ENTRY(ACPISTATE, pm1a_ctl), 2412 SSMFIELD_ENTRY(ACPISTATE, u64PmTimerInitial), 2413 SSMFIELD_ENTRY(ACPISTATE, gpe0_en), 2414 SSMFIELD_ENTRY(ACPISTATE, gpe0_sts), 2415 SSMFIELD_ENTRY(ACPISTATE, uBatteryIndex), 2416 SSMFIELD_ENTRY(ACPISTATE, uSystemInfoIndex), 2417 SSMFIELD_ENTRY(ACPISTATE, u64RamSize), 2418 SSMFIELD_ENTRY(ACPISTATE, u8IndexShift), 2419 SSMFIELD_ENTRY(ACPISTATE, u8UseIOApic), 2420 SSMFIELD_ENTRY(ACPISTATE, uSleepState), 2421 2421 SSMFIELD_ENTRY_TERM() 2422 2422 }; … … 2427 2427 static const SSMFIELD g_AcpiSavedStateFields5[] = 2428 2428 { 2429 SSMFIELD_ENTRY(ACPIS tate, pm1a_en),2430 SSMFIELD_ENTRY(ACPIS tate, pm1a_sts),2431 SSMFIELD_ENTRY(ACPIS tate, pm1a_ctl),2432 SSMFIELD_ENTRY(ACPIS tate, u64PmTimerInitial),2433 SSMFIELD_ENTRY(ACPIS tate, gpe0_en),2434 SSMFIELD_ENTRY(ACPIS tate, gpe0_sts),2435 SSMFIELD_ENTRY(ACPIS tate, uBatteryIndex),2436 SSMFIELD_ENTRY(ACPIS tate, uSystemInfoIndex),2437 SSMFIELD_ENTRY(ACPIS tate, uSleepState),2438 SSMFIELD_ENTRY(ACPIS tate, u8IndexShift),2439 SSMFIELD_ENTRY(ACPIS tate, uPmIoPortBase),2429 SSMFIELD_ENTRY(ACPISTATE, pm1a_en), 2430 SSMFIELD_ENTRY(ACPISTATE, pm1a_sts), 2431 SSMFIELD_ENTRY(ACPISTATE, pm1a_ctl), 2432 SSMFIELD_ENTRY(ACPISTATE, u64PmTimerInitial), 2433 SSMFIELD_ENTRY(ACPISTATE, gpe0_en), 2434 SSMFIELD_ENTRY(ACPISTATE, gpe0_sts), 2435 SSMFIELD_ENTRY(ACPISTATE, uBatteryIndex), 2436 SSMFIELD_ENTRY(ACPISTATE, uSystemInfoIndex), 2437 SSMFIELD_ENTRY(ACPISTATE, uSleepState), 2438 SSMFIELD_ENTRY(ACPISTATE, u8IndexShift), 2439 SSMFIELD_ENTRY(ACPISTATE, uPmIoPortBase), 2440 2440 SSMFIELD_ENTRY_TERM() 2441 2441 }; … … 2446 2446 static const SSMFIELD g_AcpiSavedStateFields6[] = 2447 2447 { 2448 SSMFIELD_ENTRY(ACPIS tate, pm1a_en),2449 SSMFIELD_ENTRY(ACPIS tate, pm1a_sts),2450 SSMFIELD_ENTRY(ACPIS tate, pm1a_ctl),2451 SSMFIELD_ENTRY(ACPIS tate, u64PmTimerInitial),2452 SSMFIELD_ENTRY(ACPIS tate, gpe0_en),2453 SSMFIELD_ENTRY(ACPIS tate, gpe0_sts),2454 SSMFIELD_ENTRY(ACPIS tate, uBatteryIndex),2455 SSMFIELD_ENTRY(ACPIS tate, uSystemInfoIndex),2456 SSMFIELD_ENTRY(ACPIS tate, uSleepState),2457 SSMFIELD_ENTRY(ACPIS tate, u8IndexShift),2458 SSMFIELD_ENTRY(ACPIS tate, uPmIoPortBase),2459 SSMFIELD_ENTRY(ACPIS tate, fSuspendToSavedState),2448 SSMFIELD_ENTRY(ACPISTATE, pm1a_en), 2449 SSMFIELD_ENTRY(ACPISTATE, pm1a_sts), 2450 SSMFIELD_ENTRY(ACPISTATE, pm1a_ctl), 2451 SSMFIELD_ENTRY(ACPISTATE, u64PmTimerInitial), 2452 SSMFIELD_ENTRY(ACPISTATE, gpe0_en), 2453 SSMFIELD_ENTRY(ACPISTATE, gpe0_sts), 2454 SSMFIELD_ENTRY(ACPISTATE, uBatteryIndex), 2455 SSMFIELD_ENTRY(ACPISTATE, uSystemInfoIndex), 2456 SSMFIELD_ENTRY(ACPISTATE, uSleepState), 2457 SSMFIELD_ENTRY(ACPISTATE, u8IndexShift), 2458 SSMFIELD_ENTRY(ACPISTATE, uPmIoPortBase), 2459 SSMFIELD_ENTRY(ACPISTATE, fSuspendToSavedState), 2460 2460 SSMFIELD_ENTRY_TERM() 2461 2461 }; … … 2466 2466 static const SSMFIELD g_AcpiSavedStateFields7[] = 2467 2467 { 2468 SSMFIELD_ENTRY(ACPIS tate, pm1a_en),2469 SSMFIELD_ENTRY(ACPIS tate, pm1a_sts),2470 SSMFIELD_ENTRY(ACPIS tate, pm1a_ctl),2471 SSMFIELD_ENTRY(ACPIS tate, u64PmTimerInitial),2472 SSMFIELD_ENTRY(ACPIS tate, uPmTimerVal),2473 SSMFIELD_ENTRY(ACPIS tate, gpe0_en),2474 SSMFIELD_ENTRY(ACPIS tate, gpe0_sts),2475 SSMFIELD_ENTRY(ACPIS tate, uBatteryIndex),2476 SSMFIELD_ENTRY(ACPIS tate, uSystemInfoIndex),2477 SSMFIELD_ENTRY(ACPIS tate, uSleepState),2478 SSMFIELD_ENTRY(ACPIS tate, u8IndexShift),2479 SSMFIELD_ENTRY(ACPIS tate, uPmIoPortBase),2480 SSMFIELD_ENTRY(ACPIS tate, fSuspendToSavedState),2468 SSMFIELD_ENTRY(ACPISTATE, pm1a_en), 2469 SSMFIELD_ENTRY(ACPISTATE, pm1a_sts), 2470 SSMFIELD_ENTRY(ACPISTATE, pm1a_ctl), 2471 SSMFIELD_ENTRY(ACPISTATE, u64PmTimerInitial), 2472 SSMFIELD_ENTRY(ACPISTATE, uPmTimerVal), 2473 SSMFIELD_ENTRY(ACPISTATE, gpe0_en), 2474 SSMFIELD_ENTRY(ACPISTATE, gpe0_sts), 2475 SSMFIELD_ENTRY(ACPISTATE, uBatteryIndex), 2476 SSMFIELD_ENTRY(ACPISTATE, uSystemInfoIndex), 2477 SSMFIELD_ENTRY(ACPISTATE, uSleepState), 2478 SSMFIELD_ENTRY(ACPISTATE, u8IndexShift), 2479 SSMFIELD_ENTRY(ACPISTATE, uPmIoPortBase), 2480 SSMFIELD_ENTRY(ACPISTATE, fSuspendToSavedState), 2481 2481 SSMFIELD_ENTRY_TERM() 2482 2482 }; … … 2487 2487 static const SSMFIELD g_AcpiSavedStateFields8[] = 2488 2488 { 2489 SSMFIELD_ENTRY(ACPIS tate, pm1a_en),2490 SSMFIELD_ENTRY(ACPIS tate, pm1a_sts),2491 SSMFIELD_ENTRY(ACPIS tate, pm1a_ctl),2492 SSMFIELD_ENTRY(ACPIS tate, u64PmTimerInitial),2493 SSMFIELD_ENTRY(ACPIS tate, uPmTimerVal),2494 SSMFIELD_ENTRY(ACPIS tate, gpe0_en),2495 SSMFIELD_ENTRY(ACPIS tate, gpe0_sts),2496 SSMFIELD_ENTRY(ACPIS tate, uBatteryIndex),2497 SSMFIELD_ENTRY(ACPIS tate, uSystemInfoIndex),2498 SSMFIELD_ENTRY(ACPIS tate, uSleepState),2499 SSMFIELD_ENTRY(ACPIS tate, u8IndexShift),2500 SSMFIELD_ENTRY(ACPIS tate, uPmIoPortBase),2501 SSMFIELD_ENTRY(ACPIS tate, fSuspendToSavedState),2502 SSMFIELD_ENTRY(ACPIS tate, uSMBusIoPortBase),2503 SSMFIELD_ENTRY(ACPIS tate, u8SMBusHstSts),2504 SSMFIELD_ENTRY(ACPIS tate, u8SMBusSlvSts),2505 SSMFIELD_ENTRY(ACPIS tate, u8SMBusHstCnt),2506 SSMFIELD_ENTRY(ACPIS tate, u8SMBusHstCmd),2507 SSMFIELD_ENTRY(ACPIS tate, u8SMBusHstAdd),2508 SSMFIELD_ENTRY(ACPIS tate, u8SMBusHstDat0),2509 SSMFIELD_ENTRY(ACPIS tate, u8SMBusHstDat1),2510 SSMFIELD_ENTRY(ACPIS tate, u8SMBusSlvCnt),2511 SSMFIELD_ENTRY(ACPIS tate, u8SMBusShdwCmd),2512 SSMFIELD_ENTRY(ACPIS tate, u16SMBusSlvEvt),2513 SSMFIELD_ENTRY(ACPIS tate, u16SMBusSlvDat),2514 SSMFIELD_ENTRY(ACPIS tate, au8SMBusBlkDat),2515 SSMFIELD_ENTRY(ACPIS tate, u8SMBusBlkIdx),2489 SSMFIELD_ENTRY(ACPISTATE, pm1a_en), 2490 SSMFIELD_ENTRY(ACPISTATE, pm1a_sts), 2491 SSMFIELD_ENTRY(ACPISTATE, pm1a_ctl), 2492 SSMFIELD_ENTRY(ACPISTATE, u64PmTimerInitial), 2493 SSMFIELD_ENTRY(ACPISTATE, uPmTimerVal), 2494 SSMFIELD_ENTRY(ACPISTATE, gpe0_en), 2495 SSMFIELD_ENTRY(ACPISTATE, gpe0_sts), 2496 SSMFIELD_ENTRY(ACPISTATE, uBatteryIndex), 2497 SSMFIELD_ENTRY(ACPISTATE, uSystemInfoIndex), 2498 SSMFIELD_ENTRY(ACPISTATE, uSleepState), 2499 SSMFIELD_ENTRY(ACPISTATE, u8IndexShift), 2500 SSMFIELD_ENTRY(ACPISTATE, uPmIoPortBase), 2501 SSMFIELD_ENTRY(ACPISTATE, fSuspendToSavedState), 2502 SSMFIELD_ENTRY(ACPISTATE, uSMBusIoPortBase), 2503 SSMFIELD_ENTRY(ACPISTATE, u8SMBusHstSts), 2504 SSMFIELD_ENTRY(ACPISTATE, u8SMBusSlvSts), 2505 SSMFIELD_ENTRY(ACPISTATE, u8SMBusHstCnt), 2506 SSMFIELD_ENTRY(ACPISTATE, u8SMBusHstCmd), 2507 SSMFIELD_ENTRY(ACPISTATE, u8SMBusHstAdd), 2508 SSMFIELD_ENTRY(ACPISTATE, u8SMBusHstDat0), 2509 SSMFIELD_ENTRY(ACPISTATE, u8SMBusHstDat1), 2510 SSMFIELD_ENTRY(ACPISTATE, u8SMBusSlvCnt), 2511 SSMFIELD_ENTRY(ACPISTATE, u8SMBusShdwCmd), 2512 SSMFIELD_ENTRY(ACPISTATE, u16SMBusSlvEvt), 2513 SSMFIELD_ENTRY(ACPISTATE, u16SMBusSlvDat), 2514 SSMFIELD_ENTRY(ACPISTATE, au8SMBusBlkDat), 2515 SSMFIELD_ENTRY(ACPISTATE, u8SMBusBlkIdx), 2516 2516 SSMFIELD_ENTRY_TERM() 2517 2517 }; … … 2541 2541 */ 2542 2542 int rc = acpiR3UnmapPmIoPorts(pDevIns, pThis); 2543 if (RT_FAILURE(rc)) 2544 return rc; 2543 AssertRCReturn(rc, rc); 2545 2544 2546 2545 /* … … 2578 2577 ("%#x\n", pThis->u8SMBusBlkIdx), VERR_SSM_LOAD_CONFIG_MISMATCH); 2579 2578 rc = acpiR3MapPmIoPorts(pDevIns, pThis); 2580 if (RT_FAILURE(rc)) 2581 return rc; 2579 AssertRCReturn(rc, rc); 2582 2580 rc = acpiR3MapSMBusIoPorts(pDevIns, pThis); 2583 if (RT_FAILURE(rc)) 2584 return rc; 2581 AssertRCReturn(rc, rc); 2585 2582 rc = acpiR3FetchBatteryStatus(pThis); 2586 if (RT_FAILURE(rc)) 2587 return rc; 2583 AssertRCReturn(rc, rc); 2588 2584 rc = acpiR3FetchBatteryInfo(pThis); 2589 if (RT_FAILURE(rc))2590 return rc; 2585 AssertRCReturn(rc, rc); 2586 2591 2587 PDMDevHlpTimerLock(pDevIns, pThis->hPmTimer, VERR_IGNORED); 2592 2588 DEVACPI_LOCK_R3(pDevIns, pThis); … … 2606 2602 static DECLCALLBACK(void *) acpiR3QueryInterface(PPDMIBASE pInterface, const char *pszIID) 2607 2603 { 2608 ACPIState *pThis = RT_FROM_MEMBER(pInterface, ACPIState, IBase);2604 PACPISTATE pThis = RT_FROM_MEMBER(pInterface, ACPISTATE, IBase); 2609 2605 PDMIBASE_RETURN_INTERFACE(pszIID, PDMIBASE, &pThis->IBase); 2610 2606 PDMIBASE_RETURN_INTERFACE(pszIID, PDMIACPIPORT, &pThis->IACPIPort); … … 2633 2629 * Prepare a ACPI table header. 2634 2630 */ 2635 static void acpiR3PrepareHeader( ACPIState *pThis, ACPITBLHEADER *header,2631 static void acpiR3PrepareHeader(PACPISTATE pThis, ACPITBLHEADER *header, 2636 2632 const char au8Signature[4], 2637 2633 uint32_t u32Length, uint8_t u8Revision) … … 2709 2705 * Plant the Fixed ACPI Description Table (FADT aka FACP). 2710 2706 */ 2711 static void acpiR3SetupFadt(PPDMDEVINS pDevIns, ACPIState *pThis, RTGCPHYS32 GCPhysAcpi1, RTGCPHYS32 GCPhysAcpi2,2707 static void acpiR3SetupFadt(PPDMDEVINS pDevIns, PACPISTATE pThis, RTGCPHYS32 GCPhysAcpi1, RTGCPHYS32 GCPhysAcpi2, 2712 2708 RTGCPHYS32 GCPhysFacs, RTGCPHYS GCPhysDsdt) 2713 2709 { … … 2793 2789 * ACPI 2.0 and up. 2794 2790 */ 2795 static int acpiR3SetupRsdt(PPDMDEVINS pDevIns, ACPIState *pThis, RTGCPHYS32 addr, unsigned int nb_entries, uint32_t *addrs)2791 static int acpiR3SetupRsdt(PPDMDEVINS pDevIns, PACPISTATE pThis, RTGCPHYS32 addr, unsigned int nb_entries, uint32_t *addrs) 2796 2792 { 2797 2793 ACPITBLRSDT *rsdt; … … 2817 2813 * Plant the Extended System Description Table. 2818 2814 */ 2819 static int acpiR3SetupXsdt(PPDMDEVINS pDevIns, ACPIState *pThis, RTGCPHYS32 addr, unsigned int nb_entries, uint32_t *addrs)2815 static int acpiR3SetupXsdt(PPDMDEVINS pDevIns, PACPISTATE pThis, RTGCPHYS32 addr, unsigned int nb_entries, uint32_t *addrs) 2820 2816 { 2821 2817 ACPITBLXSDT *xsdt; … … 2845 2841 * Plant the Root System Description Pointer (RSDP). 2846 2842 */ 2847 static void acpiR3SetupRsdp( ACPIState *pThis, ACPITBLRSDP *rsdp, RTGCPHYS32 GCPhysRsdt, RTGCPHYS GCPhysXsdt)2843 static void acpiR3SetupRsdp(PACPISTATE pThis, ACPITBLRSDP *rsdp, RTGCPHYS32 GCPhysRsdt, RTGCPHYS GCPhysXsdt) 2848 2844 { 2849 2845 memset(rsdp, 0, sizeof(*rsdp)); … … 2955 2951 * Size of MADT for given ACPI config, useful to compute layout. 2956 2952 */ 2957 static uint32_t sizeFor( ACPIState *pThis, uint32_t cIsos)2953 static uint32_t sizeFor(PACPISTATE pThis, uint32_t cIsos) 2958 2954 { 2959 2955 return AcpiTableMadt(pThis->cCpus, cIsos).size(); … … 2986 2982 * @todo All hardcoded, should set this up based on the actual VM config!!!!! 2987 2983 */ 2988 static void acpiR3SetupMadt(PPDMDEVINS pDevIns, ACPIState *pThis, RTGCPHYS32 addr)2984 static void acpiR3SetupMadt(PPDMDEVINS pDevIns, PACPISTATE pThis, RTGCPHYS32 addr) 2989 2985 { 2990 2986 uint16_t cpus = pThis->cCpus; … … 3057 3053 * Plant the High Performance Event Timer (HPET) descriptor. 3058 3054 */ 3059 static void acpiR3SetupHpet(PPDMDEVINS pDevIns, ACPIState *pThis, RTGCPHYS32 addr)3055 static void acpiR3SetupHpet(PPDMDEVINS pDevIns, PACPISTATE pThis, RTGCPHYS32 addr) 3060 3056 { 3061 3057 ACPITBLHPET hpet; … … 3090 3086 * @param GCPhysDst Where to plant it. 3091 3087 */ 3092 static void acpiR3SetupMcfg(PPDMDEVINS pDevIns, ACPIState *pThis, RTGCPHYS32 GCPhysDst)3088 static void acpiR3SetupMcfg(PPDMDEVINS pDevIns, PACPISTATE pThis, RTGCPHYS32 GCPhysDst) 3093 3089 { 3094 3090 struct … … 3176 3172 * Create the ACPI tables in guest memory. 3177 3173 */ 3178 static int acpiR3PlantTables(PPDMDEVINS pDevIns, ACPIState *pThis)3174 static int acpiR3PlantTables(PPDMDEVINS pDevIns, PACPISTATE pThis) 3179 3175 { 3180 3176 int rc; … … 4107 4103 4108 4104 rc = PDMDevHlpPCIRegister(pDevIns, pPciDev); 4109 if (RT_FAILURE(rc)) 4110 return rc; 4105 AssertRCReturn(rc, rc); 4111 4106 4112 4107 rc = PDMDevHlpPCIInterceptConfigAccesses(pDevIns, pPciDev, acpiR3PciConfigRead, acpiR3PciConfigWrite); … … 4117 4112 */ 4118 4113 rc = PDMDevHlpSSMRegister(pDevIns, 8, sizeof(*pThis), acpiR3SaveState, acpiR3LoadState); 4119 if (RT_FAILURE(rc)) 4120 return rc; 4114 AssertRCReturn(rc, rc); 4121 4115 4122 4116 /* … … 4179 4173 /* .cMaxInstances = */ ~0U, 4180 4174 /* .uSharedVersion = */ 42, 4181 /* .cbInstanceShared = */ sizeof(ACPIS tate),4175 /* .cbInstanceShared = */ sizeof(ACPISTATE), 4182 4176 /* .cbInstanceCC = */ 0, 4183 4177 /* .cbInstanceRC = */ 0,
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