Changeset 82024 in vbox

Timestamp:

Nov 20, 2019 1:46:13 PM (5 years ago)

Author:

vboxsync

Message:

DevATA: Extended IRQ delay to PIO transfers for compatibility with very old guests (see bugref:5869).

Location:

trunk/src/VBox/Devices/Storage

Files:

• DevATA.cpp (modified) (1 diff)
• DevFdc.cpp (modified) (14 diffs)

trunk/src/VBox/Devices/Storage/DevATA.cpp

@@ -6133 +6133 @@
                 else
                 {
+                    /* The infamous delay IRQ hack. */
+                    if (RT_UNLIKELY(pCtl->msDelayIRQ))
+                    {
+                        /* Various antique guests have buggy disk drivers silently
+                         * assuming that disk operations take a relatively long time.
+                         * Work around such bugs by holding off interrupts a bit.
+                         */
+                        Log(("%s: delay IRQ hack (PIO)\n", __FUNCTION__));
+                        ataR3LockLeave(pDevIns, pCtl);
+                        RTThreadSleep(pCtl->msDelayIRQ);
+                        ataR3LockEnter(pDevIns, pCtl);
+                    }
+
                     /* Finish PIO transfer. */
                     ataHCPIOTransfer(pDevIns, pCtl);

trunk/src/VBox/Devices/Storage/DevFdc.cpp

@@ -465 +465 @@
 static void fdctrl_reset(fdctrl_t *fdctrl, int do_irq);
 static void fdctrl_reset_fifo(fdctrl_t *fdctrl);
-static void fdctrl_raise_irq(fdctrl_t *fdctrl, uint8_t status0);
 static fdrive_t *get_cur_drv(fdctrl_t *fdctrl);
 
@@ -651 +650 @@
     /* Controller state */
     TMTIMERHANDLE hResultTimer;
+
+    /* Interrupt delay timers. */
+    TMTIMERHANDLE hXferDelayTimer;
+    TMTIMERHANDLE hIrqDelayTimer;
+    uint16_t uIrqDelayMsec;
+    uint8_t st0;
+    uint8_t st1;
+    uint8_t st2;
+
     uint8_t sra;
     uint8_t srb;
@@ -770 +778 @@
 }
 
-static void fdctrl_raise_irq(fdctrl_t *fdctrl, uint8_t status0)
+static void fdctrl_raise_irq_now(fdctrl_t *fdctrl, uint8_t status0)
 {
     if (!(fdctrl->sra & FD_SRA_INTPEND)) {
@@ -789 +797 @@
     fdctrl->status0 = status0;
     FLOPPY_DPRINTF("Set interrupt status to 0x%02x\n", fdctrl->status0);
+}
+
+static void fdctrl_raise_irq(fdctrl_t *fdctrl, uint8_t status0)
+{
+    if (!fdctrl->uIrqDelayMsec)
+    {
+        /* If not IRQ delay needed, trigger the interrupt now. */
+        fdctrl_raise_irq_now(fdctrl, status0);
+    }
+    else
+    {
+        /* Otherwise schedule completion after a short while. */
+        fdctrl->st0 = status0;
+        PDMDevHlpTimerSetMillies(fdctrl->pDevIns, fdctrl->hIrqDelayTimer, fdctrl->uIrqDelayMsec);
+    }
 }
 
@@ -1094 +1117 @@
 
 /* Callback for transfer end (stop or abort) */
-static void fdctrl_stop_transfer(fdctrl_t *fdctrl, uint8_t status0,
-                                 uint8_t status1, uint8_t status2)
+static void fdctrl_stop_transfer_now(fdctrl_t *fdctrl, uint8_t status0,
+                                     uint8_t status1, uint8_t status2)
 {
     fdrive_t *cur_drv;
@@ -1121 +1144 @@
     fdctrl->msr &= ~FD_MSR_NONDMA;
     fdctrl_set_fifo(fdctrl, 7, 1);
+}
+
+static void fdctrl_stop_transfer(fdctrl_t *fdctrl, uint8_t status0,
+                                 uint8_t status1, uint8_t status2)
+{
+    if (!fdctrl->uIrqDelayMsec)
+    {
+        /* If not IRQ delay needed, just stop the transfer and trigger IRQ now. */
+        fdctrl_stop_transfer_now(fdctrl, status0, status1, status2);
+    }
+    else
+    {
+        /* Otherwise schedule completion after a short while. */
+        fdctrl->st0 = status0;
+        fdctrl->st1 = status1;
+        fdctrl->st2 = status2;
+        PDMDevHlpTimerSetMillies(fdctrl->pDevIns, fdctrl->hXferDelayTimer, fdctrl->uIrqDelayMsec);
+    }
 }
 
@@ -1242 +1283 @@
     if (direction != FD_DIR_WRITE)
         fdctrl->msr |= FD_MSR_DIO;
+
     /* IO based transfer: calculate len */
     fdctrl_raise_irq(fdctrl, 0x00);
-
     return;
 }
@@ -2168 +2209 @@
         FLOPPY_DPRINTF("read id when no disk in drive\n");
         /// @todo This is wrong! Command should not complete.
-        fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_MA | FD_SR1_ND, FD_SR2_MD);
+        fdctrl_stop_transfer_now(fdctrl, FD_SR0_ABNTERM, FD_SR1_MA | FD_SR1_ND, FD_SR2_MD);
     } else if ((fdctrl->dsr & FD_DSR_DRATEMASK) != cur_drv->media_rate) {
         FLOPPY_DPRINTF("read id rate mismatch (fdc=%d, media=%d)\n",
                        fdctrl->dsr & FD_DSR_DRATEMASK, cur_drv->media_rate);
-        fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_MA | FD_SR1_ND, FD_SR2_MD);
+        fdctrl_stop_transfer_now(fdctrl, FD_SR0_ABNTERM, FD_SR1_MA | FD_SR1_ND, FD_SR2_MD);
     } else if (cur_drv->track >= cur_drv->max_track) {
         FLOPPY_DPRINTF("read id past last track (%d >= %d)\n",
                        cur_drv->track, cur_drv->max_track);
         cur_drv->ltrk = 0;
-        fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_MA | FD_SR1_ND, FD_SR2_MD);
+        fdctrl_stop_transfer_now(fdctrl, FD_SR0_ABNTERM, FD_SR1_MA | FD_SR1_ND, FD_SR2_MD);
     }
     else
-        fdctrl_stop_transfer(fdctrl, 0x00, 0x00, 0x00);
+        fdctrl_stop_transfer_now(fdctrl, 0x00, 0x00, 0x00);
 }
 
@@ -2233 +2274 @@
 
 /**
+ * @callback_method_impl{FNTMTIMERDEV}
+ */
+static DECLCALLBACK(void) fdcTransferDelayTimer(PPDMDEVINS pDevIns, PTMTIMER pTimer, void *pvUser)
+{
+    RT_NOREF(pDevIns, pTimer);
+    fdctrl_t *fdctrl = (fdctrl_t *)pvUser;
+    fdctrl_stop_transfer_now(fdctrl, fdctrl->st0, fdctrl->st1, fdctrl->st2);
+}
+
+/**
+ * @callback_method_impl{FNTMTIMERDEV}
+ */
+static DECLCALLBACK(void) fdcIrqDelayTimer(PPDMDEVINS pDevIns, PTMTIMER pTimer, void *pvUser)
+{
+    RT_NOREF(pDevIns, pTimer);
+    fdctrl_t *fdctrl = (fdctrl_t *)pvUser;
+    fdctrl_raise_irq_now(fdctrl, fdctrl->st0);
+}
+
+
+
+/* -=-=-=-=-=-=-=-=- I/O Port Access Handlers -=-=-=-=-=-=-=-=- */
+/**
  * @callback_method_impl{FNIOMIOPORTNEWIN, Handling 0x3f1..0x3f5 accesses.}
  */
@@ -2291 +2355 @@
     PCPDMDEVHLPR3 pHlp = pDevIns->pHlpR3;
     unsigned int i;
+    int rc;
 
     /* Save the FDC I/O registers... */
@@ -2338 +2403 @@
         pHlp->pfnSSMPutU8(pSSM, d->sect);
     }
+    rc = pHlp->pfnTimerSave(pDevIns, pThis->hXferDelayTimer, pSSM);
+    if (RT_FAILURE(rc))
+        return rc;
+
+    rc = pHlp->pfnTimerSave(pDevIns, pThis->hIrqDelayTimer, pSSM);
+    if (RT_FAILURE(rc))
+        return rc;
+
     return pHlp->pfnTimerSave(pDevIns, pThis->hResultTimer, pSSM);
 }
@@ -2758 +2831 @@
      * Validate configuration.
      */
-    PDMDEV_VALIDATE_CONFIG_RETURN(pDevIns, "IRQ|DMA|MemMapped|IOBase|StatusA", "");
+    PDMDEV_VALIDATE_CONFIG_RETURN(pDevIns, "IRQ|DMA|MemMapped|IOBase|StatusA|IRQDelay", "");
 
     /*
@@ -2775 +2848 @@
     rc = pHlp->pfnCFGMQueryBoolDef(pCfg, "MemMapped", &fMemMapped, false);
     AssertMsgRCReturn(rc, ("Configuration error: Failed to read bool value MemMapped rc=%Rrc\n", rc), rc);
+
+    uint16_t uIrqDelay;
+    rc = CFGMR3QueryU16Def(pCfg, "IRQDelay", &uIrqDelay, 0);
+    AssertMsgRCReturn(rc, ("Configuration error: Failed to read U16 IRQDelay, rc=%Rrc\n", rc), rc);
 
     bool fStatusA;
@@ -2822 +2899 @@
                                 TMTIMER_FLAGS_DEFAULT_CRIT_SECT, "FDC Timer", &pThis->hResultTimer);
     AssertRCReturn(rc, rc);
+
+    /*
+     * Create the transfer delay timer.
+     */
+    rc = PDMDevHlpTimerCreate(pDevIns, TMCLOCK_VIRTUAL_SYNC, fdcTransferDelayTimer, pThis,
+                              TMTIMER_FLAGS_DEFAULT_CRIT_SECT, "FDC Transfer Delay Timer", &pThis->hXferDelayTimer);
+    if (RT_FAILURE(rc))
+        return rc;
+
+    /*
+     * Create the IRQ delay timer.
+     */
+    rc = PDMDevHlpTimerCreate(pDevIns, TMCLOCK_VIRTUAL_SYNC, fdcIrqDelayTimer, pThis,
+                              TMTIMER_FLAGS_DEFAULT_CRIT_SECT, "FDC IRQ Delay Timer", &pThis->hIrqDelayTimer);
+    if (RT_FAILURE(rc))
+        return rc;
+
+    pThis->uIrqDelayMsec = uIrqDelay;
 
     /*