Changeset 82048 in vbox for trunk/src/VBox/Devices
- Timestamp:
- Nov 20, 2019 8:30:15 PM (5 years ago)
- svn:sync-xref-src-repo-rev:
- 134852
- Location:
- trunk/src/VBox/Devices/Graphics
- Files:
-
- 10 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/Devices/Graphics/DevVGA-SVGA.cpp
r82047 r82048 2951 2951 # ifdef VBOX_WITH_VMSVGA3D 2952 2952 if (pThis->svga.f3DEnabled) 2953 vmsvga3dSaveExec(pThis , pSSM);2953 vmsvga3dSaveExec(pThis->pDevInsR3, pThis, pSSM); 2954 2954 # endif 2955 2955 break; … … 2964 2964 # ifdef VBOX_WITH_VMSVGA3D 2965 2965 if (pThis->svga.f3DEnabled) 2966 vmsvga3dLoadExec(pThis , pLoadState->pSSM, pLoadState->uVersion, pLoadState->uPass);2966 vmsvga3dLoadExec(pThis->pDevInsR3, pThis, pLoadState->pSSM, pLoadState->uVersion, pLoadState->uPass); 2967 2967 # endif 2968 2968 break; -
trunk/src/VBox/Devices/Graphics/DevVGA-SVGA3d-savedstate.cpp
r77114 r82048 147 147 } 148 148 149 int vmsvga3dLoadExec(P VGASTATE pThis, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)149 int vmsvga3dLoadExec(PPDMDEVINS pDevIns, PVGASTATE pThis, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass) 150 150 { 151 151 RT_NOREF(uPass); 152 PVMSVGA3DSTATE pState = pThis->svga.p3dState;152 PVMSVGA3DSTATE pState = pThis->svga.p3dState; 153 153 AssertReturn(pState, VERR_NO_MEMORY); 154 int rc; 154 PCPDMDEVHLPR3 pHlp = pDevIns->pHlpR3; 155 int rc; 155 156 uint32_t cContexts, cSurfaces; 156 157 LogFlow(("vmsvga3dLoadExec:\n")); … … 162 163 163 164 /* Get the generic 3d state first. */ 164 rc = SSMR3GetStructEx(pSSM, pState, sizeof(*pState), 0, g_aVMSVGA3DSTATEFields, NULL);165 rc = pHlp->pfnSSMGetStructEx(pSSM, pState, sizeof(*pState), 0, g_aVMSVGA3DSTATEFields, NULL); 165 166 AssertRCReturn(rc, rc); 166 167 … … 177 178 178 179 /* Get the context id */ 179 rc = SSMR3GetU32(pSSM, &cid);180 rc = pHlp->pfnSSMGetU32(pSSM, &cid); 180 181 AssertRCReturn(rc, rc); 181 182 … … 206 207 AssertReturn(pContext->id == cid, VERR_INTERNAL_ERROR); 207 208 208 rc = SSMR3GetStructEx(pSSM, pContext, sizeof(*pContext), 0, g_aVMSVGA3DCONTEXTFields, NULL);209 rc = pHlp->pfnSSMGetStructEx(pSSM, pContext, sizeof(*pContext), 0, g_aVMSVGA3DCONTEXTFields, NULL); 209 210 AssertRCReturn(rc, rc); 210 211 … … 225 226 226 227 /* Fetch the id first. */ 227 rc = SSMR3GetU32(pSSM, &shid);228 rc = pHlp->pfnSSMGetU32(pSSM, &shid); 228 229 AssertRCReturn(rc, rc); 229 230 … … 233 234 234 235 /* Fetch a copy of the shader struct. */ 235 rc = SSMR3GetStructEx(pSSM, &shader, sizeof(shader), 0, g_aVMSVGA3DSHADERFields, NULL);236 rc = pHlp->pfnSSMGetStructEx(pSSM, &shader, sizeof(shader), 0, g_aVMSVGA3DSHADERFields, NULL); 236 237 AssertRCReturn(rc, rc); 237 238 … … 239 240 AssertReturn(pData, VERR_NO_MEMORY); 240 241 241 rc = SSMR3GetMem(pSSM, pData, shader.cbData);242 rc = pHlp->pfnSSMGetMem(pSSM, pData, shader.cbData); 242 243 AssertRCReturn(rc, rc); 243 244 … … 256 257 257 258 /* Fetch the id first. */ 258 rc = SSMR3GetU32(pSSM, &shid);259 rc = pHlp->pfnSSMGetU32(pSSM, &shid); 259 260 AssertRCReturn(rc, rc); 260 261 … … 264 265 265 266 /* Fetch a copy of the shader struct. */ 266 rc = SSMR3GetStructEx(pSSM, &shader, sizeof(shader), 0, g_aVMSVGA3DSHADERFields, NULL);267 rc = pHlp->pfnSSMGetStructEx(pSSM, &shader, sizeof(shader), 0, g_aVMSVGA3DSHADERFields, NULL); 267 268 AssertRCReturn(rc, rc); 268 269 … … 270 271 AssertReturn(pData, VERR_NO_MEMORY); 271 272 272 rc = SSMR3GetMem(pSSM, pData, shader.cbData);273 rc = pHlp->pfnSSMGetMem(pSSM, pData, shader.cbData); 273 274 AssertRCReturn(rc, rc); 274 275 … … 285 286 VMSVGASHADERCONST ShaderConst; 286 287 287 rc = SSMR3GetStructEx(pSSM, &ShaderConst, sizeof(ShaderConst), 0, g_aVMSVGASHADERCONSTFields, NULL);288 rc = pHlp->pfnSSMGetStructEx(pSSM, &ShaderConst, sizeof(ShaderConst), 0, g_aVMSVGASHADERCONSTFields, NULL); 288 289 AssertRCReturn(rc, rc); 289 290 … … 300 301 VMSVGASHADERCONST ShaderConst; 301 302 302 rc = SSMR3GetStructEx(pSSM, &ShaderConst, sizeof(ShaderConst), 0, g_aVMSVGASHADERCONSTFields, NULL);303 rc = pHlp->pfnSSMGetStructEx(pSSM, &ShaderConst, sizeof(ShaderConst), 0, g_aVMSVGASHADERCONSTFields, NULL); 303 304 AssertRCReturn(rc, rc); 304 305 … … 316 317 /* Number of stages/samplers. */ 317 318 uint32_t cStages; 318 rc = SSMR3GetU32(pSSM, &cStages);319 rc = pHlp->pfnSSMGetU32(pSSM, &cStages); 319 320 AssertRCReturn(rc, rc); 320 321 321 322 /* Number of states. */ 322 323 uint32_t cTextureStates; 323 rc = SSMR3GetU32(pSSM, &cTextureStates);324 rc = pHlp->pfnSSMGetU32(pSSM, &cTextureStates); 324 325 AssertRCReturn(rc, rc); 325 326 … … 329 330 { 330 331 SVGA3dTextureState textureState; 331 SSMR3GetU32(pSSM, &textureState.stage);332 pHlp->pfnSSMGetU32(pSSM, &textureState.stage); 332 333 uint32_t u32Name; 333 SSMR3GetU32(pSSM, &u32Name);334 pHlp->pfnSSMGetU32(pSSM, &u32Name); 334 335 textureState.name = (SVGA3dTextureStateName)u32Name; 335 rc = SSMR3GetU32(pSSM, &textureState.value);336 rc = pHlp->pfnSSMGetU32(pSSM, &textureState.value); 336 337 AssertRCReturn(rc, rc); 337 338 … … 350 351 RT_ZERO(query); 351 352 352 rc = SSMR3GetStructEx(pSSM, &query, sizeof(query), 0, g_aVMSVGA3DQUERYFields, NULL);353 rc = pHlp->pfnSSMGetStructEx(pSSM, &query, sizeof(query), 0, g_aVMSVGA3DQUERYFields, NULL); 353 354 AssertRCReturn(rc, rc); 354 355 … … 398 399 399 400 /* Fetch the id first. */ 400 rc = SSMR3GetU32(pSSM, &sid);401 rc = pHlp->pfnSSMGetU32(pSSM, &sid); 401 402 AssertRCReturn(rc, rc); 402 403 … … 407 408 408 409 /* Fetch the surface structure first. */ 409 rc = SSMR3GetStructEx(pSSM, &surface, sizeof(surface), 0, g_aVMSVGA3DSURFACEFields, NULL);410 rc = pHlp->pfnSSMGetStructEx(pSSM, &surface, sizeof(surface), 0, g_aVMSVGA3DSURFACEFields, NULL); 410 411 AssertRCReturn(rc, rc); 411 412 … … 424 425 uint32_t idx = j + face * surface.faces[0].numMipLevels; 425 426 /* Load the mip map level struct. */ 426 rc = SSMR3GetStructEx(pSSM, &pMipmapLevel[idx], sizeof(pMipmapLevel[idx]), 0, g_aVMSVGA3DMIPMAPLEVELFields, NULL);427 rc = pHlp->pfnSSMGetStructEx(pSSM, &pMipmapLevel[idx], sizeof(pMipmapLevel[idx]), 0, g_aVMSVGA3DMIPMAPLEVELFields, NULL); 427 428 AssertRCReturn(rc, rc); 428 429 … … 454 455 455 456 /* Fetch the data present boolean first. */ 456 rc = SSMR3GetBool(pSSM, &fDataPresent);457 rc = pHlp->pfnSSMGetBool(pSSM, &fDataPresent); 457 458 AssertRCReturn(rc, rc); 458 459 … … 461 462 if (fDataPresent) 462 463 { 463 rc = SSMR3GetMem(pSSM, pMipmapLevel->pSurfaceData, pMipmapLevel->cbSurface);464 rc = pHlp->pfnSSMGetMem(pSSM, pMipmapLevel->pSurfaceData, pMipmapLevel->cbSurface); 464 465 AssertRCReturn(rc, rc); 465 466 pMipmapLevel->fDirty = true; … … 500 501 501 502 502 static int vmsvga3dSaveContext(P VGASTATE pThis, PSSMHANDLE pSSM, PVMSVGA3DCONTEXT pContext)503 static int vmsvga3dSaveContext(PCPDMDEVHLPR3 pHlp, PVGASTATE pThis, PSSMHANDLE pSSM, PVMSVGA3DCONTEXT pContext) 503 504 { 504 505 PVMSVGA3DSTATE pState = pThis->svga.p3dState; … … 506 507 507 508 /* Save the id first. */ 508 int rc = SSMR3PutU32(pSSM, cid);509 int rc = pHlp->pfnSSMPutU32(pSSM, cid); 509 510 AssertRCReturn(rc, rc); 510 511 … … 512 513 { 513 514 /* Save a copy of the context structure first. */ 514 rc = SSMR3PutStructEx(pSSM, pContext, sizeof(*pContext), 0, g_aVMSVGA3DCONTEXTFields, NULL);515 rc = pHlp->pfnSSMPutStructEx(pSSM, pContext, sizeof(*pContext), 0, g_aVMSVGA3DCONTEXTFields, NULL); 515 516 AssertRCReturn(rc, rc); 516 517 … … 521 522 522 523 /* Save the id first. */ 523 rc = SSMR3PutU32(pSSM, pShader->id);524 rc = pHlp->pfnSSMPutU32(pSSM, pShader->id); 524 525 AssertRCReturn(rc, rc); 525 526 … … 529 530 530 531 /* Save a copy of the shader struct. */ 531 rc = SSMR3PutStructEx(pSSM, pShader, sizeof(*pShader), 0, g_aVMSVGA3DSHADERFields, NULL);532 rc = pHlp->pfnSSMPutStructEx(pSSM, pShader, sizeof(*pShader), 0, g_aVMSVGA3DSHADERFields, NULL); 532 533 AssertRCReturn(rc, rc); 533 534 534 535 Log(("Save pixelshader shid=%d with %x bytes code.\n", pShader->id, cbData)); 535 rc = SSMR3PutMem(pSSM, pShader->pShaderProgram, cbData);536 rc = pHlp->pfnSSMPutMem(pSSM, pShader->pShaderProgram, cbData); 536 537 AssertRCReturn(rc, rc); 537 538 } … … 544 545 545 546 /* Save the id first. */ 546 rc = SSMR3PutU32(pSSM, pShader->id);547 rc = pHlp->pfnSSMPutU32(pSSM, pShader->id); 547 548 AssertRCReturn(rc, rc); 548 549 … … 552 553 553 554 /* Save a copy of the shader struct. */ 554 rc = SSMR3PutStructEx(pSSM, pShader, sizeof(*pShader), 0, g_aVMSVGA3DSHADERFields, NULL);555 rc = pHlp->pfnSSMPutStructEx(pSSM, pShader, sizeof(*pShader), 0, g_aVMSVGA3DSHADERFields, NULL); 555 556 AssertRCReturn(rc, rc); 556 557 557 558 Log(("Save vertex shader shid=%d with %x bytes code.\n", pShader->id, cbData)); 558 559 /* Fetch the shader code and save it. */ 559 rc = SSMR3PutMem(pSSM, pShader->pShaderProgram, cbData);560 rc = pHlp->pfnSSMPutMem(pSSM, pShader->pShaderProgram, cbData); 560 561 AssertRCReturn(rc, rc); 561 562 } … … 565 566 for (uint32_t j = 0; j < pContext->state.cPixelShaderConst; j++) 566 567 { 567 rc = SSMR3PutStructEx(pSSM, &pContext->state.paPixelShaderConst[j], sizeof(pContext->state.paPixelShaderConst[j]), 0, g_aVMSVGASHADERCONSTFields, NULL);568 rc = pHlp->pfnSSMPutStructEx(pSSM, &pContext->state.paPixelShaderConst[j], sizeof(pContext->state.paPixelShaderConst[j]), 0, g_aVMSVGASHADERCONSTFields, NULL); 568 569 AssertRCReturn(rc, rc); 569 570 } … … 572 573 for (uint32_t j = 0; j < pContext->state.cVertexShaderConst; j++) 573 574 { 574 rc = SSMR3PutStructEx(pSSM, &pContext->state.paVertexShaderConst[j], sizeof(pContext->state.paVertexShaderConst[j]), 0, g_aVMSVGASHADERCONSTFields, NULL);575 rc = pHlp->pfnSSMPutStructEx(pSSM, &pContext->state.paVertexShaderConst[j], sizeof(pContext->state.paVertexShaderConst[j]), 0, g_aVMSVGASHADERCONSTFields, NULL); 575 576 AssertRCReturn(rc, rc); 576 577 } … … 579 580 580 581 /* Number of stages/samplers. */ 581 rc = SSMR3PutU32(pSSM, RT_ELEMENTS(pContext->state.aTextureStates));582 rc = pHlp->pfnSSMPutU32(pSSM, RT_ELEMENTS(pContext->state.aTextureStates)); 582 583 AssertRCReturn(rc, rc); 583 584 584 585 /* Number of texture states. */ 585 rc = SSMR3PutU32(pSSM, RT_ELEMENTS(pContext->state.aTextureStates[0]));586 rc = pHlp->pfnSSMPutU32(pSSM, RT_ELEMENTS(pContext->state.aTextureStates[0])); 586 587 AssertRCReturn(rc, rc); 587 588 … … 592 593 SVGA3dTextureState *pTextureState = &pContext->state.aTextureStates[iStage][j]; 593 594 594 SSMR3PutU32(pSSM, pTextureState->stage);595 SSMR3PutU32(pSSM, pTextureState->name);596 rc = SSMR3PutU32(pSSM, pTextureState->value);595 pHlp->pfnSSMPutU32(pSSM, pTextureState->stage); 596 pHlp->pfnSSMPutU32(pSSM, pTextureState->name); 597 rc = pHlp->pfnSSMPutU32(pSSM, pTextureState->value); 597 598 AssertRCReturn(rc, rc); 598 599 } … … 629 630 } 630 631 631 rc = SSMR3PutStructEx(pSSM, &pContext->occlusion, sizeof(pContext->occlusion), 0, g_aVMSVGA3DQUERYFields, NULL);632 rc = pHlp->pfnSSMPutStructEx(pSSM, &pContext->occlusion, sizeof(pContext->occlusion), 0, g_aVMSVGA3DQUERYFields, NULL); 632 633 AssertRCReturn(rc, rc); 633 634 } … … 636 637 } 637 638 638 int vmsvga3dSaveExec(P VGASTATE pThis, PSSMHANDLE pSSM)639 int vmsvga3dSaveExec(PPDMDEVINS pDevIns, PVGASTATE pThis, PSSMHANDLE pSSM) 639 640 { 640 PVMSVGA3DSTATE pState = pThis->svga.p3dState;641 PVMSVGA3DSTATE pState = pThis->svga.p3dState; 641 642 AssertReturn(pState, VERR_NO_MEMORY); 642 int rc; 643 PCPDMDEVHLPR3 pHlp = pDevIns->pHlpR3; 644 int rc; 643 645 644 646 /* Save a copy of the generic 3d state first. */ 645 rc = SSMR3PutStructEx(pSSM, pState, sizeof(*pState), 0, g_aVMSVGA3DSTATEFields, NULL);647 rc = pHlp->pfnSSMPutStructEx(pSSM, pState, sizeof(*pState), 0, g_aVMSVGA3DSTATEFields, NULL); 646 648 AssertRCReturn(rc, rc); 647 649 … … 650 652 if (pState->SharedCtx.id == VMSVGA3D_SHARED_CTX_ID) 651 653 { 652 rc = vmsvga3dSaveContext(p This, pSSM, &pState->SharedCtx);654 rc = vmsvga3dSaveContext(pHlp, pThis, pSSM, &pState->SharedCtx); 653 655 AssertRCReturn(rc, rc); 654 656 } … … 658 660 for (uint32_t i = 0; i < pState->cContexts; i++) 659 661 { 660 rc = vmsvga3dSaveContext(p This, pSSM, pState->papContexts[i]);662 rc = vmsvga3dSaveContext(pHlp, pThis, pSSM, pState->papContexts[i]); 661 663 AssertRCReturn(rc, rc); 662 664 } … … 668 670 669 671 /* Save the id first. */ 670 rc = SSMR3PutU32(pSSM, pSurface->id);672 rc = pHlp->pfnSSMPutU32(pSSM, pSurface->id); 671 673 AssertRCReturn(rc, rc); 672 674 … … 674 676 { 675 677 /* Save a copy of the surface structure first. */ 676 rc = SSMR3PutStructEx(pSSM, pSurface, sizeof(*pSurface), 0, g_aVMSVGA3DSURFACEFields, NULL);678 rc = pHlp->pfnSSMPutStructEx(pSSM, pSurface, sizeof(*pSurface), 0, g_aVMSVGA3DSURFACEFields, NULL); 677 679 AssertRCReturn(rc, rc); 678 680 … … 686 688 687 689 /* Save a copy of the mip map level struct. */ 688 rc = SSMR3PutStructEx(pSSM, pMipmapLevel, sizeof(*pMipmapLevel), 0, g_aVMSVGA3DMIPMAPLEVELFields, NULL);690 rc = pHlp->pfnSSMPutStructEx(pSSM, pMipmapLevel, sizeof(*pMipmapLevel), 0, g_aVMSVGA3DMIPMAPLEVELFields, NULL); 689 691 AssertRCReturn(rc, rc); 690 692 } … … 706 708 { 707 709 /* Data follows */ 708 rc = SSMR3PutBool(pSSM, true);710 rc = pHlp->pfnSSMPutBool(pSSM, true); 709 711 AssertRCReturn(rc, rc); 710 712 711 713 Assert(pMipmapLevel->cbSurface); 712 rc = SSMR3PutMem(pSSM, pMipmapLevel->pSurfaceData, pMipmapLevel->cbSurface);714 rc = pHlp->pfnSSMPutMem(pSSM, pMipmapLevel->pSurfaceData, pMipmapLevel->cbSurface); 713 715 AssertRCReturn(rc, rc); 714 716 } … … 716 718 { 717 719 /* No data follows */ 718 rc = SSMR3PutBool(pSSM, false);720 rc = pHlp->pfnSSMPutBool(pSSM, false); 719 721 AssertRCReturn(rc, rc); 720 722 } … … 861 863 { 862 864 /* Data follows */ 863 rc = SSMR3PutBool(pSSM, true);865 rc = pHlp->pfnSSMPutBool(pSSM, true); 864 866 AssertRCReturn(rc, rc); 865 867 866 868 /* And write the surface data. */ 867 rc = SSMR3PutMem(pSSM, pData, pMipmapLevel->cbSurface);869 rc = pHlp->pfnSSMPutMem(pSSM, pData, pMipmapLevel->cbSurface); 868 870 AssertRCReturn(rc, rc); 869 871 } … … 871 873 { 872 874 /* No data follows */ 873 rc = SSMR3PutBool(pSSM, false);875 rc = pHlp->pfnSSMPutBool(pSSM, false); 874 876 AssertRCReturn(rc, rc); 875 877 } … … 892 894 /** @todo fetch data from the renderbuffer. Not used currently. */ 893 895 /* No data follows */ 894 rc = SSMR3PutBool(pSSM, false);896 rc = pHlp->pfnSSMPutBool(pSSM, false); 895 897 AssertRCReturn(rc, rc); 896 898 break; … … 923 925 924 926 /* Data follows */ 925 rc = SSMR3PutBool(pSSM, true);927 rc = pHlp->pfnSSMPutBool(pSSM, true); 926 928 AssertRCReturn(rc, rc); 927 929 928 930 /* And write the surface data. */ 929 rc = SSMR3PutMem(pSSM, pData, pMipmapLevel->cbSurface);931 rc = pHlp->pfnSSMPutMem(pSSM, pData, pMipmapLevel->cbSurface); 930 932 AssertRCReturn(rc, rc); 931 933 … … 948 950 949 951 /* Data follows */ 950 rc = SSMR3PutBool(pSSM, true);952 rc = pHlp->pfnSSMPutBool(pSSM, true); 951 953 AssertRCReturn(rc, rc); 952 954 953 955 /* And write the surface data. */ 954 rc = SSMR3PutMem(pSSM, pBufferData, pMipmapLevel->cbSurface);956 rc = pHlp->pfnSSMPutMem(pSSM, pBufferData, pMipmapLevel->cbSurface); 955 957 AssertRCReturn(rc, rc); 956 958 -
trunk/src/VBox/Devices/Graphics/DevVGA-SVGA3d.h
r81980 r82048 58 58 int vmsvga3dInit(PVGASTATE pThis); 59 59 int vmsvga3dPowerOn(PVGASTATE pThis); 60 int vmsvga3dLoadExec(P VGASTATE pThis, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);61 int vmsvga3dSaveExec(P VGASTATE pThis, PSSMHANDLE pSSM);60 int vmsvga3dLoadExec(PPDMDEVINS pDevIns, PVGASTATE pThis, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass); 61 int vmsvga3dSaveExec(PPDMDEVINS pDevIns, PVGASTATE pThis, PSSMHANDLE pSSM); 62 62 int vmsvga3dTerminate(PVGASTATE pThis); 63 63 int vmsvga3dReset(PVGASTATE pThis); -
trunk/src/VBox/Devices/Graphics/DevVGA.cpp
r82043 r82048 2730 2730 } 2731 2731 2732 static void vga_save(P SSMHANDLE pSSM, PVGASTATE pThis)2732 static void vga_save(PCPDMDEVHLPR3 pHlp, PSSMHANDLE pSSM, PVGASTATE pThis) 2733 2733 { 2734 2734 int i; 2735 2735 2736 SSMR3PutU32(pSSM, pThis->latch);2737 SSMR3PutU8(pSSM, pThis->sr_index);2738 SSMR3PutMem(pSSM, pThis->sr, 8);2739 SSMR3PutU8(pSSM, pThis->gr_index);2740 SSMR3PutMem(pSSM, pThis->gr, 16);2741 SSMR3PutU8(pSSM, pThis->ar_index);2742 SSMR3PutMem(pSSM, pThis->ar, 21);2743 SSMR3PutU32(pSSM, pThis->ar_flip_flop);2744 SSMR3PutU8(pSSM, pThis->cr_index);2745 SSMR3PutMem(pSSM, pThis->cr, 256);2746 SSMR3PutU8(pSSM, pThis->msr);2747 SSMR3PutU8(pSSM, pThis->fcr);2748 SSMR3PutU8(pSSM, pThis->st00);2749 SSMR3PutU8(pSSM, pThis->st01);2750 2751 SSMR3PutU8(pSSM, pThis->dac_state);2752 SSMR3PutU8(pSSM, pThis->dac_sub_index);2753 SSMR3PutU8(pSSM, pThis->dac_read_index);2754 SSMR3PutU8(pSSM, pThis->dac_write_index);2755 SSMR3PutMem(pSSM, pThis->dac_cache, 3);2756 SSMR3PutMem(pSSM, pThis->palette, 768);2757 2758 SSMR3PutU32(pSSM, pThis->bank_offset);2736 pHlp->pfnSSMPutU32(pSSM, pThis->latch); 2737 pHlp->pfnSSMPutU8(pSSM, pThis->sr_index); 2738 pHlp->pfnSSMPutMem(pSSM, pThis->sr, 8); 2739 pHlp->pfnSSMPutU8(pSSM, pThis->gr_index); 2740 pHlp->pfnSSMPutMem(pSSM, pThis->gr, 16); 2741 pHlp->pfnSSMPutU8(pSSM, pThis->ar_index); 2742 pHlp->pfnSSMPutMem(pSSM, pThis->ar, 21); 2743 pHlp->pfnSSMPutU32(pSSM, pThis->ar_flip_flop); 2744 pHlp->pfnSSMPutU8(pSSM, pThis->cr_index); 2745 pHlp->pfnSSMPutMem(pSSM, pThis->cr, 256); 2746 pHlp->pfnSSMPutU8(pSSM, pThis->msr); 2747 pHlp->pfnSSMPutU8(pSSM, pThis->fcr); 2748 pHlp->pfnSSMPutU8(pSSM, pThis->st00); 2749 pHlp->pfnSSMPutU8(pSSM, pThis->st01); 2750 2751 pHlp->pfnSSMPutU8(pSSM, pThis->dac_state); 2752 pHlp->pfnSSMPutU8(pSSM, pThis->dac_sub_index); 2753 pHlp->pfnSSMPutU8(pSSM, pThis->dac_read_index); 2754 pHlp->pfnSSMPutU8(pSSM, pThis->dac_write_index); 2755 pHlp->pfnSSMPutMem(pSSM, pThis->dac_cache, 3); 2756 pHlp->pfnSSMPutMem(pSSM, pThis->palette, 768); 2757 2758 pHlp->pfnSSMPutU32(pSSM, pThis->bank_offset); 2759 2759 #ifdef CONFIG_BOCHS_VBE 2760 2760 AssertCompile(RT_ELEMENTS(pThis->vbe_regs) < 256); 2761 SSMR3PutU8(pSSM, (uint8_t)RT_ELEMENTS(pThis->vbe_regs));2762 SSMR3PutU16(pSSM, pThis->vbe_index);2761 pHlp->pfnSSMPutU8(pSSM, (uint8_t)RT_ELEMENTS(pThis->vbe_regs)); 2762 pHlp->pfnSSMPutU16(pSSM, pThis->vbe_index); 2763 2763 for(i = 0; i < (int)RT_ELEMENTS(pThis->vbe_regs); i++) 2764 SSMR3PutU16(pSSM, pThis->vbe_regs[i]);2765 SSMR3PutU32(pSSM, pThis->vbe_start_addr);2766 SSMR3PutU32(pSSM, pThis->vbe_line_offset);2764 pHlp->pfnSSMPutU16(pSSM, pThis->vbe_regs[i]); 2765 pHlp->pfnSSMPutU32(pSSM, pThis->vbe_start_addr); 2766 pHlp->pfnSSMPutU32(pSSM, pThis->vbe_line_offset); 2767 2767 #else 2768 SSMR3PutU8(pSSM, 0);2769 #endif 2770 } 2771 2772 static int vga_load(P SSMHANDLE pSSM, PVGASTATE pThis, int version_id)2768 pHlp->pfnSSMPutU8(pSSM, 0); 2769 #endif 2770 } 2771 2772 static int vga_load(PCPDMDEVHLPR3 pHlp, PSSMHANDLE pSSM, PVGASTATE pThis, int version_id) 2773 2773 { 2774 2774 int is_vbe, i; … … 2776 2776 uint8_t u8; 2777 2777 2778 SSMR3GetU32(pSSM, &pThis->latch);2779 SSMR3GetU8(pSSM, &pThis->sr_index);2780 SSMR3GetMem(pSSM, pThis->sr, 8);2781 SSMR3GetU8(pSSM, &pThis->gr_index);2782 SSMR3GetMem(pSSM, pThis->gr, 16);2783 SSMR3GetU8(pSSM, &pThis->ar_index);2784 SSMR3GetMem(pSSM, pThis->ar, 21);2785 SSMR3GetS32(pSSM, &pThis->ar_flip_flop);2786 SSMR3GetU8(pSSM, &pThis->cr_index);2787 SSMR3GetMem(pSSM, pThis->cr, 256);2788 SSMR3GetU8(pSSM, &pThis->msr);2789 SSMR3GetU8(pSSM, &pThis->fcr);2790 SSMR3GetU8(pSSM, &pThis->st00);2791 SSMR3GetU8(pSSM, &pThis->st01);2792 2793 SSMR3GetU8(pSSM, &pThis->dac_state);2794 SSMR3GetU8(pSSM, &pThis->dac_sub_index);2795 SSMR3GetU8(pSSM, &pThis->dac_read_index);2796 SSMR3GetU8(pSSM, &pThis->dac_write_index);2797 SSMR3GetMem(pSSM, pThis->dac_cache, 3);2798 SSMR3GetMem(pSSM, pThis->palette, 768);2799 2800 SSMR3GetS32(pSSM, &pThis->bank_offset);2801 SSMR3GetU8(pSSM, &u8);2778 pHlp->pfnSSMGetU32(pSSM, &pThis->latch); 2779 pHlp->pfnSSMGetU8(pSSM, &pThis->sr_index); 2780 pHlp->pfnSSMGetMem(pSSM, pThis->sr, 8); 2781 pHlp->pfnSSMGetU8(pSSM, &pThis->gr_index); 2782 pHlp->pfnSSMGetMem(pSSM, pThis->gr, 16); 2783 pHlp->pfnSSMGetU8(pSSM, &pThis->ar_index); 2784 pHlp->pfnSSMGetMem(pSSM, pThis->ar, 21); 2785 pHlp->pfnSSMGetS32(pSSM, &pThis->ar_flip_flop); 2786 pHlp->pfnSSMGetU8(pSSM, &pThis->cr_index); 2787 pHlp->pfnSSMGetMem(pSSM, pThis->cr, 256); 2788 pHlp->pfnSSMGetU8(pSSM, &pThis->msr); 2789 pHlp->pfnSSMGetU8(pSSM, &pThis->fcr); 2790 pHlp->pfnSSMGetU8(pSSM, &pThis->st00); 2791 pHlp->pfnSSMGetU8(pSSM, &pThis->st01); 2792 2793 pHlp->pfnSSMGetU8(pSSM, &pThis->dac_state); 2794 pHlp->pfnSSMGetU8(pSSM, &pThis->dac_sub_index); 2795 pHlp->pfnSSMGetU8(pSSM, &pThis->dac_read_index); 2796 pHlp->pfnSSMGetU8(pSSM, &pThis->dac_write_index); 2797 pHlp->pfnSSMGetMem(pSSM, pThis->dac_cache, 3); 2798 pHlp->pfnSSMGetMem(pSSM, pThis->palette, 768); 2799 2800 pHlp->pfnSSMGetS32(pSSM, &pThis->bank_offset); 2801 pHlp->pfnSSMGetU8(pSSM, &u8); 2802 2802 is_vbe = !!u8; 2803 2803 #ifdef CONFIG_BOCHS_VBE … … 2816 2816 } 2817 2817 2818 SSMR3GetU16(pSSM, &pThis->vbe_index);2818 pHlp->pfnSSMGetU16(pSSM, &pThis->vbe_index); 2819 2819 for(i = 0; i < (int)u8; i++) 2820 SSMR3GetU16(pSSM, &pThis->vbe_regs[i]);2820 pHlp->pfnSSMGetU16(pSSM, &pThis->vbe_regs[i]); 2821 2821 if (version_id <= VGA_SAVEDSTATE_VERSION_INV_VHEIGHT) 2822 2822 recalculate_data(pThis); /* <- re-calculate the pThis->vbe_regs[VBE_DISPI_INDEX_VIRT_HEIGHT] since it might be invalid */ 2823 SSMR3GetU32(pSSM, &pThis->vbe_start_addr);2824 SSMR3GetU32(pSSM, &pThis->vbe_line_offset);2823 pHlp->pfnSSMGetU32(pSSM, &pThis->vbe_start_addr); 2824 pHlp->pfnSSMGetU32(pSSM, &pThis->vbe_line_offset); 2825 2825 if (version_id < 2) 2826 SSMR3GetU32(pSSM, &u32Dummy);2826 pHlp->pfnSSMGetU32(pSSM, &u32Dummy); 2827 2827 pThis->vbe_bank_max = (pThis->vram_size >> 16) - 1; 2828 2828 #else … … 5654 5654 * Saves a important bits of the VGA device config. 5655 5655 * 5656 * @param pHlp The device helpers (for SSM functions). 5656 5657 * @param pThis The VGA instance data. 5657 5658 * @param pSSM The saved state handle. 5658 5659 */ 5659 static void vgaR3SaveConfig(P VGASTATE pThis, PSSMHANDLE pSSM)5660 { 5661 SSMR3PutU32(pSSM, pThis->vram_size);5662 SSMR3PutU32(pSSM, pThis->cMonitors);5660 static void vgaR3SaveConfig(PCPDMDEVHLPR3 pHlp, PVGASTATE pThis, PSSMHANDLE pSSM) 5661 { 5662 pHlp->pfnSSMPutU32(pSSM, pThis->vram_size); 5663 pHlp->pfnSSMPutU32(pSSM, pThis->cMonitors); 5663 5664 } 5664 5665 … … 5671 5672 PVGASTATE pThis = PDMDEVINS_2_DATA(pDevIns, PVGASTATE); 5672 5673 Assert(uPass == 0); NOREF(uPass); 5673 vgaR3SaveConfig(p This, pSSM);5674 vgaR3SaveConfig(pDevIns->pHlpR3, pThis, pSSM); 5674 5675 return VINF_SSM_DONT_CALL_AGAIN; 5675 5676 } … … 5709 5710 static DECLCALLBACK(int) vgaR3SaveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM) 5710 5711 { 5711 PVGASTATE pThis = PDMDEVINS_2_DATA(pDevIns, PVGASTATE); 5712 PVGASTATE pThis = PDMDEVINS_2_DATA(pDevIns, PVGASTATE); 5713 PCPDMDEVHLPR3 pHlp = pDevIns->pHlpR3; 5712 5714 5713 5715 #ifdef VBOX_WITH_VDMA … … 5715 5717 #endif 5716 5718 5717 vgaR3SaveConfig(p This, pSSM);5718 vga_save(p SSM, PDMDEVINS_2_DATA(pDevIns, PVGASTATE));5719 vgaR3SaveConfig(pHlp, pThis, pSSM); 5720 vga_save(pHlp, pSSM, PDMDEVINS_2_DATA(pDevIns, PVGASTATE)); 5719 5721 5720 5722 VGA_SAVED_STATE_PUT_MARKER(pSSM, 1); 5721 5723 #ifdef VBOX_WITH_HGSMI 5722 SSMR3PutBool(pSSM, true);5724 pHlp->pfnSSMPutBool(pSSM, true); 5723 5725 int rc = vboxVBVASaveStateExec(pDevIns, pSSM); 5724 5726 #else 5725 int rc = SSMR3PutBool(pSSM, false);5727 int rc = pHlp->pfnSSMPutBool(pSSM, false); 5726 5728 #endif 5727 5729 … … 5730 5732 VGA_SAVED_STATE_PUT_MARKER(pSSM, 3); 5731 5733 #ifdef VBOX_WITH_VDMA 5732 rc = SSMR3PutU32(pSSM, 1);5734 rc = pHlp->pfnSSMPutU32(pSSM, 1); 5733 5735 AssertRCReturn(rc, rc); 5734 rc = vboxVDMASaveStateExecPerform(p This->pVdma, pSSM);5736 rc = vboxVDMASaveStateExecPerform(pHlp, pThis->pVdma, pSSM); 5735 5737 #else 5736 rc = SSMR3PutU32(pSSM, 0);5738 rc = pHlp->pfnSSMPutU32(pSSM, 0); 5737 5739 #endif 5738 5740 AssertRCReturn(rc, rc); … … 5761 5763 static DECLCALLBACK(int) vgaR3LoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass) 5762 5764 { 5763 PVGASTATE pThis = PDMDEVINS_2_DATA(pDevIns, PVGASTATE); 5764 int rc; 5765 PVGASTATE pThis = PDMDEVINS_2_DATA(pDevIns, PVGASTATE); 5766 PCPDMDEVHLPR3 pHlp = pDevIns->pHlpR3; 5767 int rc; 5765 5768 5766 5769 if (uVersion < VGA_SAVEDSTATE_VERSION_ANCIENT || uVersion > VGA_SAVEDSTATE_VERSION) … … 5771 5774 /* Check the config */ 5772 5775 uint32_t cbVRam; 5773 rc = SSMR3GetU32(pSSM, &cbVRam);5776 rc = pHlp->pfnSSMGetU32(pSSM, &cbVRam); 5774 5777 AssertRCReturn(rc, rc); 5775 5778 if (pThis->vram_size != cbVRam) 5776 return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("VRAM size changed: config=%#x state=%#x"), pThis->vram_size, cbVRam);5779 return pHlp->pfnSSMSetCfgError(pSSM, RT_SRC_POS, N_("VRAM size changed: config=%#x state=%#x"), pThis->vram_size, cbVRam); 5777 5780 5778 5781 uint32_t cMonitors; 5779 rc = SSMR3GetU32(pSSM, &cMonitors);5782 rc = pHlp->pfnSSMGetU32(pSSM, &cMonitors); 5780 5783 AssertRCReturn(rc, rc); 5781 5784 if (pThis->cMonitors != cMonitors) 5782 return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("Monitor count changed: config=%u state=%u"), pThis->cMonitors, cMonitors);5785 return pHlp->pfnSSMSetCfgError(pSSM, RT_SRC_POS, N_("Monitor count changed: config=%u state=%u"), pThis->cMonitors, cMonitors); 5783 5786 } 5784 5787 5785 5788 if (uPass == SSM_PASS_FINAL) 5786 5789 { 5787 rc = vga_load(p SSM, pThis, uVersion);5790 rc = vga_load(pHlp, pSSM, pThis, uVersion); 5788 5791 if (RT_FAILURE(rc)) 5789 5792 return rc; … … 5796 5799 if (uVersion > VGA_SAVEDSTATE_VERSION_HGSMI) 5797 5800 { 5798 rc = SSMR3GetBool(pSSM, &fWithHgsmi);5801 rc = pHlp->pfnSSMGetBool(pSSM, &fWithHgsmi); 5799 5802 AssertRCReturn(rc, rc); 5800 5803 } … … 5805 5808 AssertRCReturn(rc, rc); 5806 5809 #else 5807 return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("HGSMI is not compiled in, but it is present in the saved state"));5810 return pHlp->pfnSSMSetCfgError(pSSM, RT_SRC_POS, N_("HGSMI is not compiled in, but it is present in the saved state")); 5808 5811 #endif 5809 5812 } … … 5813 5816 { 5814 5817 uint32_t u32; 5815 rc = SSMR3GetU32(pSSM, &u32);5818 rc = pHlp->pfnSSMGetU32(pSSM, &u32); 5816 5819 if (u32) 5817 5820 { … … 5819 5822 if (u32 == 1) 5820 5823 { 5821 rc = vboxVDMASaveLoadExecPerform(p This->pVdma, pSSM, uVersion);5824 rc = vboxVDMASaveLoadExecPerform(pHlp, pThis->pVdma, pSSM, uVersion); 5822 5825 AssertRCReturn(rc, rc); 5823 5826 } -
trunk/src/VBox/Devices/Graphics/DevVGA.h
r82043 r82048 576 576 int vboxVDMASaveStateExecPrep(struct VBOXVDMAHOST *pVdma); 577 577 int vboxVDMASaveStateExecDone(struct VBOXVDMAHOST *pVdma); 578 int vboxVDMASaveStateExecPerform( struct VBOXVDMAHOST *pVdma, PSSMHANDLE pSSM);579 int vboxVDMASaveLoadExecPerform( struct VBOXVDMAHOST *pVdma, PSSMHANDLE pSSM, uint32_t u32Version);578 int vboxVDMASaveStateExecPerform(PCPDMDEVHLPR3 pHlp, struct VBOXVDMAHOST *pVdma, PSSMHANDLE pSSM); 579 int vboxVDMASaveLoadExecPerform(PCPDMDEVHLPR3 pHlp, struct VBOXVDMAHOST *pVdma, PSSMHANDLE pSSM, uint32_t u32Version); 580 580 int vboxVDMASaveLoadDone(struct VBOXVDMAHOST *pVdma); 581 581 # endif /* VBOX_WITH_VDMA */ -
trunk/src/VBox/Devices/Graphics/DevVGASavedState.h
r76565 r82048 30 30 /** Puts a marker. Status code is not checked. */ 31 31 #define VGA_SAVED_STATE_PUT_MARKER(pSSM, uSub) \ 32 do { SSMR3PutU64(pSSM, VGA_SAVED_STATE_MAKE_MARKER(uSub)); } while (0)32 do { pHlp->pfnSSMPutU64(pSSM, VGA_SAVED_STATE_MAKE_MARKER(uSub)); } while (0) 33 33 34 34 /** Retrieves a VGA saved state marker and checks that it matches, if it … … 39 39 { \ 40 40 uint64_t uMarker; \ 41 int rcMarker = SSMR3GetU64(pSSM, &uMarker); \41 int rcMarker = pHlp->pfnSSMGetU64(pSSM, &uMarker); \ 42 42 AssertLogRelRCReturn(rcMarker, rcMarker); \ 43 43 AssertLogRelMsgReturn(uMarker == VGA_SAVED_STATE_MAKE_MARKER(uSub), \ -
trunk/src/VBox/Devices/Graphics/DevVGA_VBVA.cpp
r80872 r82048 993 993 } 994 994 995 static int vbvaVHWACommandSavePending(P VGASTATE pVGAState, PSSMHANDLE pSSM)996 { 997 int rc = SSMR3PutU32(pSSM, pVGAState->pendingVhwaCommands.cPending);995 static int vbvaVHWACommandSavePending(PCPDMDEVHLPR3 pHlp, PVGASTATE pVGAState, PSSMHANDLE pSSM) 996 { 997 int rc = pHlp->pfnSSMPutU32(pSSM, pVGAState->pendingVhwaCommands.cPending); 998 998 AssertRCReturn(rc, rc); 999 999 … … 1002 1002 { 1003 1003 AssertContinue((uintptr_t)pIter->pCommand - (uintptr_t)pVGAState->vram_ptrR3 < pVGAState->vram_size); 1004 rc = SSMR3PutU32(pSSM, (uint32_t)(((uint8_t *)pIter->pCommand) - ((uint8_t *)pVGAState->vram_ptrR3)));1004 rc = pHlp->pfnSSMPutU32(pSSM, (uint32_t)(((uint8_t *)pIter->pCommand) - ((uint8_t *)pVGAState->vram_ptrR3))); 1005 1005 AssertRCReturn(rc, rc); 1006 1006 } … … 1008 1008 } 1009 1009 1010 static int vbvaVHWACommandLoadPending(P VGASTATE pVGAState, PSSMHANDLE pSSM, uint32_t u32Version)1010 static int vbvaVHWACommandLoadPending(PCPDMDEVHLPR3 pHlp, PVGASTATE pVGAState, PSSMHANDLE pSSM, uint32_t u32Version) 1011 1011 { 1012 1012 if (u32Version < VGA_SAVEDSTATE_VERSION_WITH_PENDVHWA) … … 1014 1014 1015 1015 uint32_t u32; 1016 int rc = SSMR3GetU32(pSSM, &u32);1016 int rc = pHlp->pfnSSMGetU32(pSSM, &u32); 1017 1017 AssertRCReturn(rc, rc); 1018 1018 for (uint32_t i = 0; i < u32; ++i) 1019 1019 { 1020 1020 uint32_t off32; 1021 rc = SSMR3GetU32(pSSM, &off32);1021 rc = pHlp->pfnSSMGetU32(pSSM, &off32); 1022 1022 AssertRCReturn(rc, rc); 1023 1023 VBOXVHWACMD RT_UNTRUSTED_VOLATILE_GUEST *pCommand … … 1498 1498 1499 1499 int rc; 1500 PCPDMDEVHLPR3 pHlp = pVGAState->pDevInsR3->pHlpR3; 1500 1501 1501 1502 if (pData->ab2DOn[iDisplay]) 1502 1503 { 1503 rc = SSMR3PutU32(pData->pSSM, VBOXVBVASAVEDSTATE_VHWAAVAILABLE_MAGIC); AssertRC(rc);1504 rc = pHlp->pfnSSMPutU32(pData->pSSM, VBOXVBVASAVEDSTATE_VHWAAVAILABLE_MAGIC); AssertRC(rc); 1504 1505 if (RT_FAILURE(rc)) 1505 1506 { … … 1510 1511 } 1511 1512 1512 rc = SSMR3PutU32(pData->pSSM, VBOXVBVASAVEDSTATE_VHWAUNAVAILABLE_MAGIC); AssertRC(rc);1513 rc = pHlp->pfnSSMPutU32(pData->pSSM, VBOXVBVASAVEDSTATE_VHWAUNAVAILABLE_MAGIC); AssertRC(rc); 1513 1514 if (RT_FAILURE(rc)) 1514 1515 { … … 1553 1554 } 1554 1555 1556 PCPDMDEVHLPR3 pHlp = pVGAState->pDevInsR3->pHlpR3; 1555 1557 Assert(RT_SUCCESS(pCmd->rc) || pCmd->rc == VERR_NOT_IMPLEMENTED); 1556 1558 if (pCmd->rc == VERR_NOT_IMPLEMENTED) 1557 1559 { 1558 pData->rc = SSMR3SkipToEndOfUnit(pData->pSSM);1560 pData->rc = pHlp->pfnSSMSkipToEndOfUnit(pData->pSSM); 1559 1561 AssertRC(pData->rc); 1560 1562 return false; … … 1584 1586 } 1585 1587 1588 PCPDMDEVHLPR3 pHlp = pVGAState->pDevInsR3->pHlpR3; 1586 1589 int rc; 1587 1590 uint32_t u32; 1588 rc = SSMR3GetU32(pData->pSSM, &u32); AssertRC(rc);1591 rc = pHlp->pfnSSMGetU32(pData->pSSM, &u32); AssertRC(rc); 1589 1592 if (RT_FAILURE(rc)) 1590 1593 { … … 1608 1611 #endif /* #ifdef VBOX_WITH_VIDEOHWACCEL */ 1609 1612 1610 int vboxVBVASaveDevStateExec (PVGASTATE pVGAState, PSSMHANDLE pSSM)1613 int vboxVBVASaveDevStateExec(PCPDMDEVHLPR3 pHlp, PVGASTATE pVGAState, PSSMHANDLE pSSM) 1611 1614 { 1612 1615 PHGSMIINSTANCE pIns = pVGAState->pHGSMI; 1613 int rc = HGSMIHostSaveStateExec (pIns, pSSM);1616 int rc = HGSMIHostSaveStateExec(pHlp, pIns, pSSM); 1614 1617 if (RT_SUCCESS(rc)) 1615 1618 { … … 1624 1627 1625 1628 /* Still write a valid value to the SSM. */ 1626 rc = SSMR3PutU32 (pSSM, 0);1629 rc = pHlp->pfnSSMPutU32 (pSSM, 0); 1627 1630 AssertRCReturn(rc, rc); 1628 1631 } … … 1633 1636 #endif 1634 1637 1635 rc = SSMR3PutU32 (pSSM, pCtx->cViews);1638 rc = pHlp->pfnSSMPutU32 (pSSM, pCtx->cViews); 1636 1639 AssertRCReturn(rc, rc); 1637 1640 … … 1641 1644 VBVAVIEW *pView = &pCtx->aViews[iView]; 1642 1645 1643 rc = SSMR3PutU32(pSSM, pView->view.u32ViewIndex);1644 AssertRCReturn(rc, rc); 1645 rc = SSMR3PutU32(pSSM, pView->view.u32ViewOffset);1646 AssertRCReturn(rc, rc); 1647 rc = SSMR3PutU32(pSSM, pView->view.u32ViewSize);1648 AssertRCReturn(rc, rc); 1649 rc = SSMR3PutU32(pSSM, pView->view.u32MaxScreenSize);1650 AssertRCReturn(rc, rc); 1651 1652 rc = SSMR3PutU32(pSSM, pView->screen.u32ViewIndex);1653 AssertRCReturn(rc, rc); 1654 rc = SSMR3PutS32(pSSM, pView->screen.i32OriginX);1655 AssertRCReturn(rc, rc); 1656 rc = SSMR3PutS32(pSSM, pView->screen.i32OriginY);1657 AssertRCReturn(rc, rc); 1658 rc = SSMR3PutU32(pSSM, pView->screen.u32StartOffset);1659 AssertRCReturn(rc, rc); 1660 rc = SSMR3PutU32(pSSM, pView->screen.u32LineSize);1661 AssertRCReturn(rc, rc); 1662 rc = SSMR3PutU32(pSSM, pView->screen.u32Width);1663 AssertRCReturn(rc, rc); 1664 rc = SSMR3PutU32(pSSM, pView->screen.u32Height);1665 AssertRCReturn(rc, rc); 1666 rc = SSMR3PutU16(pSSM, pView->screen.u16BitsPerPixel);1667 AssertRCReturn(rc, rc); 1668 rc = SSMR3PutU16(pSSM, pView->screen.u16Flags);1669 AssertRCReturn(rc, rc); 1670 1671 rc = SSMR3PutU32(pSSM, pView->vbva.guest.pVBVA? pView->vbva.u32VBVAOffset: HGSMIOFFSET_VOID);1672 AssertRCReturn(rc, rc); 1673 1674 rc = SSMR3PutU32(pSSM, pView->vbva.partialRecord.cb);1646 rc = pHlp->pfnSSMPutU32(pSSM, pView->view.u32ViewIndex); 1647 AssertRCReturn(rc, rc); 1648 rc = pHlp->pfnSSMPutU32(pSSM, pView->view.u32ViewOffset); 1649 AssertRCReturn(rc, rc); 1650 rc = pHlp->pfnSSMPutU32(pSSM, pView->view.u32ViewSize); 1651 AssertRCReturn(rc, rc); 1652 rc = pHlp->pfnSSMPutU32(pSSM, pView->view.u32MaxScreenSize); 1653 AssertRCReturn(rc, rc); 1654 1655 rc = pHlp->pfnSSMPutU32(pSSM, pView->screen.u32ViewIndex); 1656 AssertRCReturn(rc, rc); 1657 rc = pHlp->pfnSSMPutS32(pSSM, pView->screen.i32OriginX); 1658 AssertRCReturn(rc, rc); 1659 rc = pHlp->pfnSSMPutS32(pSSM, pView->screen.i32OriginY); 1660 AssertRCReturn(rc, rc); 1661 rc = pHlp->pfnSSMPutU32(pSSM, pView->screen.u32StartOffset); 1662 AssertRCReturn(rc, rc); 1663 rc = pHlp->pfnSSMPutU32(pSSM, pView->screen.u32LineSize); 1664 AssertRCReturn(rc, rc); 1665 rc = pHlp->pfnSSMPutU32(pSSM, pView->screen.u32Width); 1666 AssertRCReturn(rc, rc); 1667 rc = pHlp->pfnSSMPutU32(pSSM, pView->screen.u32Height); 1668 AssertRCReturn(rc, rc); 1669 rc = pHlp->pfnSSMPutU16(pSSM, pView->screen.u16BitsPerPixel); 1670 AssertRCReturn(rc, rc); 1671 rc = pHlp->pfnSSMPutU16(pSSM, pView->screen.u16Flags); 1672 AssertRCReturn(rc, rc); 1673 1674 rc = pHlp->pfnSSMPutU32(pSSM, pView->vbva.guest.pVBVA? pView->vbva.u32VBVAOffset: HGSMIOFFSET_VOID); 1675 AssertRCReturn(rc, rc); 1676 1677 rc = pHlp->pfnSSMPutU32(pSSM, pView->vbva.partialRecord.cb); 1675 1678 AssertRCReturn(rc, rc); 1676 1679 1677 1680 if (pView->vbva.partialRecord.cb > 0) 1678 1681 { 1679 rc = SSMR3PutMem(pSSM, pView->vbva.partialRecord.pu8, pView->vbva.partialRecord.cb);1682 rc = pHlp->pfnSSMPutMem(pSSM, pView->vbva.partialRecord.pu8, pView->vbva.partialRecord.cb); 1680 1683 AssertRCReturn(rc, rc); 1681 1684 } … … 1683 1686 1684 1687 /* Save mouse pointer shape information. */ 1685 rc = SSMR3PutBool(pSSM, pCtx->mouseShapeInfo.fSet);1688 rc = pHlp->pfnSSMPutBool(pSSM, pCtx->mouseShapeInfo.fSet); 1686 1689 AssertRCReturn(rc, rc); 1687 rc = SSMR3PutBool(pSSM, pCtx->mouseShapeInfo.fVisible);1690 rc = pHlp->pfnSSMPutBool(pSSM, pCtx->mouseShapeInfo.fVisible); 1688 1691 AssertRCReturn(rc, rc); 1689 rc = SSMR3PutBool(pSSM, pCtx->mouseShapeInfo.fAlpha);1692 rc = pHlp->pfnSSMPutBool(pSSM, pCtx->mouseShapeInfo.fAlpha); 1690 1693 AssertRCReturn(rc, rc); 1691 rc = SSMR3PutU32(pSSM, pCtx->mouseShapeInfo.u32HotX);1694 rc = pHlp->pfnSSMPutU32(pSSM, pCtx->mouseShapeInfo.u32HotX); 1692 1695 AssertRCReturn(rc, rc); 1693 rc = SSMR3PutU32(pSSM, pCtx->mouseShapeInfo.u32HotY);1696 rc = pHlp->pfnSSMPutU32(pSSM, pCtx->mouseShapeInfo.u32HotY); 1694 1697 AssertRCReturn(rc, rc); 1695 rc = SSMR3PutU32(pSSM, pCtx->mouseShapeInfo.u32Width);1698 rc = pHlp->pfnSSMPutU32(pSSM, pCtx->mouseShapeInfo.u32Width); 1696 1699 AssertRCReturn(rc, rc); 1697 rc = SSMR3PutU32(pSSM, pCtx->mouseShapeInfo.u32Height);1700 rc = pHlp->pfnSSMPutU32(pSSM, pCtx->mouseShapeInfo.u32Height); 1698 1701 AssertRCReturn(rc, rc); 1699 rc = SSMR3PutU32(pSSM, pCtx->mouseShapeInfo.cbShape);1702 rc = pHlp->pfnSSMPutU32(pSSM, pCtx->mouseShapeInfo.cbShape); 1700 1703 AssertRCReturn(rc, rc); 1701 1704 if (pCtx->mouseShapeInfo.cbShape) 1702 1705 { 1703 rc = SSMR3PutMem(pSSM, pCtx->mouseShapeInfo.pu8Shape, pCtx->mouseShapeInfo.cbShape);1706 rc = pHlp->pfnSSMPutMem(pSSM, pCtx->mouseShapeInfo.pu8Shape, pCtx->mouseShapeInfo.cbShape); 1704 1707 AssertRCReturn(rc, rc); 1705 1708 } … … 1707 1710 #ifdef VBOX_WITH_WDDM 1708 1711 /* Size of some additional data. For future extensions. */ 1709 rc = SSMR3PutU32(pSSM, 4);1712 rc = pHlp->pfnSSMPutU32(pSSM, 4); 1710 1713 AssertRCReturn(rc, rc); 1711 rc = SSMR3PutU32(pSSM, pVGAState->fGuestCaps);1714 rc = pHlp->pfnSSMPutU32(pSSM, pVGAState->fGuestCaps); 1712 1715 AssertRCReturn(rc, rc); 1713 1716 #else 1714 1717 /* Size of some additional data. For future extensions. */ 1715 rc = SSMR3PutU32(pSSM, 0);1718 rc = pHlp->pfnSSMPutU32(pSSM, 0); 1716 1719 AssertRCReturn(rc, rc); 1717 1720 #endif 1718 rc = SSMR3PutU32(pSSM, RT_ELEMENTS(pCtx->aModeHints));1721 rc = pHlp->pfnSSMPutU32(pSSM, RT_ELEMENTS(pCtx->aModeHints)); 1719 1722 AssertRCReturn(rc, rc); 1720 rc = SSMR3PutU32(pSSM, sizeof(VBVAMODEHINT));1723 rc = pHlp->pfnSSMPutU32(pSSM, sizeof(VBVAMODEHINT)); 1721 1724 AssertRCReturn(rc, rc); 1722 1725 for (unsigned i = 0; i < RT_ELEMENTS(pCtx->aModeHints); ++i) 1723 1726 { 1724 rc = SSMR3PutMem (pSSM, &pCtx->aModeHints[i], 1725 sizeof(VBVAMODEHINT)); 1727 rc = pHlp->pfnSSMPutMem(pSSM, &pCtx->aModeHints[i], sizeof(VBVAMODEHINT)); 1726 1728 AssertRCReturn(rc, rc); 1727 1729 } … … 1732 1734 } 1733 1735 1734 int vboxVBVASaveStateExec (PPDMDEVINS pDevIns, PSSMHANDLE pSSM) 1735 { 1736 PVGASTATE pVGAState = PDMINS_2_DATA(pDevIns, PVGASTATE); 1736 int vboxVBVASaveStateExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM) 1737 { 1738 PVGASTATE pVGAState = PDMINS_2_DATA(pDevIns, PVGASTATE); 1739 PCPDMDEVHLPR3 pHlp = pDevIns->pHlpR3; 1737 1740 int rc; 1738 1741 #ifdef VBOX_WITH_VIDEOHWACCEL … … 1744 1747 if(pCmd) 1745 1748 { 1746 vbvaVHWAHHPost 1749 vbvaVHWAHHPost(pVGAState, pCmd, NULL, vboxVBVASaveStateBeginPostCb, &VhwaData); 1747 1750 rc = VhwaData.rc; 1748 1751 AssertRC(rc); … … 1750 1753 { 1751 1754 #endif 1752 rc = vboxVBVASaveDevStateExec (pVGAState, pSSM);1755 rc = vboxVBVASaveDevStateExec(pHlp, pVGAState, pSSM); 1753 1756 AssertRC(rc); 1754 1757 #ifdef VBOX_WITH_VIDEOHWACCEL … … 1758 1761 VBOXVHWACMD_HH_SAVESTATE_SAVEPERFORM *pSave = VBOXVHWACMD_BODY_HOST_HEAP(pCmd, VBOXVHWACMD_HH_SAVESTATE_SAVEPERFORM); 1759 1762 pSave->pSSM = pSSM; 1760 vbvaVHWAHHPost 1763 vbvaVHWAHHPost(pVGAState, pCmd, vboxVBVASaveStatePerformPreCb, NULL, &VhwaData); 1761 1764 rc = VhwaData.rc; 1762 1765 AssertRC(rc); 1763 1766 if (RT_SUCCESS(rc)) 1764 1767 { 1765 rc = vbvaVHWACommandSavePending(p VGAState, pSSM);1768 rc = vbvaVHWACommandSavePending(pHlp, pVGAState, pSSM); 1766 1769 AssertRCReturn(rc, rc); 1767 1770 1768 1771 vbvaVHWAHHCommandReinit(pCmd, VBOXVHWACMD_TYPE_HH_SAVESTATE_SAVEEND, 0); 1769 vbvaVHWAHHPost 1772 vbvaVHWAHHPost(pVGAState, pCmd, vboxVBVASaveStateEndPreCb, NULL, &VhwaData); 1770 1773 rc = VhwaData.rc; 1771 1774 AssertRC(rc); … … 1783 1786 for (uint32_t i = 0; i < pVGAState->cMonitors; ++i) 1784 1787 { 1785 rc = SSMR3PutU32(pSSM, VBOXVBVASAVEDSTATE_VHWAUNAVAILABLE_MAGIC);1788 rc = pHlp->pfnSSMPutU32(pSSM, VBOXVBVASAVEDSTATE_VHWAUNAVAILABLE_MAGIC); 1786 1789 AssertRCReturn(rc, rc); 1787 1790 } … … 1789 1792 1790 1793 /* no pending commands */ 1791 SSMR3PutU32(pSSM, 0);1794 pHlp->pfnSSMPutU32(pSSM, 0); 1792 1795 #endif 1793 1796 return rc; 1794 1797 } 1795 1798 1796 int vboxVBVALoadStateExec 1799 int vboxVBVALoadStateExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uVersion) 1797 1800 { 1798 1801 if (uVersion < VGA_SAVEDSTATE_VERSION_HGSMI) … … 1802 1805 } 1803 1806 1804 PVGASTATE pVGAState = PDMINS_2_DATA(pDevIns, PVGASTATE); 1805 PHGSMIINSTANCE pIns = pVGAState->pHGSMI; 1806 int rc = HGSMIHostLoadStateExec (pIns, pSSM, uVersion); 1807 PVGASTATE pVGAState = PDMINS_2_DATA(pDevIns, PVGASTATE); 1808 PHGSMIINSTANCE pIns = pVGAState->pHGSMI; 1809 PCPDMDEVHLPR3 pHlp = pDevIns->pHlpR3; 1810 int rc = HGSMIHostLoadStateExec(pHlp, pIns, pSSM, uVersion); 1807 1811 if (RT_SUCCESS(rc)) 1808 1812 { … … 1821 1825 { 1822 1826 uint32_t cViews = 0; 1823 rc = SSMR3GetU32 (pSSM, &cViews);1827 rc = pHlp->pfnSSMGetU32 (pSSM, &cViews); 1824 1828 AssertRCReturn(rc, rc); 1825 1829 … … 1829 1833 VBVAVIEW *pView = &pCtx->aViews[iView]; 1830 1834 1831 rc = SSMR3GetU32 (pSSM, &pView->view.u32ViewIndex);1832 AssertRCReturn(rc, rc); 1833 rc = SSMR3GetU32 (pSSM, &pView->view.u32ViewOffset);1834 AssertRCReturn(rc, rc); 1835 rc = SSMR3GetU32 (pSSM, &pView->view.u32ViewSize);1836 AssertRCReturn(rc, rc); 1837 rc = SSMR3GetU32 (pSSM, &pView->view.u32MaxScreenSize);1838 AssertRCReturn(rc, rc); 1839 1840 rc = SSMR3GetU32 (pSSM, &pView->screen.u32ViewIndex);1841 AssertRCReturn(rc, rc); 1842 rc = SSMR3GetS32 (pSSM, &pView->screen.i32OriginX);1843 AssertRCReturn(rc, rc); 1844 rc = SSMR3GetS32 (pSSM, &pView->screen.i32OriginY);1845 AssertRCReturn(rc, rc); 1846 rc = SSMR3GetU32 (pSSM, &pView->screen.u32StartOffset);1847 AssertRCReturn(rc, rc); 1848 rc = SSMR3GetU32 (pSSM, &pView->screen.u32LineSize);1849 AssertRCReturn(rc, rc); 1850 rc = SSMR3GetU32 (pSSM, &pView->screen.u32Width);1851 AssertRCReturn(rc, rc); 1852 rc = SSMR3GetU32 (pSSM, &pView->screen.u32Height);1853 AssertRCReturn(rc, rc); 1854 rc = SSMR3GetU16 (pSSM, &pView->screen.u16BitsPerPixel);1855 AssertRCReturn(rc, rc); 1856 rc = SSMR3GetU16 (pSSM, &pView->screen.u16Flags);1857 AssertRCReturn(rc, rc); 1858 1859 rc = SSMR3GetU32 (pSSM, &pView->vbva.u32VBVAOffset);1860 AssertRCReturn(rc, rc); 1861 1862 rc = SSMR3GetU32 (pSSM, &pView->vbva.partialRecord.cb);1835 rc = pHlp->pfnSSMGetU32 (pSSM, &pView->view.u32ViewIndex); 1836 AssertRCReturn(rc, rc); 1837 rc = pHlp->pfnSSMGetU32 (pSSM, &pView->view.u32ViewOffset); 1838 AssertRCReturn(rc, rc); 1839 rc = pHlp->pfnSSMGetU32 (pSSM, &pView->view.u32ViewSize); 1840 AssertRCReturn(rc, rc); 1841 rc = pHlp->pfnSSMGetU32 (pSSM, &pView->view.u32MaxScreenSize); 1842 AssertRCReturn(rc, rc); 1843 1844 rc = pHlp->pfnSSMGetU32 (pSSM, &pView->screen.u32ViewIndex); 1845 AssertRCReturn(rc, rc); 1846 rc = pHlp->pfnSSMGetS32 (pSSM, &pView->screen.i32OriginX); 1847 AssertRCReturn(rc, rc); 1848 rc = pHlp->pfnSSMGetS32 (pSSM, &pView->screen.i32OriginY); 1849 AssertRCReturn(rc, rc); 1850 rc = pHlp->pfnSSMGetU32 (pSSM, &pView->screen.u32StartOffset); 1851 AssertRCReturn(rc, rc); 1852 rc = pHlp->pfnSSMGetU32 (pSSM, &pView->screen.u32LineSize); 1853 AssertRCReturn(rc, rc); 1854 rc = pHlp->pfnSSMGetU32 (pSSM, &pView->screen.u32Width); 1855 AssertRCReturn(rc, rc); 1856 rc = pHlp->pfnSSMGetU32 (pSSM, &pView->screen.u32Height); 1857 AssertRCReturn(rc, rc); 1858 rc = pHlp->pfnSSMGetU16 (pSSM, &pView->screen.u16BitsPerPixel); 1859 AssertRCReturn(rc, rc); 1860 rc = pHlp->pfnSSMGetU16 (pSSM, &pView->screen.u16Flags); 1861 AssertRCReturn(rc, rc); 1862 1863 rc = pHlp->pfnSSMGetU32 (pSSM, &pView->vbva.u32VBVAOffset); 1864 AssertRCReturn(rc, rc); 1865 1866 rc = pHlp->pfnSSMGetU32 (pSSM, &pView->vbva.partialRecord.cb); 1863 1867 AssertRCReturn(rc, rc); 1864 1868 … … 1880 1884 pView->vbva.partialRecord.pu8 = pu8; 1881 1885 1882 rc = SSMR3GetMem (pSSM, pView->vbva.partialRecord.pu8, pView->vbva.partialRecord.cb);1886 rc = pHlp->pfnSSMGetMem (pSSM, pView->vbva.partialRecord.pu8, pView->vbva.partialRecord.cb); 1883 1887 AssertRCReturn(rc, rc); 1884 1888 } … … 1897 1901 { 1898 1902 /* Read mouse pointer shape information. */ 1899 rc = SSMR3GetBool (pSSM, &pCtx->mouseShapeInfo.fSet);1900 AssertRCReturn(rc, rc); 1901 rc = SSMR3GetBool (pSSM, &pCtx->mouseShapeInfo.fVisible);1902 AssertRCReturn(rc, rc); 1903 rc = SSMR3GetBool (pSSM, &pCtx->mouseShapeInfo.fAlpha);1904 AssertRCReturn(rc, rc); 1905 rc = SSMR3GetU32 (pSSM, &pCtx->mouseShapeInfo.u32HotX);1906 AssertRCReturn(rc, rc); 1907 rc = SSMR3GetU32 (pSSM, &pCtx->mouseShapeInfo.u32HotY);1908 AssertRCReturn(rc, rc); 1909 rc = SSMR3GetU32 (pSSM, &pCtx->mouseShapeInfo.u32Width);1910 AssertRCReturn(rc, rc); 1911 rc = SSMR3GetU32 (pSSM, &pCtx->mouseShapeInfo.u32Height);1912 AssertRCReturn(rc, rc); 1913 rc = SSMR3GetU32 (pSSM, &pCtx->mouseShapeInfo.cbShape);1903 rc = pHlp->pfnSSMGetBool (pSSM, &pCtx->mouseShapeInfo.fSet); 1904 AssertRCReturn(rc, rc); 1905 rc = pHlp->pfnSSMGetBool (pSSM, &pCtx->mouseShapeInfo.fVisible); 1906 AssertRCReturn(rc, rc); 1907 rc = pHlp->pfnSSMGetBool (pSSM, &pCtx->mouseShapeInfo.fAlpha); 1908 AssertRCReturn(rc, rc); 1909 rc = pHlp->pfnSSMGetU32 (pSSM, &pCtx->mouseShapeInfo.u32HotX); 1910 AssertRCReturn(rc, rc); 1911 rc = pHlp->pfnSSMGetU32 (pSSM, &pCtx->mouseShapeInfo.u32HotY); 1912 AssertRCReturn(rc, rc); 1913 rc = pHlp->pfnSSMGetU32 (pSSM, &pCtx->mouseShapeInfo.u32Width); 1914 AssertRCReturn(rc, rc); 1915 rc = pHlp->pfnSSMGetU32 (pSSM, &pCtx->mouseShapeInfo.u32Height); 1916 AssertRCReturn(rc, rc); 1917 rc = pHlp->pfnSSMGetU32 (pSSM, &pCtx->mouseShapeInfo.cbShape); 1914 1918 AssertRCReturn(rc, rc); 1915 1919 if (pCtx->mouseShapeInfo.cbShape) … … 1921 1925 } 1922 1926 pCtx->mouseShapeInfo.cbAllocated = pCtx->mouseShapeInfo.cbShape; 1923 rc = SSMR3GetMem (pSSM, pCtx->mouseShapeInfo.pu8Shape, pCtx->mouseShapeInfo.cbShape);1927 rc = pHlp->pfnSSMGetMem (pSSM, pCtx->mouseShapeInfo.pu8Shape, pCtx->mouseShapeInfo.cbShape); 1924 1928 AssertRCReturn(rc, rc); 1925 1929 } … … 1931 1935 /* Size of some additional data. For future extensions. */ 1932 1936 uint32_t cbExtra = 0; 1933 rc = SSMR3GetU32 (pSSM, &cbExtra);1937 rc = pHlp->pfnSSMGetU32 (pSSM, &cbExtra); 1934 1938 AssertRCReturn(rc, rc); 1935 1939 #ifdef VBOX_WITH_WDDM 1936 1940 if (cbExtra >= 4) 1937 1941 { 1938 rc = SSMR3GetU32 (pSSM, &pVGAState->fGuestCaps);1942 rc = pHlp->pfnSSMGetU32 (pSSM, &pVGAState->fGuestCaps); 1939 1943 AssertRCReturn(rc, rc); 1940 1944 pVGAState->pDrv->pfnVBVAGuestCapabilityUpdate(pVGAState->pDrv, pVGAState->fGuestCaps); … … 1944 1948 if (cbExtra > 0) 1945 1949 { 1946 rc = SSMR3Skip(pSSM, cbExtra);1950 rc = pHlp->pfnSSMSkip(pSSM, cbExtra); 1947 1951 AssertRCReturn(rc, rc); 1948 1952 } … … 1951 1955 { 1952 1956 uint32_t cModeHints, cbModeHints; 1953 rc = SSMR3GetU32 (pSSM, &cModeHints);1957 rc = pHlp->pfnSSMGetU32 (pSSM, &cModeHints); 1954 1958 AssertRCReturn(rc, rc); 1955 rc = SSMR3GetU32 (pSSM, &cbModeHints);1959 rc = pHlp->pfnSSMGetU32 (pSSM, &cbModeHints); 1956 1960 AssertRCReturn(rc, rc); 1957 1961 memset(&pCtx->aModeHints, ~0, sizeof(pCtx->aModeHints)); … … 1961 1965 if ( cbModeHints <= sizeof(VBVAMODEHINT) 1962 1966 && iHint < RT_ELEMENTS(pCtx->aModeHints)) 1963 rc = SSMR3GetMem(pSSM, &pCtx->aModeHints[iHint],1967 rc = pHlp->pfnSSMGetMem(pSSM, &pCtx->aModeHints[iHint], 1964 1968 cbModeHints); 1965 1969 else 1966 rc = SSMR3Skip(pSSM, cbModeHints);1970 rc = pHlp->pfnSSMSkip(pSSM, cbModeHints); 1967 1971 AssertRCReturn(rc, rc); 1968 1972 } … … 1979 1983 if (uVersion < VGA_SAVEDSTATE_VERSION_FIXED_PENDVHWA) 1980 1984 { 1981 const char *pcszOsArch = SSMR3HandleHostOSAndArch(pSSM);1985 const char *pcszOsArch = pHlp->pfnSSMHandleHostOSAndArch(pSSM); 1982 1986 Assert(pcszOsArch); 1983 1987 fLoadCommands = !pcszOsArch || RTStrNCmp(pcszOsArch, RT_STR_TUPLE("solaris")); … … 2003 2007 if (fLoadCommands) 2004 2008 { 2005 rc = vbvaVHWACommandLoadPending(p VGAState, pSSM, uVersion);2009 rc = vbvaVHWACommandLoadPending(pHlp, pVGAState, pSSM, uVersion); 2006 2010 AssertRCReturn(rc, rc); 2007 2011 } … … 2016 2020 for (uint32_t i = 0; i < pVGAState->cMonitors; ++i) 2017 2021 { 2018 rc = SSMR3GetU32(pSSM, &u32);2022 rc = pHlp->pfnSSMGetU32(pSSM, &u32); 2019 2023 AssertRCReturn(rc, rc); 2020 2024 … … 2028 2032 if (fLoadCommands) 2029 2033 { 2030 rc = SSMR3GetU32(pSSM, &u32);2034 rc = pHlp->pfnSSMGetU32(pSSM, &u32); 2031 2035 AssertRCReturn(rc, rc); 2032 2036 -
trunk/src/VBox/Devices/Graphics/DevVGA_VDMA.cpp
r80872 r82048 342 342 } 343 343 344 int vboxVDMASaveStateExecPerform( struct VBOXVDMAHOST *pVdma, PSSMHANDLE pSSM)344 int vboxVDMASaveStateExecPerform(PCPDMDEVHLPR3 pHlp, struct VBOXVDMAHOST *pVdma, PSSMHANDLE pSSM) 345 345 { 346 346 int rc; 347 347 RT_NOREF(pVdma); 348 348 349 rc = SSMR3PutU32(pSSM, UINT32_MAX);349 rc = pHlp->pfnSSMPutU32(pSSM, UINT32_MAX); 350 350 AssertRCReturn(rc, rc); 351 351 return VINF_SUCCESS; 352 352 } 353 353 354 int vboxVDMASaveLoadExecPerform( struct VBOXVDMAHOST *pVdma, PSSMHANDLE pSSM, uint32_t u32Version)354 int vboxVDMASaveLoadExecPerform(PCPDMDEVHLPR3 pHlp, struct VBOXVDMAHOST *pVdma, PSSMHANDLE pSSM, uint32_t u32Version) 355 355 { 356 356 uint32_t u32; 357 int rc = SSMR3GetU32(pSSM, &u32);357 int rc = pHlp->pfnSSMGetU32(pSSM, &u32); 358 358 AssertLogRelRCReturn(rc, rc); 359 359 -
trunk/src/VBox/Devices/Graphics/HGSMI/HGSMIHost.cpp
r80295 r82048 70 70 #include <iprt/errcore.h> 71 71 #include <VBox/log.h> 72 #include <VBox/vmm/pdmdev.h> 72 73 #include <VBox/vmm/ssm.h> 73 74 #include <VBox/vmm/vmm.h> … … 92 93 # define VBOXHGSMI_STATE_FIFOSTOP_MAGIC UINT32_C(0x1fedcba9) 93 94 94 # define VBOXHGSMI_SAVE_START(_pSSM) do{ int rc2 = SSMR3PutU32(_pSSM, VBOXHGSMI_STATE_START_MAGIC); AssertRC(rc2); }while(0)95 # define VBOXHGSMI_SAVE_STOP(_pSSM) do{ int rc2 = SSMR3PutU32(_pSSM, VBOXHGSMI_STATE_STOP_MAGIC); AssertRC(rc2); }while(0)96 # define VBOXHGSMI_SAVE_FIFOSTART(_pSSM) do{ int rc2 = SSMR3PutU32(_pSSM, VBOXHGSMI_STATE_FIFOSTART_MAGIC); AssertRC(rc2); }while(0)97 # define VBOXHGSMI_SAVE_FIFOSTOP(_pSSM) do{ int rc2 = SSMR3PutU32(_pSSM, VBOXHGSMI_STATE_FIFOSTOP_MAGIC); AssertRC(rc2); }while(0)95 # define VBOXHGSMI_SAVE_START(_pSSM) do{ int rc2 = pHlp->pfnSSMPutU32(_pSSM, VBOXHGSMI_STATE_START_MAGIC); AssertRC(rc2); }while(0) 96 # define VBOXHGSMI_SAVE_STOP(_pSSM) do{ int rc2 = pHlp->pfnSSMPutU32(_pSSM, VBOXHGSMI_STATE_STOP_MAGIC); AssertRC(rc2); }while(0) 97 # define VBOXHGSMI_SAVE_FIFOSTART(_pSSM) do{ int rc2 = pHlp->pfnSSMPutU32(_pSSM, VBOXHGSMI_STATE_FIFOSTART_MAGIC); AssertRC(rc2); }while(0) 98 # define VBOXHGSMI_SAVE_FIFOSTOP(_pSSM) do{ int rc2 = pHlp->pfnSSMPutU32(_pSSM, VBOXHGSMI_STATE_FIFOSTOP_MAGIC); AssertRC(rc2); }while(0) 98 99 99 100 # define VBOXHGSMI_LOAD_CHECK(_pSSM, _v) \ 100 101 do { \ 101 102 uint32_t u32; \ 102 int rc2 = SSMR3GetU32(_pSSM, &u32); AssertRC(rc2); \103 int rc2 = pHlp->pfnSSMGetU32(_pSSM, &u32); AssertRC(rc2); \ 103 104 Assert(u32 == (_v)); \ 104 105 } while(0) … … 960 961 } 961 962 962 static int hgsmiHostSaveFifoLocked( RTLISTANCHOR *pList, PSSMHANDLE pSSM)963 static int hgsmiHostSaveFifoLocked(PCPDMDEVHLPR3 pHlp, RTLISTANCHOR *pList, PSSMHANDLE pSSM) 963 964 { 964 965 VBOXHGSMI_SAVE_FIFOSTART(pSSM); … … 972 973 } 973 974 974 int rc = SSMR3PutU32(pSSM, cEntries);975 int rc = pHlp->pfnSSMPutU32(pSSM, cEntries); 975 976 if (RT_SUCCESS(rc)) 976 977 { 977 978 RTListForEach(pList, pIter, HGSMIHOSTFIFOENTRY, nodeEntry) 978 979 { 979 SSMR3PutU32(pSSM, pIter->fl);980 rc = SSMR3PutU32(pSSM, pIter->offBuffer);980 pHlp->pfnSSMPutU32(pSSM, pIter->fl); 981 rc = pHlp->pfnSSMPutU32(pSSM, pIter->offBuffer); 981 982 if (RT_FAILURE(rc)) 982 983 break; … … 989 990 } 990 991 991 static int hgsmiHostSaveGuestCmdCompletedFifoLocked( RTLISTANCHOR *pList, PSSMHANDLE pSSM)992 static int hgsmiHostSaveGuestCmdCompletedFifoLocked(PCPDMDEVHLPR3 pHlp, RTLISTANCHOR *pList, PSSMHANDLE pSSM) 992 993 { 993 994 VBOXHGSMI_SAVE_FIFOSTART(pSSM); … … 1000 1001 ++cEntries; 1001 1002 } 1002 int rc = SSMR3PutU32(pSSM, cEntries);1003 int rc = pHlp->pfnSSMPutU32(pSSM, cEntries); 1003 1004 if (RT_SUCCESS(rc)) 1004 1005 { 1005 1006 RTListForEach(pList, pIter, HGSMIGUESTCOMPLENTRY, nodeEntry) 1006 1007 { 1007 rc = SSMR3PutU32(pSSM, pIter->offBuffer);1008 rc = pHlp->pfnSSMPutU32(pSSM, pIter->offBuffer); 1008 1009 if (RT_FAILURE(rc)) 1009 1010 break; … … 1016 1017 } 1017 1018 1018 static int hgsmiHostLoadFifoEntryLocked(P HGSMIINSTANCE pIns, HGSMIHOSTFIFOENTRY **ppEntry, PSSMHANDLE pSSM)1019 static int hgsmiHostLoadFifoEntryLocked(PCPDMDEVHLPR3 pHlp, PHGSMIINSTANCE pIns, HGSMIHOSTFIFOENTRY **ppEntry, PSSMHANDLE pSSM) 1019 1020 { 1020 1021 HGSMIHOSTFIFOENTRY *pEntry; … … 1024 1025 uint32_t u32; 1025 1026 pEntry->pIns = pIns; 1026 rc = SSMR3GetU32(pSSM, &u32); AssertRC(rc);1027 rc = pHlp->pfnSSMGetU32(pSSM, &u32); AssertRC(rc); 1027 1028 pEntry->fl = u32; 1028 rc = SSMR3GetU32(pSSM, &pEntry->offBuffer); AssertRC(rc);1029 rc = pHlp->pfnSSMGetU32(pSSM, &pEntry->offBuffer); AssertRC(rc); 1029 1030 if (RT_SUCCESS(rc)) 1030 1031 *ppEntry = pEntry; … … 1036 1037 } 1037 1038 1038 static int hgsmiHostLoadFifoLocked(P HGSMIINSTANCE pIns, RTLISTANCHOR *pList, PSSMHANDLE pSSM)1039 static int hgsmiHostLoadFifoLocked(PCPDMDEVHLPR3 pHlp, PHGSMIINSTANCE pIns, RTLISTANCHOR *pList, PSSMHANDLE pSSM) 1039 1040 { 1040 1041 VBOXHGSMI_LOAD_FIFOSTART(pSSM); 1041 1042 1042 1043 uint32_t cEntries = 0; 1043 int rc = SSMR3GetU32(pSSM, &cEntries);1044 int rc = pHlp->pfnSSMGetU32(pSSM, &cEntries); 1044 1045 if (RT_SUCCESS(rc) && cEntries) 1045 1046 { … … 1048 1049 { 1049 1050 HGSMIHOSTFIFOENTRY *pEntry = NULL; 1050 rc = hgsmiHostLoadFifoEntryLocked(p Ins, &pEntry, pSSM);1051 rc = hgsmiHostLoadFifoEntryLocked(pHlp, pIns, &pEntry, pSSM); 1051 1052 AssertRCBreak(rc); 1052 1053 … … 1060 1061 } 1061 1062 1062 static int hgsmiHostLoadGuestCmdCompletedFifoEntryLocked (PHGSMIINSTANCE pIns, HGSMIGUESTCOMPLENTRY **ppEntry, PSSMHANDLE pSSM) 1063 static int hgsmiHostLoadGuestCmdCompletedFifoEntryLocked(PCPDMDEVHLPR3 pHlp, PHGSMIINSTANCE pIns, 1064 HGSMIGUESTCOMPLENTRY **ppEntry, PSSMHANDLE pSSM) 1063 1065 { 1064 1066 HGSMIGUESTCOMPLENTRY *pEntry; … … 1066 1068 if (RT_SUCCESS (rc)) 1067 1069 { 1068 rc = SSMR3GetU32(pSSM, &pEntry->offBuffer); AssertRC(rc);1070 rc = pHlp->pfnSSMGetU32(pSSM, &pEntry->offBuffer); AssertRC(rc); 1069 1071 if (RT_SUCCESS(rc)) 1070 1072 *ppEntry = pEntry; … … 1075 1077 } 1076 1078 1077 static int hgsmiHostLoadGuestCmdCompletedFifoLocked(PHGSMIINSTANCE pIns, RTLISTANCHOR *pList, PSSMHANDLE pSSM, uint32_t u32Version) 1079 static int hgsmiHostLoadGuestCmdCompletedFifoLocked(PCPDMDEVHLPR3 pHlp, PHGSMIINSTANCE pIns, RTLISTANCHOR *pList, 1080 PSSMHANDLE pSSM, uint32_t u32Version) 1078 1081 { 1079 1082 VBOXHGSMI_LOAD_FIFOSTART(pSSM); … … 1082 1085 1083 1086 uint32_t cEntries = 0; 1084 int rc = SSMR3GetU32(pSSM, &cEntries);1087 int rc = pHlp->pfnSSMGetU32(pSSM, &cEntries); 1085 1088 if (RT_SUCCESS(rc) && cEntries) 1086 1089 { … … 1090 1093 { 1091 1094 HGSMIGUESTCOMPLENTRY *pEntry = NULL; 1092 rc = hgsmiHostLoadGuestCmdCompletedFifoEntryLocked(p Ins, &pEntry, pSSM);1095 rc = hgsmiHostLoadGuestCmdCompletedFifoEntryLocked(pHlp, pIns, &pEntry, pSSM); 1093 1096 AssertRCBreak(rc); 1094 1097 … … 1105 1108 { 1106 1109 HGSMIHOSTFIFOENTRY *pEntry = NULL; 1107 rc = hgsmiHostLoadFifoEntryLocked(p Ins, &pEntry, pSSM);1110 rc = hgsmiHostLoadFifoEntryLocked(pHlp, pIns, &pEntry, pSSM); 1108 1111 AssertRCBreak(rc); 1109 1112 … … 1118 1121 } 1119 1122 1120 static int hgsmiHostSaveMA(P SSMHANDLE pSSM, HGSMIMADATA *pMA)1121 { 1122 int rc = SSMR3PutU32(pSSM, pMA->cBlocks);1123 static int hgsmiHostSaveMA(PCPDMDEVHLPR3 pHlp, PSSMHANDLE pSSM, HGSMIMADATA *pMA) 1124 { 1125 int rc = pHlp->pfnSSMPutU32(pSSM, pMA->cBlocks); 1123 1126 if (RT_SUCCESS(rc)) 1124 1127 { … … 1126 1129 RTListForEach(&pMA->listBlocks, pIter, HGSMIMABLOCK, nodeBlock) 1127 1130 { 1128 SSMR3PutU32(pSSM, pIter->descriptor); 1129 } 1130 1131 rc = SSMR3PutU32(pSSM, pMA->cbMaxBlock); 1132 } 1133 1134 return rc; 1135 } 1136 1137 static int hgsmiHostLoadMA(PSSMHANDLE pSSM, uint32_t *pcBlocks, HGSMIOFFSET **ppaDescriptors, HGSMISIZE *pcbMaxBlock) 1138 { 1139 int rc = SSMR3GetU32(pSSM, pcBlocks); 1131 pHlp->pfnSSMPutU32(pSSM, pIter->descriptor); 1132 } 1133 1134 rc = pHlp->pfnSSMPutU32(pSSM, pMA->cbMaxBlock); 1135 } 1136 1137 return rc; 1138 } 1139 1140 static int hgsmiHostLoadMA(PCPDMDEVHLPR3 pHlp, PSSMHANDLE pSSM, uint32_t *pcBlocks, 1141 HGSMIOFFSET **ppaDescriptors, HGSMISIZE *pcbMaxBlock) 1142 { 1143 int rc = pHlp->pfnSSMGetU32(pSSM, pcBlocks); 1140 1144 if (RT_SUCCESS(rc)) 1141 1145 { … … 1148 1152 uint32_t i; 1149 1153 for (i = 0; i < *pcBlocks; ++i) 1150 SSMR3GetU32(pSSM, &paDescriptors[i]);1154 pHlp->pfnSSMGetU32(pSSM, &paDescriptors[i]); 1151 1155 } 1152 1156 else … … 1155 1159 1156 1160 if (RT_SUCCESS(rc)) 1157 rc = SSMR3GetU32(pSSM, pcbMaxBlock);1161 rc = pHlp->pfnSSMGetU32(pSSM, pcbMaxBlock); 1158 1162 if (RT_SUCCESS(rc)) 1159 1163 *ppaDescriptors = paDescriptors; … … 1165 1169 } 1166 1170 1167 int HGSMIHostSaveStateExec(P HGSMIINSTANCE pIns, PSSMHANDLE pSSM)1171 int HGSMIHostSaveStateExec(PCPDMDEVHLPR3 pHlp, PHGSMIINSTANCE pIns, PSSMHANDLE pSSM) 1168 1172 { 1169 1173 VBOXHGSMI_SAVE_START(pSSM); … … 1171 1175 int rc; 1172 1176 1173 SSMR3PutU32(pSSM, pIns->hostHeap.u32HeapType);1177 pHlp->pfnSSMPutU32(pSSM, pIns->hostHeap.u32HeapType); 1174 1178 1175 1179 HGSMIOFFSET off = pIns->pHGFlags ? HGSMIPointerToOffset(&pIns->area, (const HGSMIBUFFERHEADER *)pIns->pHGFlags) 1176 1180 : HGSMIOFFSET_VOID; 1177 SSMR3PutU32(pSSM, off);1181 pHlp->pfnSSMPutU32(pSSM, off); 1178 1182 1179 1183 off = pIns->hostHeap.u32HeapType == HGSMI_HEAP_TYPE_MA ? 0 : hgsmiHostHeapHandleLocationOffset(&pIns->hostHeap); 1180 rc = SSMR3PutU32 (pSSM, off);1184 rc = pHlp->pfnSSMPutU32 (pSSM, off); 1181 1185 if (off != HGSMIOFFSET_VOID) 1182 1186 { 1183 SSMR3PutU32(pSSM, hgsmiHostHeapOffset(&pIns->hostHeap));1184 SSMR3PutU32(pSSM, hgsmiHostHeapSize(&pIns->hostHeap));1187 pHlp->pfnSSMPutU32(pSSM, hgsmiHostHeapOffset(&pIns->hostHeap)); 1188 pHlp->pfnSSMPutU32(pSSM, hgsmiHostHeapSize(&pIns->hostHeap)); 1185 1189 /* need save mem pointer to calculate offset on restore */ 1186 SSMR3PutU64(pSSM, (uint64_t)(uintptr_t)pIns->area.pu8Base);1190 pHlp->pfnSSMPutU64(pSSM, (uint64_t)(uintptr_t)pIns->area.pu8Base); 1187 1191 rc = hgsmiFIFOLock (pIns); 1188 1192 if (RT_SUCCESS(rc)) 1189 1193 { 1190 rc = hgsmiHostSaveFifoLocked( &pIns->hostFIFO, pSSM); AssertRC(rc);1191 rc = hgsmiHostSaveFifoLocked( &pIns->hostFIFORead, pSSM); AssertRC(rc);1192 rc = hgsmiHostSaveFifoLocked( &pIns->hostFIFOProcessed, pSSM); AssertRC(rc);1194 rc = hgsmiHostSaveFifoLocked(pHlp, &pIns->hostFIFO, pSSM); AssertRC(rc); 1195 rc = hgsmiHostSaveFifoLocked(pHlp, &pIns->hostFIFORead, pSSM); AssertRC(rc); 1196 rc = hgsmiHostSaveFifoLocked(pHlp, &pIns->hostFIFOProcessed, pSSM); AssertRC(rc); 1193 1197 #ifdef VBOX_WITH_WDDM 1194 rc = hgsmiHostSaveGuestCmdCompletedFifoLocked( &pIns->guestCmdCompleted, pSSM); AssertRC(rc);1198 rc = hgsmiHostSaveGuestCmdCompletedFifoLocked(pHlp, &pIns->guestCmdCompleted, pSSM); AssertRC(rc); 1195 1199 #endif 1196 1200 … … 1200 1204 if (RT_SUCCESS(rc)) 1201 1205 if (pIns->hostHeap.u32HeapType == HGSMI_HEAP_TYPE_MA) 1202 rc = hgsmiHostSaveMA(p SSM, &pIns->hostHeap.u.ma);1206 rc = hgsmiHostSaveMA(pHlp, pSSM, &pIns->hostHeap.u.ma); 1203 1207 } 1204 1208 … … 1208 1212 } 1209 1213 1210 int HGSMIHostLoadStateExec(P HGSMIINSTANCE pIns, PSSMHANDLE pSSM, uint32_t u32Version)1214 int HGSMIHostLoadStateExec(PCPDMDEVHLPR3 pHlp, PHGSMIINSTANCE pIns, PSSMHANDLE pSSM, uint32_t u32Version) 1211 1215 { 1212 1216 if (u32Version < VGA_SAVEDSTATE_VERSION_HGSMI) … … 1219 1223 if (u32Version >= VGA_SAVEDSTATE_VERSION_HGSMIMA) 1220 1224 { 1221 rc = SSMR3GetU32(pSSM, &u32HeapType);1225 rc = pHlp->pfnSSMGetU32(pSSM, &u32HeapType); 1222 1226 AssertRCReturn(rc, rc); 1223 1227 } 1224 1228 1225 1229 HGSMIOFFSET off; 1226 rc = SSMR3GetU32(pSSM, &off);1230 rc = pHlp->pfnSSMGetU32(pSSM, &off); 1227 1231 AssertLogRelRCReturn(rc, rc); 1228 1232 pIns->pHGFlags = off != HGSMIOFFSET_VOID ? (HGSMIHOSTFLAGS *)HGSMIOffsetToPointer(&pIns->area, off) : NULL; 1229 1233 1230 rc = SSMR3GetU32(pSSM, &off);1234 rc = pHlp->pfnSSMGetU32(pSSM, &off); 1231 1235 AssertLogRelRCReturn(rc, rc); 1232 1236 if (off != HGSMIOFFSET_VOID) … … 1238 1242 1239 1243 HGSMIOFFSET offHeap; 1240 SSMR3GetU32(pSSM, &offHeap);1244 pHlp->pfnSSMGetU32(pSSM, &offHeap); 1241 1245 uint32_t cbHeap; 1242 SSMR3GetU32(pSSM, &cbHeap);1246 pHlp->pfnSSMGetU32(pSSM, &cbHeap); 1243 1247 uint64_t oldMem; 1244 rc = SSMR3GetU64(pSSM, &oldMem);1248 rc = pHlp->pfnSSMGetU64(pSSM, &oldMem); 1245 1249 AssertLogRelRCReturn(rc, rc); 1246 1250 … … 1250 1254 if (RT_SUCCESS(rc)) 1251 1255 { 1252 rc = hgsmiHostLoadFifoLocked(p Ins, &pIns->hostFIFO, pSSM);1256 rc = hgsmiHostLoadFifoLocked(pHlp, pIns, &pIns->hostFIFO, pSSM); 1253 1257 if (RT_SUCCESS(rc)) 1254 rc = hgsmiHostLoadFifoLocked(p Ins, &pIns->hostFIFORead, pSSM);1258 rc = hgsmiHostLoadFifoLocked(pHlp, pIns, &pIns->hostFIFORead, pSSM); 1255 1259 if (RT_SUCCESS(rc)) 1256 rc = hgsmiHostLoadFifoLocked(p Ins, &pIns->hostFIFOProcessed, pSSM);1260 rc = hgsmiHostLoadFifoLocked(pHlp, pIns, &pIns->hostFIFOProcessed, pSSM); 1257 1261 #ifdef VBOX_WITH_WDDM 1258 1262 if (RT_SUCCESS(rc) && u32Version > VGA_SAVEDSTATE_VERSION_PRE_WDDM) 1259 rc = hgsmiHostLoadGuestCmdCompletedFifoLocked(p Ins, &pIns->guestCmdCompleted, pSSM, u32Version);1263 rc = hgsmiHostLoadGuestCmdCompletedFifoLocked(pHlp, pIns, &pIns->guestCmdCompleted, pSSM, u32Version); 1260 1264 #endif 1261 1265 … … 1271 1275 HGSMISIZE cbMaxBlock = 0; 1272 1276 HGSMIOFFSET *paDescriptors = NULL; 1273 rc = hgsmiHostLoadMA(p SSM, &cBlocks, &paDescriptors, &cbMaxBlock);1277 rc = hgsmiHostLoadMA(pHlp, pSSM, &cBlocks, &paDescriptors, &cbMaxBlock); 1274 1278 if (RT_SUCCESS(rc)) 1275 1279 { -
trunk/src/VBox/Devices/Graphics/HGSMI/HGSMIHost.h
r80295 r82048 102 102 int HGSMIHostCommandFree(PHGSMIINSTANCE pIns, void RT_UNTRUSTED_VOLATILE_GUEST *pvData); 103 103 104 int HGSMIHostLoadStateExec( PHGSMIINSTANCE pIns, PSSMHANDLE pSSM, uint32_t u32Version);105 int HGSMIHostSaveStateExec( PHGSMIINSTANCE pIns, PSSMHANDLE pSSM);104 int HGSMIHostLoadStateExec(const struct PDMDEVHLPR3 *pHlp, PHGSMIINSTANCE pIns, PSSMHANDLE pSSM, uint32_t u32Version); 105 int HGSMIHostSaveStateExec(const struct PDMDEVHLPR3 *pHlp, PHGSMIINSTANCE pIns, PSSMHANDLE pSSM); 106 106 107 107 #ifdef VBOX_WITH_WDDM
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