- Timestamp:
- Feb 7, 2020 6:00:45 PM (5 years ago)
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 4 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMR0/HMSVMR0.cpp
r82968 r83025 3300 3300 Assert(!pVmcb->ctrl.EventInject.n.u1Valid); 3301 3301 pVmcb->ctrl.EventInject.u = pEvent->u; 3302 STAM_COUNTER_INC(&pVCpu->hm.s.paStatInjectedIrqsR0[pEvent->n.u8Vector & MASK_INJECT_IRQ_STAT]); 3302 if ( pVmcb->ctrl.EventInject.n.u3Type == SVM_EVENT_EXCEPTION 3303 || pVmcb->ctrl.EventInject.n.u3Type == SVM_EVENT_NMI) 3304 { 3305 Assert(pEvent->n.u8Vector <= X86_XCPT_LAST); 3306 STAM_COUNTER_INC(&pVCpu->hm.s.paStatInjectedXcptsR0[pEvent->n.u8Vector]); 3307 } 3308 else 3309 STAM_COUNTER_INC(&pVCpu->hm.s.paStatInjectedIrqsR0[pEvent->n.u8Vector & MASK_INJECT_IRQ_STAT]); 3303 3310 RT_NOREF(pVCpu); 3304 3311 -
trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp
r82968 r83025 8652 8652 #endif 8653 8653 8654 STAM_COUNTER_INC(&pVCpu->hm.s.paStatInjectedIrqsR0[uVector & MASK_INJECT_IRQ_STAT]); 8654 if ( uIntType == VMX_EXIT_INT_INFO_TYPE_HW_XCPT 8655 || uIntType == VMX_EXIT_INT_INFO_TYPE_NMI 8656 || uIntType == VMX_EXIT_INT_INFO_TYPE_PRIV_SW_XCPT 8657 || uIntType == VMX_EXIT_INT_INFO_TYPE_SW_XCPT) 8658 { 8659 Assert(uVector <= X86_XCPT_LAST); 8660 Assert(uIntType != VMX_EXIT_INT_INFO_TYPE_NMI || uVector == X86_XCPT_NMI); 8661 Assert(uIntType != VMX_EXIT_INT_INFO_TYPE_PRIV_SW_XCPT || uVector == X86_XCPT_DB); 8662 STAM_COUNTER_INC(&pVCpu->hm.s.paStatInjectedXcptsR0[uVector]); 8663 } 8664 else 8665 STAM_COUNTER_INC(&pVCpu->hm.s.paStatInjectedIrqsR0[uVector & MASK_INJECT_IRQ_STAT]); 8655 8666 8656 8667 /* -
trunk/src/VBox/VMM/VMMR3/HM.cpp
r83014 r83025 148 148 static int hmR3TermCPU(PVM pVM); 149 149 150 151 /** 152 * Returns the name of the hardware exception. 153 * 154 * @returns The name of the hardware exception. 155 * @param uVector The exception vector. 156 */ 157 static const char *hmR3GetXcptName(uint8_t uVector) 158 { 159 switch (uVector) 160 { 161 case X86_XCPT_DE: return "#DE"; 162 case X86_XCPT_DB: return "#DB"; 163 case X86_XCPT_NMI: return "#NMI"; 164 case X86_XCPT_BP: return "#BP"; 165 case X86_XCPT_OF: return "#OF"; 166 case X86_XCPT_BR: return "#BR"; 167 case X86_XCPT_UD: return "#UD"; 168 case X86_XCPT_NM: return "#NM"; 169 case X86_XCPT_DF: return "#DF"; 170 case X86_XCPT_CO_SEG_OVERRUN: return "#CO_SEG_OVERRUN"; 171 case X86_XCPT_TS: return "#TS"; 172 case X86_XCPT_NP: return "#NP"; 173 case X86_XCPT_SS: return "#SS"; 174 case X86_XCPT_GP: return "#GP"; 175 case X86_XCPT_PF: return "#PF"; 176 case X86_XCPT_MF: return "#MF"; 177 case X86_XCPT_AC: return "#AC"; 178 case X86_XCPT_MC: return "#MC"; 179 case X86_XCPT_XF: return "#XF"; 180 case X86_XCPT_VE: return "#VE"; 181 case X86_XCPT_CP: return "#CP"; 182 case X86_XCPT_VC: return "#VC"; 183 case X86_XCPT_SX: return "#SX"; 184 } 185 return "Reserved"; 186 } 150 187 151 188 … … 877 914 878 915 /* 879 * Injected events stats.916 * Injected interrupts stats. 880 917 */ 881 rc = MMHyperAlloc(pVM, sizeof(STAMCOUNTER) * 256, 8, MM_TAG_HM, (void **)&pHmCpu->paStatInjectedIrqs); 882 AssertRCReturn(rc, rc); 883 pHmCpu->paStatInjectedIrqsR0 = MMHyperR3ToR0(pVM, pHmCpu->paStatInjectedIrqs); 884 Assert(pHmCpu->paStatInjectedIrqsR0 != NIL_RTR0PTR); 885 for (unsigned j = 0; j < 255; j++) 886 { 887 rc = STAMR3RegisterF(pVM, &pHmCpu->paStatInjectedIrqs[j], STAMTYPE_COUNTER, STAMVISIBILITY_USED, 888 STAMUNIT_OCCURENCES, "Injected events.", 889 j <= X86_XCPT_LAST ? "/HM/CPU%u/EventInject/InjectTrap/%02X" : "/HM/CPU%u/EventInject/InjectIRQ/%02X", 890 idCpu, j); 891 AssertRC(rc); 918 { 919 uint32_t const cInterrupts = 0xff + 1; 920 rc = MMHyperAlloc(pVM, sizeof(STAMCOUNTER) * cInterrupts, 8, MM_TAG_HM, (void **)&pHmCpu->paStatInjectedIrqs); 921 AssertRCReturn(rc, rc); 922 pHmCpu->paStatInjectedIrqsR0 = MMHyperR3ToR0(pVM, pHmCpu->paStatInjectedIrqs); 923 Assert(pHmCpu->paStatInjectedIrqsR0 != NIL_RTR0PTR); 924 for (unsigned j = 0; j < cInterrupts; j++) 925 { 926 char aszIntrName[64]; 927 RTStrPrintf(&aszIntrName[0], sizeof(aszIntrName), "Interrupt %u", j); 928 rc = STAMR3RegisterF(pVM, &pHmCpu->paStatInjectedIrqs[j], STAMTYPE_COUNTER, STAMVISIBILITY_USED, 929 STAMUNIT_OCCURENCES, aszIntrName, 930 "/HM/CPU%u/EventInject/InjectIntr/%02X", idCpu, j); 931 AssertRC(rc); 932 } 933 } 934 935 /* 936 * Injected exception stats. 937 */ 938 { 939 uint32_t const cXcpts = X86_XCPT_LAST + 1; 940 rc = MMHyperAlloc(pVM, sizeof(STAMCOUNTER) * cXcpts, 8, MM_TAG_HM, (void **)&pHmCpu->paStatInjectedXcpts); 941 AssertRCReturn(rc, rc); 942 pHmCpu->paStatInjectedXcptsR0 = MMHyperR3ToR0(pVM, pHmCpu->paStatInjectedXcpts); 943 Assert(pHmCpu->paStatInjectedXcptsR0 != NIL_RTR0PTR); 944 for (unsigned j = 0; j < cXcpts; j++) 945 { 946 char aszXcptName[64]; 947 RTStrPrintf(&aszXcptName[0], sizeof(aszXcptName), "%s exception", hmR3GetXcptName(j)); 948 rc = STAMR3RegisterF(pVM, &pHmCpu->paStatInjectedXcpts[j], STAMTYPE_COUNTER, STAMVISIBILITY_USED, 949 STAMUNIT_OCCURENCES, aszXcptName, 950 "/HM/CPU%u/EventInject/InjectXcpt/%02X", idCpu, j); 951 AssertRC(rc); 952 } 892 953 } 893 954 … … 1911 1972 pVCpu->hm.s.paStatInjectedIrqsR0 = NIL_RTR0PTR; 1912 1973 } 1974 if (pVCpu->hm.s.paStatInjectedXcpts) 1975 { 1976 MMHyperFree(pVM, pVCpu->hm.s.paStatInjectedXcpts); 1977 pVCpu->hm.s.paStatInjectedXcpts = NULL; 1978 pVCpu->hm.s.paStatInjectedXcptsR0 = NIL_RTR0PTR; 1979 } 1913 1980 # if defined(VBOX_WITH_NESTED_HWVIRT_SVM) || defined(VBOX_WITH_NESTED_HWVIRT_VMX) 1914 1981 if (pVCpu->hm.s.paStatNestedExitReason) -
trunk/src/VBox/VMM/include/HMInternal.h
r82968 r83025 1183 1183 R3PTRTYPE(PSTAMCOUNTER) paStatInjectedIrqs; 1184 1184 R0PTRTYPE(PSTAMCOUNTER) paStatInjectedIrqsR0; 1185 R3PTRTYPE(PSTAMCOUNTER) paStatInjectedXcpts; 1186 R0PTRTYPE(PSTAMCOUNTER) paStatInjectedXcptsR0; 1185 1187 R3PTRTYPE(PSTAMCOUNTER) paStatNestedExitReason; 1186 1188 R0PTRTYPE(PSTAMCOUNTER) paStatNestedExitReasonR0;
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