Changeset 83066 in vbox for trunk

Timestamp:

Feb 13, 2020 4:15:25 AM (5 years ago)

Author:

vboxsync

Message:

VMM/HM: SVM: Drop 32-bit guest switcher and use the 64-bit switcher for all guest code.

Location:

trunk/src/VBox/VMM/VMMR0

Files:

• HMR0A.asm (modified) (1 diff)
• HMSVMR0.cpp (modified) (3 diffs)
• HMSVMR0.h (modified) (1 diff)

trunk/src/VBox/VMM/VMMR0/HMR0A.asm

@@ -1521 +1521 @@
 
 
+%ifdef RT_ARCH_AMD64
 ;;
-; Prepares for and executes VMRUN (32-bit register context guests)
-;
-; @returns  VBox status code
-; @param    HCPhysVmcbHost  msc:rcx,gcc:rdi     Physical address of host VMCB.
-; @param    HCPhysVmcb      msc:rdx,gcc:rsi     Physical address of guest VMCB.
-; @param    pCtx            msc:r8,gcc:rdx      Pointer to the guest CPU-context.
-; @param    pVM             msc:r9,gcc:rcx      The cross context VM structure.
-; @param    pVCpu           msc:[rsp+28],gcc:r8 The cross context virtual CPU structure of the calling EMT.
-;
-ALIGNCODE(16)
-BEGINPROC SVMR0VMRun32
-%ifdef RT_ARCH_AMD64 ; fake a cdecl stack frame
- %ifdef ASM_CALL64_GCC
-    push    r8                ; pVCpu
-    push    rcx               ; pVM
-    push    rdx               ; pCtx
-    push    rsi               ; HCPhysVmcb
-    push    rdi               ; HCPhysVmcbHost
- %else
-    mov     rax, [rsp + 28h]
-    push    rax               ; pVCpu
-    push    r9                ; pVM
-    push    r8                ; pCtx
-    push    rdx               ; HCPhysVmcb
-    push    rcx               ; HCPhysVmcbHost
- %endif
-    push    0
-%endif
-    push    xBP
-    mov     xBP, xSP
-    pushf
-
-    ; Save all general purpose host registers.
-    MYPUSHAD
-
-    ; Load pCtx into xSI.
-    mov     xSI, [xBP + xCB * 2 + RTHCPHYS_CB * 2]  ; pCtx
-
-    ; Save the host XCR0 and load the guest one if necessary.
-    mov     xAX, [xBP + xCB * 2 + RTHCPHYS_CB * 2 + xCB * 2] ; pVCpu
-    test    byte [xAX + VMCPU.hm + HMCPU.fLoadSaveGuestXcr0], 1
-    jz      .xcr0_before_skip
-
-    xor     ecx, ecx
-    xgetbv                                  ; Save the host XCR0 on the stack
-    push    xDX
-    push    xAX
-
-    mov     xSI, [xBP + xCB * 2 + RTHCPHYS_CB * 2]  ; pCtx
-    mov     eax, [xSI + CPUMCTX.aXcr]       ; load the guest XCR0
-    mov     edx, [xSI + CPUMCTX.aXcr + 4]
-    xor     ecx, ecx                        ; paranoia
-    xsetbv
-
-    push    0                               ; indicate that we must restore XCR0 (popped into ecx, thus 0)
-    jmp     .xcr0_before_done
-
-.xcr0_before_skip:
-    push    3fh                             ; indicate that we need not restore XCR0
-.xcr0_before_done:
-
-    ; Save guest CPU-context pointer for simplifying saving of the GPRs afterwards.
-    push    xSI
-
-    ; Save host fs, gs, sysenter msr etc.
-    mov     xAX, [xBP + xCB * 2]                    ; HCPhysVmcbHost (64 bits physical address; x86: take low dword only)
-    push    xAX                                     ; save for the vmload after vmrun
-    vmsave
-
-    ; Fight spectre.
-    INDIRECT_BRANCH_PREDICTION_BARRIER xSI, CPUMCTX_WSF_IBPB_ENTRY
-
-    ; Setup xAX for VMLOAD.
-    mov     xAX, [xBP + xCB * 2 + RTHCPHYS_CB]      ; HCPhysVmcb (64 bits physical address; x86: take low dword only)
-
-    ; Load guest general purpose registers.
-    ; eax is loaded from the VMCB by VMRUN.
-    mov     ebx, [xSI + CPUMCTX.ebx]
-    mov     ecx, [xSI + CPUMCTX.ecx]
-    mov     edx, [xSI + CPUMCTX.edx]
-    mov     edi, [xSI + CPUMCTX.edi]
-    mov     ebp, [xSI + CPUMCTX.ebp]
-    mov     esi, [xSI + CPUMCTX.esi]
-
-    ; Clear the global interrupt flag & execute sti to make sure external interrupts cause a world switch.
-    clgi
-    sti
-
-    ; Load guest fs, gs, sysenter msr etc.
-    vmload
-
-    ; Run the VM.
-    vmrun
-
-    ; Save guest fs, gs, sysenter msr etc.
-    vmsave
-
-    ; Load host fs, gs, sysenter msr etc.
-    pop     xAX                             ; load HCPhysVmcbHost (pushed above)
-    vmload
-
-    ; Set the global interrupt flag again, but execute cli to make sure IF=0.
-    cli
-    stgi
-
-    ; Pop the context pointer (pushed above) and save the guest GPRs (sans RSP and RAX).
-    pop     xAX
-
-    mov     [ss:xAX + CPUMCTX.ebx], ebx
-    mov     xBX, SPECTRE_FILLER
-    mov     [ss:xAX + CPUMCTX.ecx], ecx
-    mov     xCX, xBX
-    mov     [ss:xAX + CPUMCTX.edx], edx
-    mov     xDX, xBX
-    mov     [ss:xAX + CPUMCTX.esi], esi
-    mov     xSI, xBX
-    mov     [ss:xAX + CPUMCTX.edi], edi
-    mov     xDI, xBX
-    mov     [ss:xAX + CPUMCTX.ebp], ebp
-    mov     xBP, xBX
-
-    ; Fight spectre.  Note! Trashes xAX!
-    INDIRECT_BRANCH_PREDICTION_BARRIER ss:xAX, CPUMCTX_WSF_IBPB_EXIT
-
-    ; Restore the host xcr0 if necessary.
-    pop     xCX
-    test    ecx, ecx
-    jnz     .xcr0_after_skip
-    pop     xAX
-    pop     xDX
-    xsetbv                              ; ecx is already zero
-.xcr0_after_skip:
-
-    ; Restore host general purpose registers.
-    MYPOPAD
-
-    mov     eax, VINF_SUCCESS
-
-    popf
-    pop     xBP
-%ifdef RT_ARCH_AMD64
-    add     xSP, 6*xCB
-%endif
-    ret
-ENDPROC SVMR0VMRun32
-
-
-%ifdef RT_ARCH_AMD64
-;;
-; Prepares for and executes VMRUN (64-bit register context)
+; Prepares for and executes VMRUN (32-bit and 64-bit guests).
 ;
 ; @returns  VBox status code

trunk/src/VBox/VMM/VMMR0/HMSVMR0.cpp

@@ -742 +742 @@
 
         /*
+         * Initialize the hardware-assisted SVM guest-execution handler.
+         * We now use a single handler for both 32-bit and 64-bit guests, see @bugref{6208#c73}.
+         */
+        pVCpu->hm.s.svm.pfnVMRun = SVMR0VMRun;
+
+        /*
          * Allocate one page for the host-context VM control block (VMCB). This is used for additional host-state (such as
          * FS, GS, Kernel GS Base, etc.) apart from the host-state save area specified in MSR_K8_VM_HSAVE_PA.
@@ -2178 +2184 @@
 
 /**
- * Selects the appropriate function to run guest code.
- *
- * @param   pVCpu   The cross context virtual CPU structure.
- *
- * @remarks No-long-jump zone!!!
- */
-DECLINLINE(void) hmR0SvmSelectVMRunHandler(PVMCPUCC pVCpu)
-{
-    if (pVCpu->CTX_SUFF(pVM)->hm.s.fAllow64BitGuests)
-    {
-# if HC_ARCH_BITS != 64 || ARCH_BITS != 64
-#  error "Only 64-bit hosts are supported!"
-# endif
-        /* Guest may enter long mode, always use 64-bit handler. */
-        pVCpu->hm.s.svm.pfnVMRun = SVMR0VMRun;
-    }
-    else
-    {
-        /* Guest is 32-bit only, use the 32-bit handler. */
-        pVCpu->hm.s.svm.pfnVMRun = SVMR0VMRun32;
-    }
-}
-
-
-/**
  * Enters the AMD-V session.
  *
@@ -2355 +2336 @@
         hmR0SvmExportGuestXcptIntercepts(pVCpu, pVmcb);
     }
-
-    hmR0SvmSelectVMRunHandler(pVCpu);
 
     /* Clear any bits that may be set but exported unconditionally or unused/reserved bits. */

trunk/src/VBox/VMM/VMMR0/HMSVMR0.h

@@ -54 +54 @@
 
 /**
- * Prepares for and executes VMRUN (32-bit register context).
- *
- * @returns VBox status code.
- * @param   pVMCBHostPhys   Physical address of host VMCB.
- * @param   pVMCBPhys       Physical address of the VMCB.
- * @param   pCtx            Pointer to the guest CPU context.
- * @param   pVM             The cross context VM structure. (Not used.)
- * @param   pVCpu           The cross context virtual CPU structure. (Not used.)
- */
-DECLASM(int) SVMR0VMRun32(RTHCPHYS pVMCBHostPhys, RTHCPHYS pVMCBPhys, PCPUMCTX pCtx, PVMCC pVM, PVMCPUCC pVCpu);
-
-
-/**
  * Prepares for and executes VMRUN (64-bit register context).
  *