VirtualBox

Changeset 83263 in vbox


Ignore:
Timestamp:
Mar 11, 2020 4:34:33 PM (5 years ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
136414
Message:

AMD IOMMU: bugref:9654 Skeletal bits.

Location:
trunk
Files:
11 edited

Legend:

Unmodified
Added
Removed
  • trunk/Config.kmk

    r83262 r83263  
    612612# Enables the new serial port implementation
    613613VBOX_WITH_NEW_SERIAL = 1
     614# Enables the AMD IOMMU
     615#VBOX_WITH_IOMMU_AMD = 1
    614616## @}
    615617
  • trunk/include/VBox/log.h

    r82968 r83263  
    121121    /** I/O APIC Device group. */
    122122    LOG_GROUP_DEV_IOAPIC,
     123    /** IOMMU Device group. */
     124    LOG_GROUP_DEV_IOMMU,
    123125    /** KeyBoard Controller Device group. */
    124126    LOG_GROUP_DEV_KBD,
     
    793795    "DEV_INIP", \
    794796    "DEV_IOAPIC", \
     797    "DEV_IOMMU", \
    795798    "DEV_KBD", \
    796799    "DEV_LPC", \
  • trunk/include/VBox/vmm/pdmdev.h

    r82968 r83263  
    12431243
    12441244/**
     1245 * IOMMU registration structure for ring-0.
     1246 */
     1247typedef struct PDMIOMMUREGR0
     1248{
     1249    /** Structure version number. PDM_IOMMUREG_VERSION defines the current
     1250     *  version. */
     1251    uint32_t            u32Version;
     1252    /** Index into the PDM IOMMU array (PDM::aIommus) from ring-3. */
     1253    uint32_t            idxIommu;
     1254    /** Just a safety precaution. */
     1255    uint32_t            u32TheEnd;
     1256} PDMIOMMUREGR0;
     1257/** Pointer to a IOMMU registration structure. */
     1258typedef PDMIOMMUREGR0 *PPDMIOMMUREGR0;
     1259
     1260/** Current PDMIOMMUREG version number. */
     1261#define PDM_IOMMUREGR0_VERSION                      PDM_VERSION_MAKE(0xff10, 1, 0)
     1262
     1263
     1264/**
     1265 * IOMMU registration structure for raw-mode.
     1266 */
     1267typedef struct PDMIOMMUREGRC
     1268{
     1269    /** Structure version number. PDM_IOMMUREG_VERSION defines the current
     1270     *  version. */
     1271    uint32_t            u32Version;
     1272    /** Index into the PDM IOMMU array (PDM::aIommus) from ring-3. */
     1273    uint32_t            idxIommu;
     1274    /** Just a safety precaution. */
     1275    uint32_t            u32TheEnd;
     1276} PDMIOMMUREGRC;
     1277/** Pointer to a IOMMU registration structure. */
     1278typedef PDMIOMMUREGRC *PPDMIOMMUREGRC;
     1279
     1280/** Current PDMIOMMUREG version number. */
     1281#define PDM_IOMMUREGRC_VERSION                      PDM_VERSION_MAKE(0xff11, 1, 0)
     1282
     1283
     1284/**
     1285 * IOMMU registration structure for ring-3.
     1286 */
     1287typedef struct PDMIOMMUREGR3
     1288{
     1289    /** Structure version number. PDM_IOMMUREG_VERSION defines the current
     1290     *  version. */
     1291    uint32_t            u32Version;
     1292    /** Just a safety precaution. */
     1293    uint32_t            u32TheEnd;
     1294} PDMIOMMUREGR3;
     1295/** Pointer to a IOMMU registration structure. */
     1296typedef PDMIOMMUREGR3 *PPDMIOMMUREGR3;
     1297
     1298/** Current PDMIOMMUREG version number. */
     1299#define PDM_IOMMUREGR3_VERSION                      PDM_VERSION_MAKE(0xff12, 1, 0)
     1300
     1301/** IOMMU registration structure for the current context. */
     1302typedef CTX_SUFF(PDMIOMMUREG)  PDMIOMMUREGCC;
     1303/** Pointer to an IOMMU registration structure for the current context. */
     1304typedef CTX_SUFF(PPDMIOMMUREG) PPDMIOMMUREGCC;
     1305/** IOMMU registration structure version for the current context. */
     1306#define PDM_IOMMUREGCC_VERSION CTX_MID(PDM_IOMMUREG,_VERSION)
     1307
     1308
     1309/**
     1310 * IOMMU helpers for ring-0.
     1311 */
     1312typedef struct PDMIOMMUHLPR0
     1313{
     1314    /** Structure version. PDM_IOMMUHLP_VERSION defines the current version. */
     1315    uint32_t                u32Version;
     1316    /** Just a safety precaution. */
     1317    uint32_t                u32TheEnd;
     1318} PDMIOMMUHLPR0;
     1319/** Pointer to IOMMU helpers for ring-0. */
     1320typedef PDMIOMMUHLPR0 *PPDMIOMMUHLPR0;
     1321/** Pointer to const IOMMU helpers for ring-0. */
     1322typedef const PDMIOMMUHLPR0 *PCPDMIOMMUHLPR0;
     1323
     1324/** Current PDMIOMMUHLPR0 version number. */
     1325#define PDM_IOMMUHLPR0_VERSION                      PDM_VERSION_MAKE(0xff13, 1, 0)
     1326
     1327
     1328/**
     1329 * IOMMU helpers for raw-mode.
     1330 */
     1331typedef struct PDMIOMMUHLPRC
     1332{
     1333    /** Structure version. PDM_IOMMUHLP_VERSION defines the current version. */
     1334    uint32_t                u32Version;
     1335    /** Just a safety precaution. */
     1336    uint32_t                u32TheEnd;
     1337} PDMIOMMUHLPRC;
     1338/** Pointer to IOMMU helpers for raw-mode. */
     1339typedef PDMIOMMUHLPRC *PPDMIOMMUHLPRC;
     1340/** Pointer to const IOMMU helpers for raw-mode. */
     1341typedef const PDMIOMMUHLPRC *PCPDMIOMMUHLPRC;
     1342
     1343/** Current PDMIOMMUHLPRC version number. */
     1344#define PDM_IOMMUHLPRC_VERSION                      PDM_VERSION_MAKE(0xff14, 1, 0)
     1345
     1346
     1347/**
     1348 * IOMMU helpers for ring-3.
     1349 */
     1350typedef struct PDMIOMMUHLPR3
     1351{
     1352    /** Structure version. PDM_IOMMUHLP_VERSION defines the current version. */
     1353    uint32_t                u32Version;
     1354    /** Just a safety precaution. */
     1355    uint32_t                u32TheEnd;
     1356} PDMIOMMUHLPR3;
     1357/** Pointer to IOMMU helpers for raw-mode. */
     1358typedef PDMIOMMUHLPR3 *PPDMIOMMUHLPR3;
     1359/** Pointer to const IOMMU helpers for raw-mode. */
     1360typedef const PDMIOMMUHLPR3 *PCPDMIOMMUHLPR3;
     1361
     1362/** Current PDMIOMMUHLPR3 version number. */
     1363#define PDM_IOMMUHLPR3_VERSION                      PDM_VERSION_MAKE(0xff15, 1, 0)
     1364
     1365
     1366/**
    12451367 * Programmable Interrupt Controller registration structure (all contexts).
    12461368 */
     
    19642086
    19652087/** Current PDMDEVHLPR3 version number. */
    1966 #define PDM_DEVHLPR3_VERSION                    PDM_VERSION_MAKE_PP(0xffe7, 41, 0)
     2088#define PDM_DEVHLPR3_VERSION                    PDM_VERSION_MAKE_PP(0xffe7, 42, 0)
    19672089
    19682090/**
     
    34363558
    34373559    /**
     3560     * Register the IOMMU device.
     3561     *
     3562     * @returns VBox status code.
     3563     * @param   pDevIns             The device instance.
     3564     * @param   pIommuReg           Pointer to a IOMMU registration structure.
     3565     * @param   ppIommuHlp          Where to store the pointer to the ring-3 IOMMU
     3566     *                              helpers.
     3567     */
     3568    DECLR3CALLBACKMEMBER(int, pfnIommuRegister,(PPDMDEVINS pDevIns, PPDMIOMMUREGR3 pIommuReg, PCPDMIOMMUHLPR3 *ppIommuHlp));
     3569
     3570    /**
    34383571     * Register the PIC device.
    34393572     *
     
    72207353
    72217354/**
     7355 * @copydoc PDMDEVHLPR3::pfnIommuRegister
     7356 */
     7357DECLINLINE(int) PDMDevHlpIommuRegister(PPDMDEVINS pDevIns, PPDMIOMMUREGR3 pIommuReg, PCPDMIOMMUHLPR3 *ppIommuHlp)
     7358{
     7359    return pDevIns->pHlpR3->pfnIommuRegister(pDevIns, pIommuReg, ppIommuHlp);
     7360}
     7361
     7362/**
    72227363 * @copydoc PDMDEVHLPR3::pfnPICRegister
    72237364 */
  • trunk/include/VBox/vmm/vm.h

    r82990 r83263  
    13151315        struct PDM s;
    13161316#endif
    1317         uint8_t     padding[7808];      /* multiple of 64 */
     1317        uint8_t     padding[8064];      /* multiple of 64 */
    13181318    } pdm;
    13191319
     
    14501450
    14511451    /** Padding for aligning the structure size on a page boundrary. */
    1452     uint8_t         abAlignment2[600 - 64 + 256 - sizeof(PVMCPUR3) * VMM_MAX_CPU_COUNT];
     1452    uint8_t         abAlignment2[600 - 256 - 64 + 256 - sizeof(PVMCPUR3) * VMM_MAX_CPU_COUNT];
    14531453
    14541454    /* ---- end small stuff ---- */
  • trunk/include/VBox/vmm/vm.mac

    r82990 r83263  
    126126    .selm                   resb 768
    127127    .mm                     resb 192
    128     .pdm                    resb 7808
     128    .pdm                    resb 8064
    129129    .iom                    resb 1152
    130130    .em                     resb 256
     
    139139    .R0Stats                resb 64
    140140
    141     .abAlignment2           resb 600 - 64 + 256 - RTR0PTR_CB * VMM_MAX_CPU_COUNT
     141    .abAlignment2           resb 600 - 256 - 64 + 256 - RTR0PTR_CB * VMM_MAX_CPU_COUNT
    142142
    143143    alignb RTR0PTR_CB * VMM_MAX_CPU_COUNT ; ASSUMES VMM_MAX_CPU_COUNT is a power of two.
  • trunk/src/VBox/Devices/Bus/DevIommuAmd.cpp

    r83241 r83263  
    619619        uint32_t    u2Type : 2;             /**< Bits 58:57  - Type: The type of hardware error. */
    620620        uint32_t    u1Rsvd1 : 1;            /**< Bit  59     - Reserved. */
    621         uint16_t    u4EventCode : 4;        /**< Bits 63:60  - Event code. */
     621        uint32_t    u4EventCode : 4;        /**< Bits 63:60  - Event code. */
    622622        uint32_t    u4Rsvd0 : 4;            /**< Bits 67:64  - Reserved. */
    623623        uint32_t    u28AddrLo : 28;         /**< Bits 95:68  - Address: System Physical Address (Lo). */
     
    820820 * @interface_method_impl{PDMDEVREG,pfnReset}
    821821 */
    822 static DECLCALLBACK(void) iommuR3Reset(PPDMDEVINS pDevIns)
     822static DECLCALLBACK(void) iommuAmdR3Reset(PPDMDEVINS pDevIns)
    823823{
    824824    NOREF(pDevIns);
     
    829829 * @interface_method_impl{PDMDEVREG,pfnDestruct}
    830830 */
    831 static DECLCALLBACK(int) iommuR3Destruct(PPDMDEVINS pDevIns)
     831static DECLCALLBACK(int) iommuAmdR3Destruct(PPDMDEVINS pDevIns)
    832832{
    833833    NOREF(pDevIns);
     
    839839 * @interface_method_impl{PDMDEVREG,pfnConstruct}
    840840 */
    841 static DECLCALLBACK(int) iommuR3Construct(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfg)
     841static DECLCALLBACK(int) iommuAmdR3Construct(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfg)
    842842{
    843843    NOREF(iInstance);
     
    865865 * @callback_method_impl{PDMDEVREGR0,pfnConstruct}
    866866 */
    867 static DECLCALLBACK(int) iommuRZConstruct(PPDMDEVINS pDevIns)
     867static DECLCALLBACK(int) iommuAmdRZConstruct(PPDMDEVINS pDevIns)
    868868{
    869869    PDMDEV_CHECK_VERSIONS_RETURN(pDevIns);
     
    876876 * The device registration structure.
    877877 */
    878 const PDMDEVREG g_DeviceIommu =
     878const PDMDEVREG g_DeviceIommuAmd =
    879879{
    880880    /* .u32Version = */             PDM_DEVREG_VERSION,
    881881    /* .uReserved0 = */             0,
    882     /* .szName = */                 "iommu",
     882    /* .szName = */                 "iommu-amd",
    883883    /* .fFlags = */                 PDM_DEVREG_FLAGS_DEFAULT_BITS | PDM_DEVREG_FLAGS_RZ | PDM_DEVREG_FLAGS_NEW_STYLE,
    884     /* .fClass = */                 PDM_DEVREG_CLASS_BUS_PCI,  /** @todo IOMMU: We want to be instantiated
    885                                                                    before PDM_DEVREG_CLASS_BUS_PCI? Maybe doesn't matter? */
     884    /* .fClass = */                 PDM_DEVREG_CLASS_BUS_ISA,   /* Instantiate after PDM_DEVREG_CLASS_BUS_PCI */
    886885    /* .cMaxInstances = */          ~0U,
    887886    /* .uSharedVersion = */         42,
     
    895894    /* .pszRCMod = */               "VBoxDDRC.rc",
    896895    /* .pszR0Mod = */               "VBoxDDR0.r0",
    897     /* .pfnConstruct = */           iommuR3Construct,
    898     /* .pfnDestruct = */            iommuR3Destruct,
     896    /* .pfnConstruct = */           iommuAmdR3Construct,
     897    /* .pfnDestruct = */            iommuAmdR3Destruct,
    899898    /* .pfnRelocate = */            NULL,
    900899    /* .pfnMemSetup = */            NULL,
    901900    /* .pfnPowerOn = */             NULL,
    902     /* .pfnReset = */               iommuR3Reset,
     901    /* .pfnReset = */               iommuAmdR3Reset,
    903902    /* .pfnSuspend = */             NULL,
    904903    /* .pfnResume = */              NULL,
     
    919918#elif defined(IN_RING0)
    920919    /* .pfnEarlyConstruct = */      NULL,
    921     /* .pfnConstruct = */           iommuRZConstruct,
     920    /* .pfnConstruct = */           iommuAmdRZConstruct,
    922921    /* .pfnDestruct = */            NULL,
    923922    /* .pfnFinalDestruct = */       NULL,
     
    932931    /* .pfnReserved7 = */           NULL,
    933932#elif defined(IN_RC)
    934     /* .pfnConstruct = */           iommuRZConstruct,
     933    /* .pfnConstruct = */           iommuAmdRZConstruct,
    935934    /* .pfnReserved0 = */           NULL,
    936935    /* .pfnReserved1 = */           NULL,
  • trunk/src/VBox/Devices/Makefile.kmk

    r83261 r83263  
    154154        Bus/MsiCommon.cpp \
    155155        Bus/MsixCommon.cpp \
     156        $(if $(VBOX_WITH_IOMMU_AMD),Bus/DevIommuAmd.cpp,) \
    156157        EFI/DevSmc.cpp \
    157158        EFI/DevFlash.cpp \
     
    923924        Bus/MsiCommon.cpp \
    924925        Bus/MsixCommon.cpp \
     926        $(if $(VBOX_WITH_IOMMU_AMD),Bus/DevIommuAmd.cpp,) \
    925927        EFI/DevSmc.cpp \
    926928        Graphics/DevVGA.cpp \
     
    11071109        Bus/MsiCommon.cpp \
    11081110        Bus/MsixCommon.cpp \
     1111        $(if $(VBOX_WITH_IOMMU_AMD),Bus/DevIommuAmd.cpp,) \
    11091112        EFI/DevSmc.cpp \
    11101113        EFI/DevFlash.cpp \
  • trunk/src/VBox/Devices/testcase/tstDevicePdmDevHlp.cpp

    r83261 r83263  
    46224622
    46234623    LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc *piBus=%u\n", pDevIns->pReg->szName, pDevIns->iInstance, rc, *piBus));
     4624    return rc;
     4625}
     4626
     4627
     4628/** @interface_method_impl{PDMDEVHLPR3,pfnIommuRegister} */
     4629static DECLCALLBACK(int) pdmR3DevHlp_IommuRegister(PPDMDEVINS pDevIns, PPDMIOMMUREG pIommuReg, PCPDMIOMMUHLP *ppIommuHlp)
     4630{
     4631    PDMDEV_ASSERT_DEVINS(pDevIns);
     4632    LogFlow(("pdmR3DevHlp_IommuRegister: caller='%s'/%d: pIommuReg=%p:{.u32Version=%#x, .u32TheEnd=%#x } ppIommuHlp=%p\n",
     4633             pDevIns->pReg->szName, pDevIns->iInstance, pIommuReg, pIommuReg->u32Version, pIommuReg->u32TheEnd, ppIommuHlp));
     4634
     4635    /*
     4636     * Validate input.
     4637     */
     4638    AssertMsgReturn(pIommuReg->u32Version == PDM_IOMMUREG_VERSION,
     4639                    ("%s/%d: u32Version=%#x expected %#x\n", pDevIns->pReg->szName, pDevIns->iInstance, pIommuReg->u32Version, PDM_IOMMUREG_VERSION),
     4640                    VERR_INVALID_PARAMETER);
     4641
     4642    /** @todo IOMMU: Validate other parameters */
     4643
     4644    AssertMsgReturn(pIommuReg->u32TheEnd == PDM_IOMMUREG_VERSION,
     4645                    ("%s/%d: u32TheEnd=%#x expected %#x\n", pDevIns->pReg->szName, pDevIns->iInstance, pIommuReg->u32TheEnd, PDM_IOMMUREG_VERSION),
     4646                    VERR_INVALID_PARAMETER);
     4647    AssertPtrReturn(ppIommuHlp, VERR_INVALID_POINTER);
     4648
     4649    int rc = VERR_NOT_IMPLEMENTED;
     4650    AssertFailed();
     4651    Log(("PDM: Registered IOMMU device '%s'/%d pDevIns=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, pDevIns));
     4652
     4653    LogFlow(("pdmR3DevHlp_IommuRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
    46244654    return rc;
    46254655}
  • trunk/src/VBox/VMM/VMMR3/PDMDevHlp.cpp

    r82968 r83263  
    32453245    return VINF_SUCCESS;
    32463246}
     3247
     3248
     3249/** @interface_method_impl{PDMDEVHLPR3,pfnIommuRegister} */
     3250static DECLCALLBACK(int) pdmR3DevHlp_IommuRegister(PPDMDEVINS pDevIns, PPDMIOMMUREGR3 pIommuReg, PCPDMIOMMUHLPR3 *ppIommuHlp)
     3251{
     3252    PDMDEV_ASSERT_DEVINS(pDevIns);
     3253    VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
     3254    LogFlow(("pdmR3DevHlp_IommuRegister: caller='%s'/%d: pIommuReg=%p:{.u32Version=%#x, .u32TheEnd=%#x } ppIommuHlp=%p\n",
     3255             pDevIns->pReg->szName, pDevIns->iInstance, pIommuReg, pIommuReg->u32Version, pIommuReg->u32TheEnd, ppIommuHlp));
     3256    PVM pVM = pDevIns->Internal.s.pVMR3;
     3257
     3258    /*
     3259     * Validate input.
     3260     */
     3261    AssertMsgReturn(pIommuReg->u32Version == PDM_IOMMUREGR3_VERSION,
     3262                    ("%s/%d: u32Version=%#x expected %#x\n", pDevIns->pReg->szName, pDevIns->iInstance, pIommuReg->u32Version, PDM_IOMMUREGR3_VERSION),
     3263                    VERR_INVALID_PARAMETER);
     3264    /** @todo IOMMU: Validate other parameters, see also tstDevicePdmDevHlp.cpp. */
     3265    AssertMsgReturn(pIommuReg->u32TheEnd == PDM_IOMMUREGR3_VERSION,
     3266                    ("%s/%d: u32TheEnd=%#x expected %#x\n", pDevIns->pReg->szName, pDevIns->iInstance, pIommuReg->u32TheEnd, PDM_IOMMUREGR3_VERSION),
     3267                    VERR_INVALID_PARAMETER);
     3268    AssertPtrReturn(ppIommuHlp, VERR_INVALID_POINTER);
     3269
     3270    VM_ASSERT_STATE_RETURN(pVM, VMSTATE_CREATING, VERR_WRONG_ORDER);
     3271    VM_ASSERT_EMT0_RETURN(pVM, VERR_VM_THREAD_NOT_EMT);
     3272
     3273    /*
     3274     * Find free IOMMU slot.
     3275     */
     3276    unsigned idxIommu = 0;
     3277    for (idxIommu = 0; idxIommu < RT_ELEMENTS(pVM->pdm.s.aIommus); idxIommu++)
     3278        if (!pVM->pdm.s.aIommus[idxIommu].pDevInsR3)
     3279            break;
     3280    AssertLogRelMsgReturn(idxIommu < RT_ELEMENTS(pVM->pdm.s.aIommus),
     3281                          ("Too many IOMMUs. Max=%u\n", RT_ELEMENTS(pVM->pdm.s.aIommus)),
     3282                          VERR_OUT_OF_RESOURCES);
     3283    PPDMIOMMU pIommu = &pVM->pdm.s.aIommus[idxIommu];
     3284
     3285    /*
     3286     * Init the R3 bits.
     3287     */
     3288    pIommu->idxIommu = idxIommu;
     3289    pIommu->pDevInsR3 = pDevIns;
     3290    Log(("PDM: Registered IOMMU device '%s'/%d pDevIns=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, pDevIns));
     3291
     3292    /* Set the helper pointer and return. */
     3293    *ppIommuHlp = &g_pdmR3DevIommuHlp;
     3294    LogFlow(("pdmR3DevHlp_IommuRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS));
     3295    return VINF_SUCCESS;
     3296}
     3297
    32473298
    32483299
     
    41184169    pdmR3DevHlp_RTCRegister,
    41194170    pdmR3DevHlp_PCIBusRegister,
     4171    pdmR3DevHlp_IommuRegister,
    41204172    pdmR3DevHlp_PICRegister,
    41214173    pdmR3DevHlp_ApicRegister,
     
    46024654    pdmR3DevHlp_RTCRegister,
    46034655    pdmR3DevHlp_PCIBusRegister,
     4656    pdmR3DevHlp_IommuRegister,
    46044657    pdmR3DevHlp_PICRegister,
    46054658    pdmR3DevHlp_ApicRegister,
  • trunk/src/VBox/VMM/VMMR3/PDMDevMiscHlp.cpp

    r82968 r83263  
    236236
    237237
     238/**
     239 * IOMMU Device Helpers.
     240 */
     241const PDMIOMMUHLPR3 g_pdmR3DevIommuHlp =
     242{
     243    PDM_IOMMUHLPR3_VERSION,
     244    PDM_IOMMUHLPR3_VERSION /* the end */
     245};
    238246
    239247
  • trunk/src/VBox/VMM/include/PDMInternal.h

    r82968 r83263  
    107107/** Pointer to a PDM PCI Bus instance. */
    108108typedef struct PDMPCIBUS *PPDMPCIBUS;
     109/** Pointer to a PDM IOMMU instance. */
     110typedef struct PDMIOMMU *PPDMIOMMU;
    109111/** Pointer to a DMAC instance. */
    110112typedef struct PDMDMAC *PPDMDMAC;
     
    617619
    618620/**
     621 * PDM registered IOMMU device.
     622 */
     623typedef struct PDMIOMMU
     624{
     625    /** IOMMU index. */
     626    uint32_t                        idxIommu;
     627    uint32_t                        uPadding0; /**< Alignment padding.*/
     628
     629    /** Pointer to the IOMMU device instance - R3. */
     630    PPDMDEVINSR3                    pDevInsR3;
     631
     632    /** Pointer to the IOMMU device instance - R0. */
     633    PPDMDEVINSR0                    pDevInsR0;
     634
     635    /** Pointer to the IOMMU device instance - RC. */
     636    PPDMDEVINSRC                    pDevInsRC;
     637    RTRCPTR                         RCPtrPadding;
     638} PDMIOMMU;
     639
     640
     641/**
    619642 * PDM registered PIC device.
    620643 */
     
    695718
    696719/** Maximum number of PCI busses for a VM. */
    697 #define PDM_PCI_BUSSES_MAX 8
     720#define PDM_PCI_BUSSES_MAX  8
     721/** Maximum number of IOMMUs (at most one per PCI bus). */
     722#define PDM_IOMMUS_MAX      PDM_PCI_BUSSES_MAX
    698723
    699724
     
    12251250    /** PCI Buses. */
    12261251    PDMPCIBUS                       aPciBuses[PDM_PCI_BUSSES_MAX];
     1252    /** IOMMU devices. */
     1253    PDMIOMMU                        aIommus[PDM_IOMMUS_MAX];
    12271254    /** The register PIC device. */
    12281255    PDMPIC                          Pic;
     
    13941421extern const PDMFWHLPR3     g_pdmR3DevFirmwareHlp;
    13951422extern const PDMPCIHLPR3    g_pdmR3DevPciHlp;
     1423extern const PDMIOMMUHLPR3  g_pdmR3DevIommuHlp;
    13961424extern const PDMDMACHLP     g_pdmR3DevDmacHlp;
    13971425extern const PDMRTCHLP      g_pdmR3DevRtcHlp;
Note: See TracChangeset for help on using the changeset viewer.

© 2025 Oracle Support Privacy / Do Not Sell My Info Terms of Use Trademark Policy Automated Access Etiquette