VirtualBox

Ignore:
Timestamp:
Apr 23, 2020 10:22:56 AM (5 years ago)
Author:
vboxsync
Message:

AMD IOMMU: bugref:9654 Hook into PCIPhys[Read|Write] for intercepting and translating device accesses through the IOMMU.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/src/VBox/VMM/VMMR3/PDMDevHlp.cpp

    r83850 r83941  
    17871787#endif
    17881788
     1789#ifdef VBOX_WITH_IOMMU_AMD
     1790    /** @todo IOMMU: Optimize/re-organize things here later. */
     1791    PVM        pVM          = pDevIns->Internal.s.pVMR3;
     1792    PPDMIOMMU  pIommu       = &pVM->pdm.s.aIommus[0];
     1793    PPDMDEVINS pDevInsIommu = pIommu->CTX_SUFF(pDevIns);
     1794    if (   pDevInsIommu
     1795        && pDevInsIommu != pDevIns)
     1796    {
     1797        RTGCPHYS GCPhysOut;
     1798        uint16_t const uDeviceId = VBOX_PCI_BUSDEVFN_MAKE(pPciDev->Int.s.idxPdmBus, pPciDev->uDevFn);
     1799        int rc = pIommu->pfnMemRead(pDevInsIommu, uDeviceId, GCPhys, cbRead, &GCPhysOut);
     1800        if (RT_FAILURE(rc))
     1801        {
     1802            Log(("pdmR3DevHlp_PCIPhysRead: IOMMU translation failed. uDeviceId=%#x GCPhys=%#RGp cb=%u rc=%Rrc\n", uDeviceId,
     1803                 GCPhys, cbRead, rc));
     1804            return rc;
     1805        }
     1806    }
     1807#endif
     1808
    17891809    return pDevIns->pHlpR3->pfnPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
    17901810}
     
    18121832             pDevIns->pReg->szName, pDevIns->iInstance, VERR_PDM_NOT_PCI_BUS_MASTER, GCPhys, cbWrite));
    18131833        return VERR_PDM_NOT_PCI_BUS_MASTER;
     1834    }
     1835#endif
     1836
     1837#ifdef VBOX_WITH_IOMMU_AMD
     1838    /** @todo IOMMU: Optimize/re-organize things here later. */
     1839    PVM        pVM          = pDevIns->Internal.s.pVMR3;
     1840    PPDMIOMMU  pIommu       = &pVM->pdm.s.aIommus[0];
     1841    PPDMDEVINS pDevInsIommu = pIommu->CTX_SUFF(pDevIns);
     1842    if (   pDevInsIommu
     1843        && pDevInsIommu != pDevIns)
     1844    {
     1845        RTGCPHYS GCPhysOut;
     1846        uint16_t const uDeviceId = VBOX_PCI_BUSDEVFN_MAKE(pPciDev->Int.s.idxPdmBus, pPciDev->uDevFn);
     1847        int rc = pIommu->pfnMemWrite(pDevInsIommu, uDeviceId, GCPhys, cbWrite, &GCPhysOut);
     1848        if (RT_FAILURE(rc))
     1849        {
     1850            Log(("pdmR3DevHlp_PCIPhysRead: IOMMU translation failed. uDeviceId=%#x GCPhys=%#RGp cb=%u rc=%Rrc\n", uDeviceId,
     1851                 GCPhys, cbWrite, rc));
     1852            return rc;
     1853        }
    18141854    }
    18151855#endif
     
    33153355    /*
    33163356     * Find free IOMMU slot.
     3357     * The IOMMU at the root complex is the one at 0.
    33173358     */
    33183359    unsigned idxIommu = 0;
     
    33283369     * Init the R3 bits.
    33293370     */
    3330     pIommu->idxIommu = idxIommu;
    3331     pIommu->pDevInsR3 = pDevIns;
     3371    pIommu->idxIommu    = idxIommu;
     3372    pIommu->pDevInsR3   = pDevIns;
     3373    pIommu->pfnMemRead  = pIommuReg->pfnMemRead;
     3374    pIommu->pfnMemWrite = pIommuReg->pfnMemWrite;
    33323375    Log(("PDM: Registered IOMMU device '%s'/%d pDevIns=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, pDevIns));
    33333376
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