Changeset 84431 in vbox for trunk/src

Timestamp:

May 21, 2020 8:42:19 AM (5 years ago)

Author:

vboxsync

Message:

AMD IOMMU: bugref:9654 IOMMU interrupt remapping callback skeleton.

Location:

trunk/src/VBox

Files:

• Devices/Bus/DevIommuAmd.cpp (modified) (5 diffs)
• Devices/testcase/tstDevicePdmDevHlp.cpp (modified) (1 diff)
• VMM/VMMR3/PDMDevHlp.cpp (modified) (4 diffs)
• VMM/include/PDMInternal.h (modified) (2 diffs)

trunk/src/VBox/Devices/Bus/DevIommuAmd.cpp

@@ -2266 +2266 @@
     /** The translated system physical address (SPA) of the page. */
     RTGCPHYS        GCPhysSpa;
+    /** The index of the 4K page within a large page. */
+    uint32_t        idxSubPage;
     /** The I/O access permissions (IOMMU_IO_PERM_XXX). */
     uint8_t         fIoPerm;
+    /** The number of offset bits in the translation indicating page size. */
+    uint8_t         cShift;
     /** Alignment padding. */
-    uint8_t         afPadding[7];
+    uint8_t         afPadding[2];
 } IOTLBE_T;
 AssertCompileSize(IOTLBE_T, 16);
@@ -4513 +4517 @@
 
 /**
+ * Interrupt remap request from a device.
+ *
+ * @returns VBox status code.
+ * @param   pDevIns     The IOMMU device instance.
+ * @param   uDevId      The device ID (bus, device, function).
+ * @param   GCPhysIn    The source MSI address.
+ * @param   uDataIn     The source MSI data.
+ * @param   pGCPhysOut  Where to store the remapped MSI address.
+ * @param   puDataOut   Where to store the remapped MSI data.
+ */
+static int iommuAmdDeviceMsiRemap(PPDMDEVINS pDevIns, uint16_t uDevId, RTGCPHYS GCPhysIn, uint32_t uDataIn,
+                                  PRTGCPHYS pGCPhysOut, uint32_t *puDataOut)
+{
+    RT_NOREF(pDevIns, uDevId, GCPhysIn, uDataIn, pGCPhysOut, puDataOut);
+    return VERR_NOT_IMPLEMENTED;
+}
+
+
+/**
  * @callback_method_impl{FNIOMMMIONEWWRITE}
  */
@@ -4544 +4567 @@
     return rcStrict;
 }
-
 
 # ifdef IN_RING3
@@ -5603 +5625 @@
     IommuReg.pfnMemRead  = iommuAmdDeviceMemRead;
     IommuReg.pfnMemWrite = iommuAmdDeviceMemWrite;
+    IommuReg.pfnMsiRemap = iommuAmdDeviceMsiRemap;
     IommuReg.u32TheEnd   = PDM_IOMMUREGCC_VERSION;
     rc = PDMDevHlpIommuRegister(pDevIns, &IommuReg, &pThisCC->CTX_SUFF(pIommuHlp), &pThis->idxIommu);
@@ -5840 +5863 @@
     IommuReg.pfnMemRead  = iommuAmdDeviceMemRead;
     IommuReg.pfnMemWrite = iommuAmdDeviceMemWrite;
+    IommuReg.pfnMsiRemap = iommuAmdDeviceMsiRemap;
     IommuReg.u32TheEnd   = PDM_IOMMUREGCC_VERSION;
     rc = PDMDevHlpIommuSetUpContext(pDevIns, &IommuReg, &pThisCC->CTX_SUFF(pIommuHlp));

trunk/src/VBox/Devices/testcase/tstDevicePdmDevHlp.cpp

@@ -4656 +4656 @@
                     ("%s/%d: u32Version=%#x expected %#x\n", pDevIns->pReg->szName, pDevIns->iInstance, pIommuReg->u32Version, PDM_IOMMUREGR3_VERSION),
                     VERR_INVALID_PARAMETER);
-
-    /** @todo IOMMU: Validate other parameters */
-
+    AssertPtrReturn(pIommuReg->pfnMemRead, VERR_INVALID_POINTER);
+    AssertPtrReturn(pIommuReg->pfnMemWrite, VERR_INVALID_POINTER);
+    AssertPtrReturn(pIommuReg->pfnMsiRemap, VERR_INVALID_POINTER);
     AssertMsgReturn(pIommuReg->u32TheEnd == PDM_IOMMUREGR3_VERSION,
                     ("%s/%d: u32TheEnd=%#x expected %#x\n", pDevIns->pReg->szName, pDevIns->iInstance, pIommuReg->u32TheEnd, PDM_IOMMUREGR3_VERSION),

trunk/src/VBox/VMM/VMMR3/PDMDevHlp.cpp

@@ -3348 +3348 @@
                     ("%s/%d: u32Version=%#x expected %#x\n", pDevIns->pReg->szName, pDevIns->iInstance, pIommuReg->u32Version, PDM_IOMMUREGR3_VERSION),
                     VERR_INVALID_PARAMETER);
-    /** @todo IOMMU: Validate other parameters, see also tstDevicePdmDevHlp.cpp. */
+    AssertPtrReturn(pIommuReg->pfnMemRead, VERR_INVALID_POINTER);
+    AssertPtrReturn(pIommuReg->pfnMemWrite, VERR_INVALID_POINTER);
+    AssertPtrReturn(pIommuReg->pfnMsiRemap, VERR_INVALID_POINTER);
     AssertMsgReturn(pIommuReg->u32TheEnd == PDM_IOMMUREGR3_VERSION,
                     ("%s/%d: u32TheEnd=%#x expected %#x\n", pDevIns->pReg->szName, pDevIns->iInstance, pIommuReg->u32TheEnd, PDM_IOMMUREGR3_VERSION),
@@ -3362 +3364 @@
      */
     unsigned idxIommu = 0;
+#if 0
     for (idxIommu = 0; idxIommu < RT_ELEMENTS(pVM->pdm.s.aIommus); idxIommu++)
         if (!pVM->pdm.s.aIommus[idxIommu].pDevInsR3)
@@ -3368 +3371 @@
                           ("Too many IOMMUs. Max=%u\n", RT_ELEMENTS(pVM->pdm.s.aIommus)),
                           VERR_OUT_OF_RESOURCES);
+#else
+    /* Currently we support only a single IOMMU. */
+    AssertMsgReturn(!pVM->pdm.s.aIommus[0].pDevInsR3,
+                    ("%s/%u: Only one IOMMU device is supported!\n", pDevIns->pReg->szName, pDevIns->iInstance),
+                    VERR_ALREADY_EXISTS);
+#endif
     PPDMIOMMU pIommu = &pVM->pdm.s.aIommus[idxIommu];
 
@@ -3377 +3386 @@
     pIommu->pfnMemRead  = pIommuReg->pfnMemRead;
     pIommu->pfnMemWrite = pIommuReg->pfnMemWrite;
+    pIommu->pfnMsiRemap = pIommuReg->pfnMsiRemap;
     Log(("PDM: Registered IOMMU device '%s'/%d pDevIns=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, pDevIns));
 

trunk/src/VBox/VMM/include/PDMInternal.h

@@ -635 +635 @@
     DECLR3CALLBACKMEMBER(int,   pfnMemWrite,(PPDMDEVINS pDevIns, uint16_t uDevId, uint64_t uDva, size_t cbWrite,
                                              PRTGCPHYS pGCPhysSpa));
+    /** @copydoc PDMIOMMUREGR3::pfnMsiRemap */
+    DECLR3CALLBACKMEMBER(int,   pfnMsiRemap,(PPDMDEVINS pDevIns, uint16_t uDevId, RTGCPHYS GCPhysIn, uint32_t uDataIn,
+                                             PRTGCPHYS pGCPhysOut, uint32_t *puDataOut));
 } PDMIOMMU;
 
@@ -655 +658 @@
     DECLR0CALLBACKMEMBER(int,   pfnMemWrite,(PPDMDEVINS pDevIns, uint16_t uDevId, uint64_t uDva, size_t cbWrite,
                                              PRTGCPHYS pGCPhysSpa));
+    /** @copydoc PDMIOMMUREGR3::pfnMsiRemap */
+    DECLR0CALLBACKMEMBER(int,   pfnMsiRemap,(PPDMDEVINS pDevIns, uint16_t uDevId, RTGCPHYS GCPhysIn, uint32_t uDataIn,
+                                             PRTGCPHYS pGCPhysOut, uint32_t *puDataOut));
 } PDMIOMMUR0;
 /** Pointer to a ring-0 IOMMU data. */