VirtualBox

Ignore:
Timestamp:
Sep 1, 2020 4:56:26 AM (4 years ago)
Author:
vboxsync
Message:

AMD IOMMU: bugref:9654 Logging and initialize coherent bit to 1 on IOMMU control register reset.

File:
1 edited

Legend:

Unmodified
Added
Removed

  • trunk/src/VBox/Devices/Bus/DevIommuAmd.cpp

    r85930 r85971  
    3636*   Defined Constants And Macros                                                                                                 *
    3737*********************************************************************************************************************************/
    38 /** Log prefix string. */
     38/** Release log prefix string. */
    3939#define IOMMU_LOG_PFX                               "IOMMU-AMD"
    4040/** The current saved state version. */
    … …  
    522522{
    523523    RT_NOREF(pDevIns, pThis, iReg, u64Value);
    524     Log((IOMMU_LOG_PFX ": Write to read-only register (%#x) with value %#RX64 ignored\n", iReg, u64Value));
     524    LogFunc(("Write to read-only register (%#x) with value %#RX64 ignored\n", iReg, u64Value));
    525525    return VINF_SUCCESS;
    526526}
    … …  
    558558    if (Status.n.u1CmdBufRunning)
    559559    {
    560         Log((IOMMU_LOG_PFX ": Setting CmdBufBar (%#RX64) when command buffer is running -> Ignored\n", u64Value));
     560        LogFunc(("Setting CmdBufBar (%#RX64) when command buffer is running -> Ignored\n", u64Value));
    561561        return VINF_SUCCESS;
    562562    }
    … …  
    580580    }
    581581    else
    582         Log((IOMMU_LOG_PFX ": Command buffer length (%#x) invalid -> Ignored\n", CmdBufBaseAddr.n.u4Len));
     582        LogFunc(("Command buffer length (%#x) invalid -> Ignored\n", CmdBufBaseAddr.n.u4Len));
    583583
    584584    return VINF_SUCCESS;
    … …  
    601601    if (Status.n.u1EvtLogRunning)
    602602    {
    603         Log((IOMMU_LOG_PFX ": Setting EvtLogBar (%#RX64) when event logging is running -> Ignored\n", u64Value));
     603        LogFunc(("Setting EvtLogBar (%#RX64) when event logging is running -> Ignored\n", u64Value));
    604604        return VINF_SUCCESS;
    605605    }
    … …  
    624624    }
    625625    else
    626         Log((IOMMU_LOG_PFX ": Event log length (%#x) invalid -> Ignored\n", EvtLogBaseAddr.n.u4Len));
     626        LogFunc(("Event log length (%#x) invalid -> Ignored\n", EvtLogBaseAddr.n.u4Len));
    627627
    628628    return VINF_SUCCESS;
    … …  
    713713    /** @todo IOMMU: Why the heck is this marked read/write by the AMD IOMMU spec? */
    714714    RT_NOREF(pDevIns, iReg);
    715     Log((IOMMU_LOG_PFX ": Writing %#RX64 to hardware event (Hi) register!\n", u64Value));
     715    LogFlowFunc(("Writing %#RX64 to hardware event (Hi) register!\n", u64Value));
    716716    pThis->HwEvtHi.u64 = u64Value;
    717717    return VINF_SUCCESS;
    … …  
    726726    /** @todo IOMMU: Why the heck is this marked read/write by the AMD IOMMU spec? */
    727727    RT_NOREF(pDevIns, iReg);
    728     Log((IOMMU_LOG_PFX ": Writing %#RX64 to hardware event (Lo) register!\n", u64Value));
     728    LogFlowFunc(("Writing %#RX64 to hardware event (Lo) register!\n", u64Value));
    729729    pThis->HwEvtLo = u64Value;
    730730    return VINF_SUCCESS;
    … …  
    787787    }
    788788    else
    789         Log((IOMMU_LOG_PFX ": Device table segment (%u) size invalid (%#RX32) -> Ignored\n", idxSegment, uSegSize));
     789        LogFunc(("Device table segment (%u) size invalid (%#RX32) -> Ignored\n", idxSegment, uSegSize));
    790790
    791791    return VINF_SUCCESS;
    … …  
    865865    if (Status.n.u1CmdBufRunning)
    866866    {
    867         Log((IOMMU_LOG_PFX ": Setting CmdBufHeadPtr (%#RX64) when command buffer is running -> Ignored\n", u64Value));
     867        LogFunc(("Setting CmdBufHeadPtr (%#RX64) when command buffer is running -> Ignored\n", u64Value));
    868868        return VINF_SUCCESS;
    869869    }
    … …  
    878878    if (offBuf >= cbBuf)
    879879    {
    880         Log((IOMMU_LOG_PFX ": Setting CmdBufHeadPtr (%#RX32) to a value that exceeds buffer length (%#RX23) -> Ignored\n",
    881              offBuf, cbBuf));
     880        LogFunc(("Setting CmdBufHeadPtr (%#RX32) to a value that exceeds buffer length (%#RX23) -> Ignored\n", offBuf, cbBuf));
    882881        return VINF_SUCCESS;
    883882    }
    … …  
    888887    iommuAmdCmdThreadWakeUpIfNeeded(pDevIns);
    889888
    890     LogFlow((IOMMU_LOG_PFX ": Set CmdBufHeadPtr to %#RX32\n", offBuf));
     889    LogFlowFunc(("Set CmdBufHeadPtr to %#RX32\n", offBuf));
    891890    return VINF_SUCCESS;
    892891}
    … …  
    910909    if (offBuf >= cbBuf)
    911910    {
    912         Log((IOMMU_LOG_PFX ": Setting CmdBufTailPtr (%#RX32) to a value that exceeds buffer length (%#RX32) -> Ignored\n",
    913              offBuf, cbBuf));
     911        LogFunc(("Setting CmdBufTailPtr (%#RX32) to a value that exceeds buffer length (%#RX32) -> Ignored\n", offBuf, cbBuf));
    914912        return VINF_SUCCESS;
    915913    }
    … …  
    930928    iommuAmdCmdThreadWakeUpIfNeeded(pDevIns);
    931929
    932     LogFlow((IOMMU_LOG_PFX ": Set CmdBufTailPtr to %#RX32\n", offBuf));
     930    LogFlowFunc(("Set CmdBufTailPtr to %#RX32\n", offBuf));
    933931    return VINF_SUCCESS;
    934932}
    … …  
    952950    if (offBuf >= cbBuf)
    953951    {
    954         Log((IOMMU_LOG_PFX ": Setting EvtLogHeadPtr (%#RX32) to a value that exceeds buffer length (%#RX32) -> Ignored\n",
    955              offBuf, cbBuf));
     952        LogFunc(("Setting EvtLogHeadPtr (%#RX32) to a value that exceeds buffer length (%#RX32) -> Ignored\n", offBuf, cbBuf));
    956953        return VINF_SUCCESS;
    957954    }
    … …  
    960957    pThis->EvtLogHeadPtr.au32[0] = offBuf;
    961958
    962     LogFlow((IOMMU_LOG_PFX ": Set EvtLogHeadPtr to %#RX32\n", offBuf));
     959    LogFlowFunc(("Set EvtLogHeadPtr to %#RX32\n", offBuf));
    963960    return VINF_SUCCESS;
    964961}
    … …  
    981978    if (Status.n.u1EvtLogRunning)
    982979    {
    983         Log((IOMMU_LOG_PFX ": Setting EvtLogTailPtr (%#RX64) when event log is running -> Ignored\n", u64Value));
     980        LogFunc(("Setting EvtLogTailPtr (%#RX64) when event log is running -> Ignored\n", u64Value));
    984981        return VINF_SUCCESS;
    985982    }
    … …  
    994991    if (offBuf >= cbBuf)
    995992    {
    996         Log((IOMMU_LOG_PFX ": Setting EvtLogTailPtr (%#RX32) to a value that exceeds buffer length (%#RX32) -> Ignored\n",
    997              offBuf, cbBuf));
     993        LogFunc(("Setting EvtLogTailPtr (%#RX32) to a value that exceeds buffer length (%#RX32) -> Ignored\n", offBuf, cbBuf));
    998994        return VINF_SUCCESS;
    999995    }
    … …  
    1002998    pThis->EvtLogTailPtr.au32[0] = offBuf;
    1003999
    1004     LogFlow((IOMMU_LOG_PFX ": Set EvtLogTailPtr to %#RX32\n", offBuf));
     1000    LogFlowFunc(("Set EvtLogTailPtr to %#RX32\n", offBuf));
    10051001    return VINF_SUCCESS;
    10061002}
    … …  
    10681064    Assert(cb == 4 || cb == 8);
    10691065    Assert(!(off & (cb - 1)));
     1066
     1067    LogFlowFunc(("off=%#x cb=%u uValue=%#RX64\n", off, cb, uValue));
    10701068
    10711069    PIOMMU pThis = PDMDEVINS_2_DATA(pDevIns, PIOMMU);
    … …  
    11731171        case IOMMU_MMIO_OFF_SMI_FLT_LAST:
    11741172        {
    1175             Log((IOMMU_LOG_PFX ": Writing unsupported register: SMI filter %u -> Ignored\n",
    1176                  (off - IOMMU_MMIO_OFF_SMI_FLT_FIRST) >> 3));
     1173            LogFunc(("Writing unsupported register: SMI filter %u -> Ignored\n", (off - IOMMU_MMIO_OFF_SMI_FLT_FIRST) >> 3));
    11771174            return VINF_SUCCESS;
    11781175        }
    … …  
    11811178        default:
    11821179        {
    1183             Log((IOMMU_LOG_PFX ": Writing unknown register %u (%#x) with %#RX64 -> Ignored\n", off, off, uValue));
     1180            LogFunc(("Writing unknown register %u (%#x) with %#RX64 -> Ignored\n", off, off, uValue));
    11841181            return VINF_SUCCESS;
    11851182        }
    … …  
    12141211    PCPDMPCIDEV pPciDev = pDevIns->apPciDevs[0];
    12151212    PDMPCIDEV_ASSERT_VALID(pDevIns, pPciDev);
     1213
     1214    LogFlowFunc(("off=%#x\n", off));
    12161215
    12171216    /** @todo IOMMU: fine-grained locking? */
    … …  
    13431342        case IOMMU_MMIO_OFF_SMI_FLT_LAST:
    13441343        {
    1345             Log((IOMMU_LOG_PFX ": Reading unsupported register: SMI filter %u\n", (off - IOMMU_MMIO_OFF_SMI_FLT_FIRST) >> 3));
     1344            LogFunc(("Reading unsupported register: SMI filter %u\n", (off - IOMMU_MMIO_OFF_SMI_FLT_FIRST) >> 3));
    13461345            uReg = 0;
    13471346            break;
    … …  
    13511350        default:
    13521351        {
    1353             Log((IOMMU_LOG_PFX ": Reading unknown register %u (%#x) -> 0\n", off, off));
     1352            LogFunc(("Reading unknown register %u (%#x) -> 0\n", off, off));
    13541353            uReg = 0;
    13551354            return VINF_IOM_MMIO_UNUSED_00;
    … …  
    14261425            int rc = PDMDevHlpPCIPhysWrite(pDevIns, GCPhysEvtLogEntry, pEvent, cbEvt);
    14271426            if (RT_FAILURE(rc))
    1428                 Log((IOMMU_LOG_PFX ": Failed to write event log entry at %#RGp. rc=%Rrc\n", GCPhysEvtLogEntry, rc));
     1427                LogFunc(("Failed to write event log entry at %#RGp. rc=%Rrc\n", GCPhysEvtLogEntry, rc));
    14291428
    14301429            /* Increment the event log tail pointer. */
    … …  
    15301529    IOMMU_UNLOCK(pDevIns);
    15311530
    1532     Log((IOMMU_LOG_PFX ": Raised PAGE_TAB_HARDWARE_ERROR. uDevId=%#x uDomainId=%#x GCPhysPtEntity=%#RGp enmOp=%u u2Type=%u\n",
     1531    LogFunc(("Raised PAGE_TAB_HARDWARE_ERROR. uDevId=%#x uDomainId=%#x GCPhysPtEntity=%#RGp enmOp=%u u2Type=%u\n",
    15331532         pEvtPageTabHwErr->n.u16DevId, pEvtPageTabHwErr->n.u16DomainOrPasidLo, pEvtPageTabHwErr->n.u64Addr, enmOp,
    15341533         pEvtPageTabHwErr->n.u2Type));
    … …  
    15731572    IOMMU_UNLOCK(pDevIns);
    15741573
    1575     Log((IOMMU_LOG_PFX ": Raised COMMAND_HARDWARE_ERROR. GCPhysCmd=%#RGp u2Type=%u\n", pEvtCmdHwErr->n.u64Addr,
    1576          pEvtCmdHwErr->n.u2Type));
     1574    LogFunc(("Raised COMMAND_HARDWARE_ERROR. GCPhysCmd=%#RGp u2Type=%u\n", pEvtCmdHwErr->n.u64Addr, pEvtCmdHwErr->n.u2Type));
    15771575}
    15781576
    … …  
    16251623    IOMMU_UNLOCK(pDevIns);
    16261624
    1627     Log((IOMMU_LOG_PFX ": Raised DEV_TAB_HARDWARE_ERROR. uDevId=%#x GCPhysDte=%#RGp enmOp=%u u2Type=%u\n",
    1628          pEvtDevTabHwErr->n.u16DevId, pEvtDevTabHwErr->n.u64Addr, enmOp, pEvtDevTabHwErr->n.u2Type));
     1625    LogFunc(("Raised DEV_TAB_HARDWARE_ERROR. uDevId=%#x GCPhysDte=%#RGp enmOp=%u u2Type=%u\n", pEvtDevTabHwErr->n.u16DevId,
     1626             pEvtDevTabHwErr->n.u64Addr, enmOp, pEvtDevTabHwErr->n.u2Type));
    16291627}
    16301628
    … …  
    16651663    IOMMU_UNLOCK(pDevIns);
    16661664
    1667     Log((IOMMU_LOG_PFX ": Raised ILLEGAL_COMMAND_ERROR. Addr=%#RGp\n", pEvtIllegalCmd->n.u64Addr));
     1665    LogFunc(("Raised ILLEGAL_COMMAND_ERROR. Addr=%#RGp\n", pEvtIllegalCmd->n.u64Addr));
    16681666}
    16691667
    … …  
    17211719    IOMMU_UNLOCK(pDevIns);
    17221720
    1723     Log((IOMMU_LOG_PFX ": Raised ILLEGAL_DTE_EVENT. uDevId=%#x uIova=%#RX64 enmOp=%u enmEvtType=%u\n", pEvtIllegalDte->n.u16DevId,
    1724          pEvtIllegalDte->n.u64Addr, enmOp, enmEvtType));
     1721    LogFunc(("Raised ILLEGAL_DTE_EVENT. uDevId=%#x uIova=%#RX64 enmOp=%u enmEvtType=%u\n", pEvtIllegalDte->n.u16DevId,
     1722             pEvtIllegalDte->n.u64Addr, enmOp, enmEvtType));
    17251723    NOREF(enmEvtType);
    17261724}
    … …  
    19531951    if (RT_FAILURE(rc))
    19541952    {
    1955         Log((IOMMU_LOG_PFX ": Failed to read device table entry at %#RGp. rc=%Rrc -> DevTabHwError\n", GCPhysDte, rc));
     1953        LogFunc(("Failed to read device table entry at %#RGp. rc=%Rrc -> DevTabHwError\n", GCPhysDte, rc));
    19561954
    19571955        EVT_DEV_TAB_HW_ERROR_T EvtDevTabHwErr;
    … …  
    19991997         *        the DTE) return the state computed so far and raises an I/O page fault. So
    20001998         *        returning an invalid translation rather than skipping translation. */
    2001         Log((IOMMU_LOG_PFX ": Translation valid bit not set -> IOPF"));
     1999        LogFunc(("Translation valid bit not set -> IOPF"));
    20022000        EVT_IO_PAGE_FAULT_T EvtIoPageFault;
    20032001        iommuAmdInitIoPageFaultEvent(uDevId, pDte->n.u16DomainId, uIova, false /* fPresent */, false /* fRsvdNotZero */,
    … …  
    20172015        if ((fAccess & fDtePerm) != fAccess)
    20182016        {
    2019             Log((IOMMU_LOG_PFX ": Access denied for IOVA (%#RX64). fAccess=%#x fDtePerm=%#x\n", uIova, fAccess, fDtePerm));
     2017            LogFunc(("Access denied for IOVA (%#RX64). fAccess=%#x fDtePerm=%#x\n", uIova, fAccess, fDtePerm));
    20202018            return VERR_IOMMU_ADDR_ACCESS_DENIED;
    20212019        }
    … …  
    20342032         *        raising an ILLEGAL_DEV_TABLE_ENTRY event or an IO_PAGE_FAULT event here.
    20352033         *        I'm just going with I/O page fault. */
    2036         Log((IOMMU_LOG_PFX ": Invalid root page table level %#x -> IOPF", uMaxLevel));
     2034        LogFunc(("Invalid root page table level %#x -> IOPF", uMaxLevel));
    20372035        EVT_IO_PAGE_FAULT_T EvtIoPageFault;
    20382036        iommuAmdInitIoPageFaultEvent(uDevId, pDte->n.u16DomainId, uIova, true /* fPresent */, false /* fRsvdNotZero */,
    … …  
    20492047    else
    20502048    {
    2051         Log((IOMMU_LOG_PFX ": Permission denied (fAccess=%#x fRootPtePerm=%#x) -> IOPF", fAccess, fRootPtePerm));
     2049        LogFunc(("Permission denied (fAccess=%#x fRootPtePerm=%#x) -> IOPF", fAccess, fRootPtePerm));
    20522050        EVT_IO_PAGE_FAULT_T EvtIoPageFault;
    20532051        iommuAmdInitIoPageFaultEvent(uDevId, pDte->n.u16DomainId, uIova, true /* fPresent */, false /* fRsvdNotZero */,
    … …  
    20942092            if (RT_FAILURE(rc))
    20952093            {
    2096                 Log((IOMMU_LOG_PFX ": Failed to read page table entry at %#RGp. rc=%Rrc -> PageTabHwError\n", GCPhysPtEntity, rc));
     2094                LogFunc(("Failed to read page table entry at %#RGp. rc=%Rrc -> PageTabHwError\n", GCPhysPtEntity, rc));
    20972095                EVT_PAGE_TAB_HW_ERR_T EvtPageTabHwErr;
    20982096                iommuAmdInitPageTabHwErrorEvent(uDevId, pDte->n.u16DomainId, GCPhysPtEntity, enmOp, &EvtPageTabHwErr);
    … …  
    21072105        else
    21082106        {
    2109             Log((IOMMU_LOG_PFX ": Page table entry not present -> IOPF"));
     2107            LogFunc(("Page table entry not present -> IOPF"));
    21102108            EVT_IO_PAGE_FAULT_T EvtIoPageFault;
    21112109            iommuAmdInitIoPageFaultEvent(uDevId, pDte->n.u16DomainId, uIova, false /* fPresent */, false /* fRsvdNotZero */,
    … …  
    21212119        else
    21222120        {
    2123             Log((IOMMU_LOG_PFX ": Page table entry permission denied (fAccess=%#x fPtePerm=%#x) -> IOPF", fAccess, fPtePerm));
     2121            LogFunc(("Page table entry permission denied (fAccess=%#x fPtePerm=%#x) -> IOPF", fAccess, fPtePerm));
    21242122            EVT_IO_PAGE_FAULT_T EvtIoPageFault;
    21252123            iommuAmdInitIoPageFaultEvent(uDevId, pDte->n.u16DomainId, uIova, true /* fPresent */, false /* fRsvdNotZero */,
    … …  
    21582156            }
    21592157
    2160             Log((IOMMU_LOG_PFX ": Page size invalid cShift=%#x -> IOPF", cShift));
     2158            LogFunc(("Page size invalid cShift=%#x -> IOPF", cShift));
    21612159            EVT_IO_PAGE_FAULT_T EvtIoPageFault;
    21622160            iommuAmdInitIoPageFaultEvent(uDevId, pDte->n.u16DomainId, uIova, true /* fPresent */, false /* fRsvdNotZero */,
    … …  
    21732171        else
    21742172        {
    2175             Log((IOMMU_LOG_PFX ": Next level of PDE invalid uNextLevel=%#x -> IOPF", uNextLevel));
     2173            LogFunc(("Next level of PDE invalid uNextLevel=%#x -> IOPF", uNextLevel));
    21762174            EVT_IO_PAGE_FAULT_T EvtIoPageFault;
    21772175            iommuAmdInitIoPageFaultEvent(uDevId, pDte->n.u16DomainId, uIova, true /* fPresent */, false /* fRsvdNotZero */,
    … …  
    21902188        else
    21912189        {
    2192             Log((IOMMU_LOG_PFX ": Next level (%#x) must be less than the current level (%#x) -> IOPF", uNextLevel, uLevel));
     2190            LogFunc(("Next level (%#x) must be less than the current level (%#x) -> IOPF", uNextLevel, uLevel));
    21932191            EVT_IO_PAGE_FAULT_T EvtIoPageFault;
    21942192            iommuAmdInitIoPageFaultEvent(uDevId, pDte->n.u16DomainId, uIova, true /* fPresent */, false /* fRsvdNotZero */,
    … …  
    22082206        else
    22092207        {
    2210             Log((IOMMU_LOG_PFX ": IOVA of skipped levels are not zero %#RX64 (SkipMask=%#RX64) -> IOPF", uIova, uIovaSkipMask));
     2208            LogFunc(("IOVA of skipped levels are not zero %#RX64 (SkipMask=%#RX64) -> IOPF", uIova, uIovaSkipMask));
    22112209            EVT_IO_PAGE_FAULT_T EvtIoPageFault;
    22122210            iommuAmdInitIoPageFaultEvent(uDevId, pDte->n.u16DomainId, uIova, true /* fPresent */, false /* fRsvdNotZero */,
    … …  
    22672265        else
    22682266        {
    2269             Log((IOMMU_LOG_PFX ": Invalid reserved bits in DTE (u64[0]=%#RX64 u64[1]=%#RX64) -> Illegal DTE\n", fRsvd0, fRsvd1));
     2267            LogFunc(("Invalid reserved bits in DTE (u64[0]=%#RX64 u64[1]=%#RX64) -> Illegal DTE\n", fRsvd0, fRsvd1));
    22702268            EVT_ILLEGAL_DTE_T Event;
    22712269            iommuAmdInitIllegalDteEvent(uDevId, uIova, true /* fRsvdNotZero */, enmOp, &Event);
    … …  
    23192317            else
    23202318            {
    2321                 Log((IOMMU_LOG_PFX ": I/O page table walk failed. uIova=%#RX64 uBaseIova=%#RX64 fAccess=%u rc=%Rrc\n", uIova,
     2319                LogFunc(("I/O page table walk failed. uIova=%#RX64 uBaseIova=%#RX64 fAccess=%u rc=%Rrc\n", uIova,
    23222320                     uBaseIova, fAccess, rc));
    23232321                *pGCPhysSpa = NIL_RTGCPHYS;
    … …  
    23292327    }
    23302328
    2331     Log((IOMMU_LOG_PFX ": Failed to read device table entry. uDevId=%#x rc=%Rrc\n", uDevId, rc));
     2329    LogFunc(("Failed to read device table entry. uDevId=%#x rc=%Rrc\n", uDevId, rc));
    23322330    return VERR_IOMMU_ADDR_TRANSLATION_FAILED;
    23332331}
    … …  
    24552453     *        There's no interrupt table hardware error event, but it's unclear what
    24562454     *        we should do here. */
    2457     Log((IOMMU_LOG_PFX ": Failed to read interrupt table entry at %#RGp. rc=%Rrc -> ???\n", GCPhysIrte, rc));
     2455    LogFunc(("Failed to read interrupt table entry at %#RGp. rc=%Rrc -> ???\n", GCPhysIrte, rc));
    24582456    return VERR_IOMMU_IPE_4;
    24592457}
    … …  
    25012499                }
    25022500
    2503                 Log((IOMMU_LOG_PFX ": Interrupt type (%#x) invalid -> IOPF", Irte.n.u3IntrType));
     2501                LogFunc(("Interrupt type (%#x) invalid -> IOPF", Irte.n.u3IntrType));
    25042502                EVT_IO_PAGE_FAULT_T EvtIoPageFault;
    25052503                iommuAmdInitIoPageFaultEvent(uDevId, pDte->n.u16DomainId, pMsiIn->Addr.u64, Irte.n.u1RemapEnable,
    … …  
    25092507            }
    25102508
    2511             Log((IOMMU_LOG_PFX ": Guest mode not supported -> IOPF"));
     2509            LogFunc(("Guest mode not supported -> IOPF"));
    25122510            EVT_IO_PAGE_FAULT_T EvtIoPageFault;
    25132511            iommuAmdInitIoPageFaultEvent(uDevId, pDte->n.u16DomainId, pMsiIn->Addr.u64, Irte.n.u1RemapEnable,
    … …  
    25172515        }
    25182516
    2519         Log((IOMMU_LOG_PFX ": Remapping disabled -> IOPF"));
     2517        LogFunc(("Remapping disabled -> IOPF"));
    25202518        EVT_IO_PAGE_FAULT_T EvtIoPageFault;
    25212519        iommuAmdInitIoPageFaultEvent(uDevId, pDte->n.u16DomainId, pMsiIn->Addr.u64, Irte.n.u1RemapEnable,
    … …  
    25592557            else
    25602558            {
    2561                 Log((IOMMU_LOG_PFX ": Invalid reserved bits in DTE (u64[2]=%#RX64 u64[3]=%#RX64) -> Illegal DTE\n", fRsvd0,
     2559                LogFunc(("Invalid reserved bits in DTE (u64[2]=%#RX64 u64[3]=%#RX64) -> Illegal DTE\n", fRsvd0,
    25622560                     fRsvd1));
    25632561                EVT_ILLEGAL_DTE_T Event;
    … …  
    26002598                        if (uIntrCtrl == IOMMU_INTR_CTRL_TARGET_ABORT)
    26012599                        {
    2602                             Log((IOMMU_LOG_PFX ": IntCtl=0: Target aborting fixed/arbitrated interrupt -> Target abort\n"));
     2600                            LogFunc(("IntCtl=0: Target aborting fixed/arbitrated interrupt -> Target abort\n"));
    26032601                            iommuAmdSetPciTargetAbort(pDevIns);
    26042602                            return VERR_IOMMU_INTR_REMAP_DENIED;
    … …  
    26312629                            }
    26322630
    2633                             Log((IOMMU_LOG_PFX ": Invalid interrupt table length %#x -> Illegal DTE\n", uIntTabLen));
     2631                            LogFunc(("Invalid interrupt table length %#x -> Illegal DTE\n", uIntTabLen));
    26342632                            EVT_ILLEGAL_DTE_T Event;
    26352633                            iommuAmdInitIllegalDteEvent(uDevId, pMsiIn->Addr.u64, false /* fRsvdNotZero */, enmOp, &Event);
    … …  
    26412639                        Assert(uIntrCtrl == IOMMU_INTR_CTRL_RSVD);
    26422640
    2643                         Log((IOMMU_LOG_PFX ":IntCtl mode invalid %#x -> Illegal DTE", uIntrCtrl));
     2641                        LogFunc(("IntCtl mode invalid %#x -> Illegal DTE", uIntrCtrl));
     2642
    26442643                        EVT_ILLEGAL_DTE_T Event;
    26452644                        iommuAmdInitIllegalDteEvent(uDevId, pMsiIn->Addr.u64, true /* fRsvdNotZero */, enmOp, &Event);
    … …  
    26552654                    default:
    26562655                    {
    2657                         Log((IOMMU_LOG_PFX ":MSI data delivery mode invalid %#x -> Target abort", u8DeliveryMode));
     2656                        LogFunc(("MSI data delivery mode invalid %#x -> Target abort", u8DeliveryMode));
    26582657                        iommuAmdSetPciTargetAbort(pDevIns);
    26592658                        return VERR_IOMMU_INTR_REMAP_FAILED;
    … …  
    26722671            else
    26732672            {
    2674                 Log((IOMMU_LOG_PFX ":MSI address region invalid %#RX64.", pMsiIn->Addr.u64));
     2673                LogFunc(("MSI address region invalid %#RX64.", pMsiIn->Addr.u64));
    26752674                return VERR_IOMMU_INTR_REMAP_FAILED;
    26762675            }
    … …  
    26842683    }
    26852684
    2686     Log((IOMMU_LOG_PFX ": Failed to read device table entry. uDevId=%#x rc=%Rrc\n", uDevId, rc));
     2685    LogFunc(("Failed to read device table entry. uDevId=%#x rc=%Rrc\n", uDevId, rc));
    26872686    return VERR_IOMMU_INTR_REMAP_FAILED;
    26882687}
    … …  
    27312730    Assert(!(off & (cb - 1)));
    27322731
    2733     LogFlowFunc(("off=%RGp cb=%u\n", off, cb));
    2734 
    27352732    uint64_t const uValue = cb == 8 ? *(uint64_t const *)pv : *(uint32_t const *)pv;
    27362733    return iommuAmdWriteRegister(pDevIns, off, cb, uValue);
    … …  
    27462743    Assert(cb == 4 || cb == 8);
    27472744    Assert(!(off & (cb - 1)));
    2748 
    2749     LogFlowFunc(("off=%RGp cb=%u\n", off, cb));
    27502745
    27512746    uint64_t uResult;
    … …  
    27962791                    if (RT_FAILURE(rc))
    27972792                    {
    2798                         Log((IOMMU_LOG_PFX ": Cmd(%#x): Failed to write StoreData (%#RX64) to %#RGp, rc=%Rrc\n", bCmd, u64Data,
     2793                        LogFunc(("Cmd(%#x): Failed to write StoreData (%#RX64) to %#RGp, rc=%Rrc\n", bCmd, u64Data,
    27992794                             GCPhysStore, rc));
    28002795                        iommuAmdInitCmdHwErrorEvent(GCPhysStore, (PEVT_CMD_HW_ERR_T)pEvtError);
    … …  
    28872882    }
    28882883
    2889     Log((IOMMU_LOG_PFX ": Cmd(%#x): Unrecognized\n", bCmd));
     2884    LogFunc(("Cmd(%#x): Unrecognized\n", bCmd));
    28902885    iommuAmdInitIllegalCmdEvent(GCPhysCmd, (PEVT_ILLEGAL_CMD_ERR_T)pEvtError);
    28912886    return VERR_IOMMU_CMD_NOT_SUPPORTED;
    … …  
    29922987    }
    29932988
    2994     LogFlow((IOMMU_LOG_PFX ": Command thread terminating\n"));
     2989    LogFlowFunc(("Command thread terminating\n"));
    29952990    return VINF_SUCCESS;
    29962991}
    … …  
    30193014                                                          unsigned cb, uint32_t *pu32Value)
    30203015{
    3021     LogFlowFunc(("\n"));
    30223016    /** @todo IOMMU: PCI config read stat counter. */
    30233017    VBOXSTRICTRC rcStrict = PDMDevHlpPCIConfigRead(pDevIns, pPciDev, uAddress, cb, pu32Value);
    3024     Log3((IOMMU_LOG_PFX ": Reading PCI config register %#x (cb=%u) -> %#x %Rrc\n", uAddress, cb, *pu32Value,
    3025           VBOXSTRICTRC_VAL(rcStrict)));
     3018    Log3Func(("Reading PCI config register %#x (cb=%u) -> %#x %Rrc\n", uAddress, cb, *pu32Value,
     3019              VBOXSTRICTRC_VAL(rcStrict)));
    30263020    return rcStrict;
    30273021}
    … …  
    30353029{
    30363030    PIOMMU pThis = PDMDEVINS_2_DATA(pDevIns, PIOMMU);
    3037     LogFlowFunc(("\n"));
    30383031
    30393032    /*
    … …  
    30493042        case IOMMU_PCI_OFF_MISCINFO_REG_1:  /* We don't support guest-address translation. */
    30503043        {
    3051             Log((IOMMU_LOG_PFX ": PCI config write (%#RX32) to read-only register %#x -> Ignored\n", u32Value, uAddress));
     3044            LogFunc(("PCI config write (%#RX32) to read-only register %#x -> Ignored\n", u32Value, uAddress));
    30523045            return VINF_SUCCESS;
    30533046        }
    … …  
    30643057            {
    30653058                rcStrict = VINF_SUCCESS;
    3066                 Log((IOMMU_LOG_PFX ": Writing Base Address (Lo) when it's already enabled -> Ignored\n"));
     3059                LogFunc(("Writing Base Address (Lo) when it's already enabled -> Ignored\n"));
    30673060                break;
    30683061            }
    … …  
    30773070                rcStrict = PDMDevHlpMmioMap(pDevIns, pThis->hMmio, GCPhysMmioBase);
    30783071                if (RT_FAILURE(rcStrict))
    3079                     Log((IOMMU_LOG_PFX ": Failed to map IOMMU MMIO region at %#RGp. rc=%Rrc\n", GCPhysMmioBase, rcStrict));
     3072                    LogFunc(("Failed to map IOMMU MMIO region at %#RGp. rc=%Rrc\n", GCPhysMmioBase, rcStrict));
    30803073            }
    30813074            break;
    … …  
    30893082            {
    30903083                rcStrict = VINF_SUCCESS;
    3091                 Log((IOMMU_LOG_PFX ": Writing Base Address (Hi) when it's already enabled -> Ignored\n"));
     3084                LogFunc(("Writing Base Address (Hi) when it's already enabled -> Ignored\n"));
    30923085            }
    30933086            break;
    … …  
    31083101    IOMMU_UNLOCK(pDevIns);
    31093102
    3110     Log3((IOMMU_LOG_PFX ": PCI config write: %#x -> To %#x (%u) %Rrc\n", u32Value, uAddress, cb, VBOXSTRICTRC_VAL(rcStrict)));
     3103    Log3Func(("PCI config write: %#x -> To %#x (%u) %Rrc\n", u32Value, uAddress, cb, VBOXSTRICTRC_VAL(rcStrict)));
    31113104    return rcStrict;
    31123105}
    … …  
    31223115    PDMPCIDEV_ASSERT_VALID(pDevIns, pPciDev);
    31233116
    3124     LogFlow((IOMMU_LOG_PFX ": iommuAmdR3DbgInfo: pThis=%p pszArgs=%s\n", pThis, pszArgs));
     3117    LogFlowFunc(("pThis=%p pszArgs=%s\n", pThis, pszArgs));
    31253118    bool const fVerbose = !strncmp(pszArgs, RT_STR_TUPLE("verbose")) ? true : false;
    31263119
    … …  
    37173710
    37183711    pThis->Ctrl.u64                  = 0;
     3712    pThis->Ctrl.n.u1Coherent         = 1;
     3713    Assert(!pThis->ExtFeat.n.u1BlockStopMarkSup);
    37193714
    37203715    pThis->ExclRangeBaseAddr.u64     = 0;
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