Changeset 86031 in vbox for trunk/src/VBox/Devices/Bus/DevIommuAmd.cpp
- Timestamp:
- Sep 4, 2020 12:15:14 PM (4 years ago)
- File:
-
- 1 edited
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trunk/src/VBox/Devices/Bus/DevIommuAmd.cpp
r86014 r86031 1981 1981 RTGCPHYS const GCPhysDte = GCPhysDevTab + offDte; 1982 1982 1983 LogFlowFunc(("idxSegsEn=%#x GCPhysDevTab=%#RGp offDte=%#x GCPhysDte=%#RGp\n", idxSegsEn, GCPhysDevTab, offDte, GCPhysDte)); 1984 1983 1985 Assert(!(GCPhysDevTab & X86_PAGE_4K_OFFSET_MASK)); 1984 1986 int rc = PDMDevHlpPCIPhysRead(pDevIns, GCPhysDte, pDte, sizeof(*pDte)); … … 2066 2068 * raising an ILLEGAL_DEV_TABLE_ENTRY event or an IO_PAGE_FAULT event here. 2067 2069 * I'm just going with I/O page fault. */ 2068 LogFunc(("Invalid root page table level %#x -> IOPF ", uMaxLevel));2070 LogFunc(("Invalid root page table level %#x -> IOPF\n", uMaxLevel)); 2069 2071 EVT_IO_PAGE_FAULT_T EvtIoPageFault; 2070 2072 iommuAmdInitIoPageFaultEvent(uDevId, pDte->n.u16DomainId, uIova, true /* fPresent */, false /* fRsvdNotZero */, … … 2081 2083 else 2082 2084 { 2083 LogFunc(("Permission denied (fAccess=%#x fRootPtePerm=%#x) -> IOPF ", fAccess, fRootPtePerm));2085 LogFunc(("Permission denied (fAccess=%#x fRootPtePerm=%#x) -> IOPF\n", fAccess, fRootPtePerm)); 2084 2086 EVT_IO_PAGE_FAULT_T EvtIoPageFault; 2085 2087 iommuAmdInitIoPageFaultEvent(uDevId, pDte->n.u16DomainId, uIova, true /* fPresent */, false /* fRsvdNotZero */, … … 2153 2155 else 2154 2156 { 2155 LogFunc(("Page table entry permission denied (fAccess=%#x fPtePerm=%#x) -> IOPF ", fAccess, fPtePerm));2157 LogFunc(("Page table entry permission denied (fAccess=%#x fPtePerm=%#x) -> IOPF\n", fAccess, fPtePerm)); 2156 2158 EVT_IO_PAGE_FAULT_T EvtIoPageFault; 2157 2159 iommuAmdInitIoPageFaultEvent(uDevId, pDte->n.u16DomainId, uIova, true /* fPresent */, false /* fRsvdNotZero */, … … 2190 2192 } 2191 2193 2192 LogFunc(("Page size invalid cShift=%#x -> IOPF ", cShift));2194 LogFunc(("Page size invalid cShift=%#x -> IOPF\n", cShift)); 2193 2195 EVT_IO_PAGE_FAULT_T EvtIoPageFault; 2194 2196 iommuAmdInitIoPageFaultEvent(uDevId, pDte->n.u16DomainId, uIova, true /* fPresent */, false /* fRsvdNotZero */, … … 2205 2207 else 2206 2208 { 2207 LogFunc(("Next level of PDE invalid uNextLevel=%#x -> IOPF ", uNextLevel));2209 LogFunc(("Next level of PDE invalid uNextLevel=%#x -> IOPF\n", uNextLevel)); 2208 2210 EVT_IO_PAGE_FAULT_T EvtIoPageFault; 2209 2211 iommuAmdInitIoPageFaultEvent(uDevId, pDte->n.u16DomainId, uIova, true /* fPresent */, false /* fRsvdNotZero */, … … 2222 2224 else 2223 2225 { 2224 LogFunc(("Next level (%#x) must be less than the current level (%#x) -> IOPF ", uNextLevel, uLevel));2226 LogFunc(("Next level (%#x) must be less than the current level (%#x) -> IOPF\n", uNextLevel, uLevel)); 2225 2227 EVT_IO_PAGE_FAULT_T EvtIoPageFault; 2226 2228 iommuAmdInitIoPageFaultEvent(uDevId, pDte->n.u16DomainId, uIova, true /* fPresent */, false /* fRsvdNotZero */, … … 2240 2242 else 2241 2243 { 2242 LogFunc(("IOVA of skipped levels are not zero %#RX64 (SkipMask=%#RX64) -> IOPF ", uIova, uIovaSkipMask));2244 LogFunc(("IOVA of skipped levels are not zero %#RX64 (SkipMask=%#RX64) -> IOPF\n", uIova, uIovaSkipMask)); 2243 2245 EVT_IO_PAGE_FAULT_T EvtIoPageFault; 2244 2246 iommuAmdInitIoPageFaultEvent(uDevId, pDte->n.u16DomainId, uIova, true /* fPresent */, false /* fRsvdNotZero */, … … 2533 2535 } 2534 2536 2535 LogFunc(("Interrupt type (%#x) invalid -> IOPF ", Irte.n.u3IntrType));2537 LogFunc(("Interrupt type (%#x) invalid -> IOPF\n", Irte.n.u3IntrType)); 2536 2538 EVT_IO_PAGE_FAULT_T EvtIoPageFault; 2537 2539 iommuAmdInitIoPageFaultEvent(uDevId, pDte->n.u16DomainId, pMsiIn->Addr.u64, Irte.n.u1RemapEnable, … … 2541 2543 } 2542 2544 2543 LogFunc(("Guest mode not supported -> IOPF "));2545 LogFunc(("Guest mode not supported -> IOPF\n")); 2544 2546 EVT_IO_PAGE_FAULT_T EvtIoPageFault; 2545 2547 iommuAmdInitIoPageFaultEvent(uDevId, pDte->n.u16DomainId, pMsiIn->Addr.u64, Irte.n.u1RemapEnable, … … 2549 2551 } 2550 2552 2551 LogFunc(("Remapping disabled -> IOPF "));2553 LogFunc(("Remapping disabled -> IOPF\n")); 2552 2554 EVT_IO_PAGE_FAULT_T EvtIoPageFault; 2553 2555 iommuAmdInitIoPageFaultEvent(uDevId, pDte->n.u16DomainId, pMsiIn->Addr.u64, Irte.n.u1RemapEnable, … … 2576 2578 { 2577 2579 /* Read the device table entry from memory. */ 2580 LogFlowFunc(("uDevId=%#x enmOp=%u\n", uDevId, enmOp)); 2581 2578 2582 DTE_T Dte; 2579 2583 int rc = iommuAmdReadDte(pDevIns, uDevId, enmOp, &Dte); … … 2673 2677 Assert(uIntrCtrl == IOMMU_INTR_CTRL_RSVD); 2674 2678 2675 LogFunc(("IntCtl mode invalid %#x -> Illegal DTE ", uIntrCtrl));2679 LogFunc(("IntCtl mode invalid %#x -> Illegal DTE\n", uIntrCtrl)); 2676 2680 2677 2681 EVT_ILLEGAL_DTE_T Event; … … 2688 2692 default: 2689 2693 { 2690 LogFunc(("MSI data delivery mode invalid %#x -> Target abort ", u8DeliveryMode));2694 LogFunc(("MSI data delivery mode invalid %#x -> Target abort\n", u8DeliveryMode)); 2691 2695 iommuAmdSetPciTargetAbort(pDevIns); 2692 2696 return VERR_IOMMU_INTR_REMAP_FAILED; … … 2705 2709 else 2706 2710 { 2707 LogFunc(("MSI address region invalid %#RX64 .", pMsiIn->Addr.u64));2711 LogFunc(("MSI address region invalid %#RX64\n", pMsiIn->Addr.u64)); 2708 2712 return VERR_IOMMU_INTR_REMAP_FAILED; 2709 2713 } … … 2712 2716 { 2713 2717 /** @todo IOMMU: Add to interrupt remapping cache. */ 2718 LogFlowFunc(("DTE interrupt map not valid\n")); 2714 2719 *pMsiOut = *pMsiIn; 2715 2720 return VINF_SUCCESS;
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