VirtualBox

Ignore:
Timestamp:
Sep 4, 2020 12:15:14 PM (4 years ago)
Author:
vboxsync
Message:

AMD IOMMU: bugref:9654 Logging.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/src/VBox/Devices/Bus/DevIommuAmd.cpp

    r86014 r86031  
    19811981    RTGCPHYS const GCPhysDte    = GCPhysDevTab + offDte;
    19821982
     1983    LogFlowFunc(("idxSegsEn=%#x GCPhysDevTab=%#RGp offDte=%#x GCPhysDte=%#RGp\n", idxSegsEn, GCPhysDevTab, offDte, GCPhysDte));
     1984
    19831985    Assert(!(GCPhysDevTab & X86_PAGE_4K_OFFSET_MASK));
    19841986    int rc = PDMDevHlpPCIPhysRead(pDevIns, GCPhysDte, pDte, sizeof(*pDte));
     
    20662068         *        raising an ILLEGAL_DEV_TABLE_ENTRY event or an IO_PAGE_FAULT event here.
    20672069         *        I'm just going with I/O page fault. */
    2068         LogFunc(("Invalid root page table level %#x -> IOPF", uMaxLevel));
     2070        LogFunc(("Invalid root page table level %#x -> IOPF\n", uMaxLevel));
    20692071        EVT_IO_PAGE_FAULT_T EvtIoPageFault;
    20702072        iommuAmdInitIoPageFaultEvent(uDevId, pDte->n.u16DomainId, uIova, true /* fPresent */, false /* fRsvdNotZero */,
     
    20812083    else
    20822084    {
    2083         LogFunc(("Permission denied (fAccess=%#x fRootPtePerm=%#x) -> IOPF", fAccess, fRootPtePerm));
     2085        LogFunc(("Permission denied (fAccess=%#x fRootPtePerm=%#x) -> IOPF\n", fAccess, fRootPtePerm));
    20842086        EVT_IO_PAGE_FAULT_T EvtIoPageFault;
    20852087        iommuAmdInitIoPageFaultEvent(uDevId, pDte->n.u16DomainId, uIova, true /* fPresent */, false /* fRsvdNotZero */,
     
    21532155        else
    21542156        {
    2155             LogFunc(("Page table entry permission denied (fAccess=%#x fPtePerm=%#x) -> IOPF", fAccess, fPtePerm));
     2157            LogFunc(("Page table entry permission denied (fAccess=%#x fPtePerm=%#x) -> IOPF\n", fAccess, fPtePerm));
    21562158            EVT_IO_PAGE_FAULT_T EvtIoPageFault;
    21572159            iommuAmdInitIoPageFaultEvent(uDevId, pDte->n.u16DomainId, uIova, true /* fPresent */, false /* fRsvdNotZero */,
     
    21902192            }
    21912193
    2192             LogFunc(("Page size invalid cShift=%#x -> IOPF", cShift));
     2194            LogFunc(("Page size invalid cShift=%#x -> IOPF\n", cShift));
    21932195            EVT_IO_PAGE_FAULT_T EvtIoPageFault;
    21942196            iommuAmdInitIoPageFaultEvent(uDevId, pDte->n.u16DomainId, uIova, true /* fPresent */, false /* fRsvdNotZero */,
     
    22052207        else
    22062208        {
    2207             LogFunc(("Next level of PDE invalid uNextLevel=%#x -> IOPF", uNextLevel));
     2209            LogFunc(("Next level of PDE invalid uNextLevel=%#x -> IOPF\n", uNextLevel));
    22082210            EVT_IO_PAGE_FAULT_T EvtIoPageFault;
    22092211            iommuAmdInitIoPageFaultEvent(uDevId, pDte->n.u16DomainId, uIova, true /* fPresent */, false /* fRsvdNotZero */,
     
    22222224        else
    22232225        {
    2224             LogFunc(("Next level (%#x) must be less than the current level (%#x) -> IOPF", uNextLevel, uLevel));
     2226            LogFunc(("Next level (%#x) must be less than the current level (%#x) -> IOPF\n", uNextLevel, uLevel));
    22252227            EVT_IO_PAGE_FAULT_T EvtIoPageFault;
    22262228            iommuAmdInitIoPageFaultEvent(uDevId, pDte->n.u16DomainId, uIova, true /* fPresent */, false /* fRsvdNotZero */,
     
    22402242        else
    22412243        {
    2242             LogFunc(("IOVA of skipped levels are not zero %#RX64 (SkipMask=%#RX64) -> IOPF", uIova, uIovaSkipMask));
     2244            LogFunc(("IOVA of skipped levels are not zero %#RX64 (SkipMask=%#RX64) -> IOPF\n", uIova, uIovaSkipMask));
    22432245            EVT_IO_PAGE_FAULT_T EvtIoPageFault;
    22442246            iommuAmdInitIoPageFaultEvent(uDevId, pDte->n.u16DomainId, uIova, true /* fPresent */, false /* fRsvdNotZero */,
     
    25332535                }
    25342536
    2535                 LogFunc(("Interrupt type (%#x) invalid -> IOPF", Irte.n.u3IntrType));
     2537                LogFunc(("Interrupt type (%#x) invalid -> IOPF\n", Irte.n.u3IntrType));
    25362538                EVT_IO_PAGE_FAULT_T EvtIoPageFault;
    25372539                iommuAmdInitIoPageFaultEvent(uDevId, pDte->n.u16DomainId, pMsiIn->Addr.u64, Irte.n.u1RemapEnable,
     
    25412543            }
    25422544
    2543             LogFunc(("Guest mode not supported -> IOPF"));
     2545            LogFunc(("Guest mode not supported -> IOPF\n"));
    25442546            EVT_IO_PAGE_FAULT_T EvtIoPageFault;
    25452547            iommuAmdInitIoPageFaultEvent(uDevId, pDte->n.u16DomainId, pMsiIn->Addr.u64, Irte.n.u1RemapEnable,
     
    25492551        }
    25502552
    2551         LogFunc(("Remapping disabled -> IOPF"));
     2553        LogFunc(("Remapping disabled -> IOPF\n"));
    25522554        EVT_IO_PAGE_FAULT_T EvtIoPageFault;
    25532555        iommuAmdInitIoPageFaultEvent(uDevId, pDte->n.u16DomainId, pMsiIn->Addr.u64, Irte.n.u1RemapEnable,
     
    25762578{
    25772579    /* Read the device table entry from memory. */
     2580    LogFlowFunc(("uDevId=%#x enmOp=%u\n", uDevId, enmOp));
     2581
    25782582    DTE_T Dte;
    25792583    int rc = iommuAmdReadDte(pDevIns, uDevId, enmOp, &Dte);
     
    26732677                        Assert(uIntrCtrl == IOMMU_INTR_CTRL_RSVD);
    26742678
    2675                         LogFunc(("IntCtl mode invalid %#x -> Illegal DTE", uIntrCtrl));
     2679                        LogFunc(("IntCtl mode invalid %#x -> Illegal DTE\n", uIntrCtrl));
    26762680
    26772681                        EVT_ILLEGAL_DTE_T Event;
     
    26882692                    default:
    26892693                    {
    2690                         LogFunc(("MSI data delivery mode invalid %#x -> Target abort", u8DeliveryMode));
     2694                        LogFunc(("MSI data delivery mode invalid %#x -> Target abort\n", u8DeliveryMode));
    26912695                        iommuAmdSetPciTargetAbort(pDevIns);
    26922696                        return VERR_IOMMU_INTR_REMAP_FAILED;
     
    27052709            else
    27062710            {
    2707                 LogFunc(("MSI address region invalid %#RX64.", pMsiIn->Addr.u64));
     2711                LogFunc(("MSI address region invalid %#RX64\n", pMsiIn->Addr.u64));
    27082712                return VERR_IOMMU_INTR_REMAP_FAILED;
    27092713            }
     
    27122716        {
    27132717            /** @todo IOMMU: Add to interrupt remapping cache. */
     2718            LogFlowFunc(("DTE interrupt map not valid\n"));
    27142719            *pMsiOut = *pMsiIn;
    27152720            return VINF_SUCCESS;
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