Changeset 86119 in vbox for trunk/src/VBox/Devices/Bus/DevIommuAmd.cpp
- Timestamp:
- Sep 14, 2020 9:15:29 AM (4 years ago)
- File:
-
- 1 edited
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trunk/src/VBox/Devices/Bus/DevIommuAmd.cpp
r86090 r86119 2468 2468 IOMMUOP enmOp, PIRTE_T pIrte) 2469 2469 { 2470 /* Ensure the IRTE length is valid. */ 2471 Assert(pDte->n.u4IntrTableLength < IOMMU_DTE_INTR_TAB_LEN_MAX); 2472 2470 2473 RTGCPHYS const GCPhysIntrTable = pDte->au64[2] & IOMMU_DTE_IRTE_ROOT_PTR_MASK; 2474 uint16_t const cbIntrTable = IOMMU_GET_INTR_TAB_LEN(pDte); 2471 2475 uint16_t const offIrte = (uDataIn & IOMMU_MSI_DATA_IRTE_OFFSET_MASK) << IOMMU_IRTE_SIZE_SHIFT; 2472 2476 RTGCPHYS const GCPhysIrte = GCPhysIntrTable + offIrte; 2473 2477 2474 /* Ensure the IRTE offset is within the specified table size. */ 2475 Assert(pDte->n.u4IntrTableLength < 12); 2476 if (offIrte + sizeof(IRTE_T) <= (1U << pDte->n.u4IntrTableLength) << IOMMU_IRTE_SIZE_SHIFT) 2478 /* Ensure the IRTE falls completely within the interrupt table. */ 2479 if (offIrte + sizeof(IRTE_T) <= cbIntrTable) 2477 2480 { /* likely */ } 2478 2481 else 2479 2482 { 2483 LogFunc(("IRTE exceeds table length (GCPhysIntrTable=%#RGp cbIntrTable=%u offIrte=%#x uDataIn=%#x) -> IOPF\n", 2484 GCPhysIntrTable, cbIntrTable, offIrte, uDataIn)); 2485 2480 2486 EVT_IO_PAGE_FAULT_T EvtIoPageFault; 2481 2487 iommuAmdInitIoPageFaultEvent(uDevId, pDte->n.u16DomainId, GCPhysIn, false /* fPresent */, false /* fRsvdNotZero */, … … 2657 2663 { 2658 2664 /* Validate the encoded interrupt table length when IntCtl specifies remapping. */ 2659 uint 32_t const uIntTabLen = Dte.n.u4IntrTableLength;2660 if ( Dte.n.u4IntrTableLength < 12)2665 uint8_t const uIntrTabLen = Dte.n.u4IntrTableLength; 2666 if (uIntrTabLen < IOMMU_DTE_INTR_TAB_LEN_MAX) 2661 2667 { 2662 2668 /* … … 2674 2680 } 2675 2681 2676 LogFunc(("Invalid interrupt table length %#x -> Illegal DTE\n", uInt TabLen));2682 LogFunc(("Invalid interrupt table length %#x -> Illegal DTE\n", uIntrTabLen)); 2677 2683 EVT_ILLEGAL_DTE_T Event; 2678 2684 iommuAmdInitIllegalDteEvent(uDevId, pMsiIn->Addr.u64, false /* fRsvdNotZero */, enmOp, &Event); … … 3198 3204 { 3199 3205 pHlp->pfnPrintf(pHlp, " Size = %#x (%u bytes)\n", DevTabBar.n.u9Size, 3200 IOMMU_GET_DEV_TAB_LEN( DevTabBar));3206 IOMMU_GET_DEV_TAB_LEN(&DevTabBar)); 3201 3207 pHlp->pfnPrintf(pHlp, " Base address = %#RX64\n", DevTabBar.n.u40Base << X86_PAGE_4K_SHIFT); 3202 3208 } … … 3775 3781 3776 3782 pHlp->pfnPrintf(pHlp, "%sInterrupt Map Valid = %RTbool\n", pszPrefix, pDte->n.u1IntrMapValid); 3777 if (pDte->n.u4IntrTableLength < 12) 3778 { 3779 uint32_t const cEntries = 1U << pDte->n.u4IntrTableLength; 3780 pHlp->pfnPrintf(pHlp, "%sInterrupt Table Length = %#x (%u entries, %u bytes)\n", pszPrefix, 3781 pDte->n.u4IntrTableLength, cEntries, cEntries << IOMMU_IRTE_SIZE_SHIFT); 3783 uint8_t const uIntrTabLen = pDte->n.u4IntrTableLength; 3784 if (uIntrTabLen < IOMMU_DTE_INTR_TAB_LEN_MAX) 3785 { 3786 uint16_t const cEntries = IOMMU_GET_INTR_TAB_ENTRIES(pDte); 3787 uint16_t const cbIntrTable = IOMMU_GET_INTR_TAB_LEN(pDte); 3788 pHlp->pfnPrintf(pHlp, "%sInterrupt Table Length = %#x (%u entries, %u bytes)\n", pszPrefix, uIntrTabLen, cEntries, 3789 cbIntrTable); 3782 3790 } 3783 3791 else 3784 pHlp->pfnPrintf(pHlp, "%sInterrupt Table Length = %#x (invalid )\n", pszPrefix, pDte->n.u4IntrTableLength);3792 pHlp->pfnPrintf(pHlp, "%sInterrupt Table Length = %#x (invalid!)\n", pszPrefix, uIntrTabLen); 3785 3793 pHlp->pfnPrintf(pHlp, "%sIgnore Unmapped Interrupts = %RTbool\n", pszPrefix, pDte->n.u1IgnoreUnmappedIntrs); 3786 3794 pHlp->pfnPrintf(pHlp, "%sInterrupt Table Root Ptr = %#RX64 (addr=%#RGp)\n", pszPrefix, … … 3863 3871 if (GCPhysDevTab) 3864 3872 { 3865 uint32_t const cbDevTab = IOMMU_GET_DEV_TAB_LEN( DevTabBar);3873 uint32_t const cbDevTab = IOMMU_GET_DEV_TAB_LEN(&DevTabBar); 3866 3874 uint32_t const cDtes = cbDevTab / sizeof(DTE_T); 3867 3875 pHlp->pfnPrintf(pHlp, " Table %u (base=%#RGp size=%u bytes entries=%u):\n", i, GCPhysDevTab, cbDevTab, cDtes);
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