- Timestamp:
- Jan 22, 2021 11:12:45 PM (4 years ago)
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 3 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMR0/HMSVMR0.cpp
r87373 r87387 712 712 * - CPUMCTX_WSF_IBPB_ENTRY in pVCpu->cpum.GstCtx.fWorldSwitcher 713 713 * - CPUMCTX_WSF_IBPB_EXIT in pVCpu->cpum.GstCtx.fWorldSwitcher 714 * - CPUMIsGuestFPUStateActive() (windows only)715 * - CPUMCTX.fXStateMask (windows only)714 * - Perhaps: CPUMIsGuestFPUStateActive() (windows only) 715 * - Perhaps: CPUMCTX.fXStateMask (windows only) 716 716 * 717 717 * We currently ASSUME that neither CPUMCTX_WSF_IBPB_ENTRY nor -
trunk/src/VBox/VMM/VMMR0/HMSVMR0.h
r87359 r87387 54 54 55 55 /** 56 * Prepares for and executes VMRUN (64-bit register context).57 *58 * @returns VBox status code.59 * @param pVM The cross context VM structure. (Not used.)60 * @param pVCpu The cross context virtual CPU structure.61 * @param HCPhyspVMCB Physical address of the VMCB.62 *63 * @remarks With spectre mitigations and the usual need for speed (/ micro64 * optimizations), we have a bunch of variations of this code depending65 * on a few precoditions. In release builds, the code is entirely66 * without conditionals. Debug builds have a couple of assertions that67 * shouldn't ever be triggered.68 *69 * @{70 */71 DECLASM(int) hmR0SvmVmRun_SansXcr0_SansIbpbEntry_SansIbpbExit(PVMCC pVM, PVMCPUCC pVCpu, RTHCPHYS HCPhyspVMCB);72 DECLASM(int) hmR0SvmVmRun_WithXcr0_SansIbpbEntry_SansIbpbExit(PVMCC pVM, PVMCPUCC pVCpu, RTHCPHYS HCPhyspVMCB);73 DECLASM(int) hmR0SvmVmRun_SansXcr0_WithIbpbEntry_SansIbpbExit(PVMCC pVM, PVMCPUCC pVCpu, RTHCPHYS HCPhyspVMCB);74 DECLASM(int) hmR0SvmVmRun_WithXcr0_WithIbpbEntry_SansIbpbExit(PVMCC pVM, PVMCPUCC pVCpu, RTHCPHYS HCPhyspVMCB);75 DECLASM(int) hmR0SvmVmRun_SansXcr0_SansIbpbEntry_WithIbpbExit(PVMCC pVM, PVMCPUCC pVCpu, RTHCPHYS HCPhyspVMCB);76 DECLASM(int) hmR0SvmVmRun_WithXcr0_SansIbpbEntry_WithIbpbExit(PVMCC pVM, PVMCPUCC pVCpu, RTHCPHYS HCPhyspVMCB);77 DECLASM(int) hmR0SvmVmRun_SansXcr0_WithIbpbEntry_WithIbpbExit(PVMCC pVM, PVMCPUCC pVCpu, RTHCPHYS HCPhyspVMCB);78 DECLASM(int) hmR0SvmVmRun_WithXcr0_WithIbpbEntry_WithIbpbExit(PVMCC pVM, PVMCPUCC pVCpu, RTHCPHYS HCPhyspVMCB);79 /** @} */80 81 82 /**83 56 * Executes INVLPGA. 84 57 * 85 * @param pPageGCVirtual page to invalidate.58 * @param GCVirt Virtual page to invalidate. 86 59 * @param u32ASID Tagged TLB id. 87 60 */ 88 DECLASM(void) SVMR0InvlpgA(RTGCPTR pPageGC, uint32_t u32ASID);61 DECLASM(void) SVMR0InvlpgA(RTGCPTR GCVirt, uint32_t u32ASID); 89 62 90 63 #endif /* IN_RING0 */ -
trunk/src/VBox/VMM/include/HMInternal.h
r87372 r87387 1241 1241 VMM_INT_DECL(PVMXVMCSINFO) hmGetVmxActiveVmcsInfo(PVMCPU pVCpu); 1242 1242 1243 /** 1244 * Prepares for and executes VMRUN (64-bit register context). 1245 * 1246 * @returns VBox status code. 1247 * @param pVM The cross context VM structure. (Not used.) 1248 * @param pVCpu The cross context virtual CPU structure. 1249 * @param HCPhyspVMCB Physical address of the VMCB. 1250 * 1251 * @remarks With spectre mitigations and the usual need for speed (/ micro 1252 * optimizations), we have a bunch of variations of this code depending 1253 * on a few precoditions. In release builds, the code is entirely 1254 * without conditionals. Debug builds have a couple of assertions that 1255 * shouldn't ever be triggered. 1256 * 1257 * @{ 1258 */ 1259 DECLASM(int) hmR0SvmVmRun_SansXcr0_SansIbpbEntry_SansIbpbExit(PVMCC pVM, PVMCPUCC pVCpu, RTHCPHYS HCPhyspVMCB); 1260 DECLASM(int) hmR0SvmVmRun_WithXcr0_SansIbpbEntry_SansIbpbExit(PVMCC pVM, PVMCPUCC pVCpu, RTHCPHYS HCPhyspVMCB); 1261 DECLASM(int) hmR0SvmVmRun_SansXcr0_WithIbpbEntry_SansIbpbExit(PVMCC pVM, PVMCPUCC pVCpu, RTHCPHYS HCPhyspVMCB); 1262 DECLASM(int) hmR0SvmVmRun_WithXcr0_WithIbpbEntry_SansIbpbExit(PVMCC pVM, PVMCPUCC pVCpu, RTHCPHYS HCPhyspVMCB); 1263 DECLASM(int) hmR0SvmVmRun_SansXcr0_SansIbpbEntry_WithIbpbExit(PVMCC pVM, PVMCPUCC pVCpu, RTHCPHYS HCPhyspVMCB); 1264 DECLASM(int) hmR0SvmVmRun_WithXcr0_SansIbpbEntry_WithIbpbExit(PVMCC pVM, PVMCPUCC pVCpu, RTHCPHYS HCPhyspVMCB); 1265 DECLASM(int) hmR0SvmVmRun_SansXcr0_WithIbpbEntry_WithIbpbExit(PVMCC pVM, PVMCPUCC pVCpu, RTHCPHYS HCPhyspVMCB); 1266 DECLASM(int) hmR0SvmVmRun_WithXcr0_WithIbpbEntry_WithIbpbExit(PVMCC pVM, PVMCPUCC pVCpu, RTHCPHYS HCPhyspVMCB); 1243 1267 /** @} */ 1244 1268 1269 1270 /** @} */ 1271 1245 1272 RT_C_DECLS_END 1246 1273
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