VirtualBox

Changeset 87536 in vbox for trunk/src


Ignore:
Timestamp:
Feb 2, 2021 2:47:34 PM (4 years ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
142562
Message:

VMM/HM: Moved MSRs out of the g_HmR0 structure so we can use them directly rather than an unsafe copy in VM::hm.s. bugref:9217

Location:
trunk/src/VBox/VMM
Files:
2 edited

Legend:

Unmodified
Added
Removed

  • trunk/src/VBox/VMM/VMMR0/HMR0.cpp

    r87535 r87536  
    9696static HMR0VTABLE   g_HmR0Ops;
    9797
    98 /** Set if VT-x (VMX) is supported by the CPU. */
    99 bool                g_fHmVmxSupported = false;
    100 /** Set if AMD-V is supported by the CPU. */
    101 bool                g_fHmSvmSupported = false;
    10298/** Maximum allowed ASID/VPID (inclusive).
    10399 * @todo r=bird: This is exclusive for VT-x according to source code comment.
    … …  
    107103
    108104
     105/** Set if VT-x (VMX) is supported by the CPU. */
     106bool                g_fHmVmxSupported = false;
     107/** Whether we're using the preemption timer or not. */
     108bool                g_fHmVmxUsePreemptTimer;
     109/** The shift mask employed by the VMX-Preemption timer. */
     110uint8_t             g_cHmVmxPreemptTimerShift;
     111/** Host CR4 value (set by ring-0 VMX init) */
     112uint64_t            g_uHmVmxHostCr4;
     113/** Host EFER value (set by ring-0 VMX init) */
     114uint64_t            g_uHmVmxHostMsrEfer;
     115/** Host SMM monitor control (used for logging/diagnostics) */
     116uint64_t            g_uHmVmxHostSmmMonitorCtl;
     117
     118/** Set if AMD-V is supported by the CPU. */
     119bool                g_fHmSvmSupported = false;
     120/** SVM revision. */
     121uint32_t            g_uHmSvmRev;
     122/** SVM feature bits from cpuid 0x8000000a */
     123uint32_t            g_uHmSvmFeatures;
     124
     125/** MSRs. */
     126SUPHWVIRTMSRS       g_HmMsrs;
     127
     128
    109129/**
    110130 * Global data.
    … …  
    123143            struct
    124144            {
    125                 /** Host CR4 value (set by ring-0 VMX init) */
    126                 uint64_t                    u64HostCr4;
    127                 /** Host EFER value (set by ring-0 VMX init) */
    128                 uint64_t                    u64HostMsrEfer;
    129                 /** Host SMM monitor control (used for logging/diagnostics) */
    130                 uint64_t                    u64HostSmmMonitorCtl;
    131145                /** Last instruction error. */
    132146                uint32_t                    ulLastInstrError;
    133                 /** The shift mask employed by the VMX-Preemption timer. */
    134                 uint8_t                     cPreemptTimerShift;
    135                 /** Whether we're using the preemption timer or not. */
    136                 bool                        fUsePreemptTimer;
    137147                /** Whether we're using SUPR0EnableVTx or not. */
    138148                bool                        fUsingSUPR0EnableVTx;
    … …  
    141151                bool                        fCalledSUPR0EnableVTx;
    142152            } vmx;
    143 
    144             /** AMD-V data. */
    145             struct
    146             {
    147                 /** SVM revision. */
    148                 uint32_t                    u32Rev;
    149                 /** SVM feature bits from cpuid 0x8000000a */
    150                 uint32_t                    u32Features;
    151             } svm;
    152153        } u;
    153         /** MSRs. */
    154         SUPHWVIRTMSRS               Msrs;
    155154    } hwvirt;
    156155
    … …  
    371370{
    372371    /* Read this MSR now as it may be useful for error reporting when initializing VT-x fails. */
    373     g_HmR0.hwvirt.Msrs.u.vmx.u64FeatCtrl = ASMRdMsr(MSR_IA32_FEATURE_CONTROL);
     372    g_HmMsrs.u.vmx.u64FeatCtrl = ASMRdMsr(MSR_IA32_FEATURE_CONTROL);
    374373
    375374    /*
    … …  
    403402    {
    404403        /* Read CR4 and EFER for logging/diagnostic purposes. */
    405         g_HmR0.hwvirt.u.vmx.u64HostCr4     = ASMGetCR4();
    406         g_HmR0.hwvirt.u.vmx.u64HostMsrEfer = ASMRdMsr(MSR_K6_EFER);
     404        g_uHmVmxHostCr4     = ASMGetCR4();
     405        g_uHmVmxHostMsrEfer = ASMRdMsr(MSR_K6_EFER);
    407406
    408407        /* Get VMX MSRs for determining VMX features we can ultimately use. */
    409         SUPR0GetHwvirtMsrs(&g_HmR0.hwvirt.Msrs, SUPVTCAPS_VT_X, false /* fForce */);
     408        SUPR0GetHwvirtMsrs(&g_HmMsrs, SUPVTCAPS_VT_X, false /* fForce */);
    410409
    411410        /*
    … …  
    414413         * table 35-2 says that this MSR is available if either VMX or SMX is supported.
    415414         */
    416         uint64_t const uVmxBasicMsr = g_HmR0.hwvirt.Msrs.u.vmx.u64Basic;
     415        uint64_t const uVmxBasicMsr = g_HmMsrs.u.vmx.u64Basic;
    417416        if (RT_BF_GET(uVmxBasicMsr, VMX_BF_BASIC_DUAL_MON))
    418             g_HmR0.hwvirt.u.vmx.u64HostSmmMonitorCtl = ASMRdMsr(MSR_IA32_SMM_MONITOR_CTL);
     417            g_uHmVmxHostSmmMonitorCtl = ASMRdMsr(MSR_IA32_SMM_MONITOR_CTL);
    419418
    420419        /* Initialize VPID - 16 bits ASID. */
    … …  
    501500                 */
    502501                VMXCTLSMSR PinCtls;
    503                 PinCtls.u = g_HmR0.hwvirt.Msrs.u.vmx.u64PinCtls;
     502                PinCtls.u = g_HmMsrs.u.vmx.u64PinCtls;
    504503                if (PinCtls.n.allowed1 & VMX_PIN_CTLS_PREEMPT_TIMER)
    505504                {
    506                     uint64_t const uVmxMiscMsr = g_HmR0.hwvirt.Msrs.u.vmx.u64Misc;
    507                     g_HmR0.hwvirt.u.vmx.fUsePreemptTimer   = true;
    508                     g_HmR0.hwvirt.u.vmx.cPreemptTimerShift = RT_BF_GET(uVmxMiscMsr, VMX_BF_MISC_PREEMPT_TIMER_TSC);
     505                    uint64_t const uVmxMiscMsr = g_HmMsrs.u.vmx.u64Misc;
     506                    g_fHmVmxUsePreemptTimer   = true;
     507                    g_cHmVmxPreemptTimerShift = RT_BF_GET(uVmxMiscMsr, VMX_BF_MISC_PREEMPT_TIMER_TSC);
    509508                    if (HMIsSubjectToVmxPreemptTimerErratum())
    510                         g_HmR0.hwvirt.u.vmx.cPreemptTimerShift = 0; /* This is about right most of the time here. */
     509                        g_cHmVmxPreemptTimerShift = 0; /* This is about right most of the time here. */
    511510                }
    512511            }
    … …  
    564563        /* Query AMD features. */
    565564        uint32_t u32Dummy;
    566         ASMCpuId(0x8000000a, &g_HmR0.hwvirt.u.svm.u32Rev, &g_uHmMaxAsid, &u32Dummy, &g_HmR0.hwvirt.u.svm.u32Features);
     565        ASMCpuId(0x8000000a, &g_uHmSvmRev, &g_uHmMaxAsid, &u32Dummy, &g_uHmSvmFeatures);
    567566
    568567        /*
    … …  
    582581        if (RT_SUCCESS(rc))
    583582        {
    584             SUPR0GetHwvirtMsrs(&g_HmR0.hwvirt.Msrs, SUPVTCAPS_AMD_V, false /* fForce */);
     583            SUPR0GetHwvirtMsrs(&g_HmMsrs, SUPVTCAPS_AMD_V, false /* fForce */);
    585584            g_fHmSvmSupported = true;
    586585        }
    … …  
    811810    if (   g_fHmVmxSupported
    812811        && g_HmR0.hwvirt.u.vmx.fUsingSUPR0EnableVTx)
    813         rc = g_HmR0Ops.pfnEnableCpu(pHostCpu, pVM, NULL /* pvCpuPage */, NIL_RTHCPHYS, true, &g_HmR0.hwvirt.Msrs);
     812        rc = g_HmR0Ops.pfnEnableCpu(pHostCpu, pVM, NULL /* pvCpuPage */, NIL_RTHCPHYS, true, &g_HmMsrs);
    814813    else
    815814    {
    816815        AssertLogRelMsgReturn(pHostCpu->hMemObj != NIL_RTR0MEMOBJ, ("hmR0EnableCpu failed idCpu=%u.\n", idCpu), VERR_HM_IPE_1);
    817         rc = g_HmR0Ops.pfnEnableCpu(pHostCpu, pVM, pHostCpu->pvMemObj, pHostCpu->HCPhysMemObj, false, &g_HmR0.hwvirt.Msrs);
     816        rc = g_HmR0Ops.pfnEnableCpu(pHostCpu, pVM, pHostCpu->pvMemObj, pHostCpu->HCPhysMemObj, false, &g_HmMsrs);
    818817    }
    819818    if (RT_SUCCESS(rc))
    … …  
    11801179    if (pVM->hm.s.vmx.fSupported)
    11811180    {
    1182         pVM->hm.s.vmx.fUsePreemptTimer     &= g_HmR0.hwvirt.u.vmx.fUsePreemptTimer; /* Can be overridden by CFGM in HMR3Init(). */
    1183         pVM->hm.s.vmx.cPreemptTimerShift    = g_HmR0.hwvirt.u.vmx.cPreemptTimerShift;
    1184         pVM->hm.s.vmx.u64HostCr4            = g_HmR0.hwvirt.u.vmx.u64HostCr4;
    1185         pVM->hm.s.vmx.u64HostMsrEfer        = g_HmR0.hwvirt.u.vmx.u64HostMsrEfer;
    1186         pVM->hm.s.vmx.u64HostSmmMonitorCtl  = g_HmR0.hwvirt.u.vmx.u64HostSmmMonitorCtl;
    1187         HMGetVmxMsrsFromHwvirtMsrs(&g_HmR0.hwvirt.Msrs, &pVM->hm.s.vmx.Msrs);
     1181        pVM->hm.s.vmx.fUsePreemptTimer     &= g_fHmVmxUsePreemptTimer; /* Can be overridden by CFGM in HMR3Init(). */
     1182        pVM->hm.s.vmx.cPreemptTimerShift    = g_cHmVmxPreemptTimerShift;
     1183        pVM->hm.s.vmx.u64HostCr4            = g_uHmVmxHostCr4;
     1184        pVM->hm.s.vmx.u64HostMsrEfer        = g_uHmVmxHostMsrEfer;
     1185        pVM->hm.s.vmx.u64HostSmmMonitorCtl  = g_uHmVmxHostSmmMonitorCtl;
     1186        HMGetVmxMsrsFromHwvirtMsrs(&g_HmMsrs, &pVM->hm.s.vmx.Msrs);
    11881187        /* If you need to tweak host MSRs for testing VMX R0 code, do it here. */
    11891188
    … …  
    12211220    else if (pVM->hm.s.svm.fSupported)
    12221221    {
    1223         pVM->hm.s.svm.u32Rev            = g_HmR0.hwvirt.u.svm.u32Rev;
    1224         pVM->hm.s.svm.fFeaturesForRing3 = pVM->hmr0.s.svm.fFeatures = g_HmR0.hwvirt.u.svm.u32Features;
    1225         pVM->hm.s.svm.u64MsrHwcr        = g_HmR0.hwvirt.Msrs.u.svm.u64MsrHwcr;
     1222        pVM->hm.s.svm.u32Rev            = g_uHmSvmRev;
     1223        pVM->hm.s.svm.fFeaturesForRing3 = pVM->hmr0.s.svm.fFeatures = g_uHmSvmFeatures;
     1224        pVM->hm.s.svm.u64MsrHwcr        = g_HmMsrs.u.svm.u64MsrHwcr;
    12261225        /* If you need to tweak host MSRs for testing SVM R0 code, do it here. */
    12271226    }

  • trunk/src/VBox/VMM/include/HMInternal.h

    r87532 r87536  
    14431443
    14441444#ifdef IN_RING0
    1445 extern bool     g_fHmVmxSupported;
    1446 extern bool     g_fHmSvmSupported;
    1447 extern uint32_t g_uHmMaxAsid;
     1445extern bool             g_fHmVmxSupported;
     1446extern uint32_t         g_uHmMaxAsid;
     1447extern bool             g_fHmVmxUsePreemptTimer;
     1448extern uint8_t          g_cHmVmxPreemptTimerShift;
     1449extern uint64_t         g_uHmVmxHostCr4;
     1450extern uint64_t         g_uHmVmxHostMsrEfer;
     1451extern uint64_t         g_uHmVmxHostSmmMonitorCtl;
     1452extern bool             g_fHmSvmSupported;
     1453extern uint32_t         g_uHmSvmRev;
     1454extern uint32_t         g_uHmSvmFeatures;
     1455
     1456extern SUPHWVIRTMSRS    g_HmMsrs;
     1457
    14481458
    14491459VMMR0_INT_DECL(PHMPHYSCPU)  hmR0GetCurrentCpu(void);
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