Changeset 87538 in vbox
- Timestamp:
- Feb 2, 2021 3:03:56 PM (4 years ago)
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 4 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMAll/HMSVMAll.cpp
r87511 r87538 184 184 { 185 185 #ifdef IN_RING0 186 bool const fVGif = RT_BOOL( pVM->hmr0.s.svm.fFeatures & X86_CPUID_SVM_FEATURE_EDX_VGIF);186 bool const fVGif = RT_BOOL(g_fHmSvmFeatures & X86_CPUID_SVM_FEATURE_EDX_VGIF); 187 187 #else 188 188 bool const fVGif = RT_BOOL(pVM->hm.s.svm.fFeaturesForRing3 & X86_CPUID_SVM_FEATURE_EDX_VGIF); -
trunk/src/VBox/VMM/VMMR0/HMR0.cpp
r87537 r87538 134 134 uint32_t g_uHmSvmRev; 135 135 /** SVM feature bits from cpuid 0x8000000a */ 136 uint32_t g_ uHmSvmFeatures;136 uint32_t g_fHmSvmFeatures; 137 137 138 138 … … 543 543 /* Query AMD features. */ 544 544 uint32_t u32Dummy; 545 ASMCpuId(0x8000000a, &g_uHmSvmRev, &g_uHmMaxAsid, &u32Dummy, &g_ uHmSvmFeatures);545 ASMCpuId(0x8000000a, &g_uHmSvmRev, &g_uHmMaxAsid, &u32Dummy, &g_fHmSvmFeatures); 546 546 547 547 /* … … 1199 1199 { 1200 1200 pVM->hm.s.svm.u32Rev = g_uHmSvmRev; 1201 pVM->hm.s.svm.fFeaturesForRing3 = pVM->hmr0.s.svm.fFeatures = g_uHmSvmFeatures;1201 pVM->hm.s.svm.fFeaturesForRing3 = g_fHmSvmFeatures; 1202 1202 pVM->hm.s.svm.u64MsrHwcr = g_HmMsrs.u.svm.u64MsrHwcr; 1203 1203 /* If you need to tweak host MSRs for testing SVM R0 code, do it here. */ -
trunk/src/VBox/VMM/VMMR0/HMSVMR0.cpp
r87522 r87538 867 867 { 868 868 PCVMCC pVM = pVCpu->CTX_SUFF(pVM); 869 bool const fHostVmcbCleanBits = RT_BOOL( pVM->hmr0.s.svm.fFeatures & X86_CPUID_SVM_FEATURE_EDX_VMCB_CLEAN);869 bool const fHostVmcbCleanBits = RT_BOOL(g_fHmSvmFeatures & X86_CPUID_SVM_FEATURE_EDX_VMCB_CLEAN); 870 870 if (!fIsNestedGuest) 871 871 return fHostVmcbCleanBits; … … 885 885 #ifdef VBOX_WITH_NESTED_HWVIRT_SVM 886 886 if (CPUMIsGuestInSvmNestedHwVirtMode(&pVCpu->cpum.GstCtx)) 887 return ( pVM->hmr0.s.svm.fFeatures & X86_CPUID_SVM_FEATURE_EDX_DECODE_ASSISTS)887 return (g_fHmSvmFeatures & X86_CPUID_SVM_FEATURE_EDX_DECODE_ASSISTS) 888 888 && pVM->cpum.ro.GuestFeatures.fSvmDecodeAssists; 889 889 #endif 890 return RT_BOOL( pVM->hmr0.s.svm.fFeatures & X86_CPUID_SVM_FEATURE_EDX_DECODE_ASSISTS);890 return RT_BOOL(g_fHmSvmFeatures & X86_CPUID_SVM_FEATURE_EDX_DECODE_ASSISTS); 891 891 } 892 892 … … 903 903 #ifdef VBOX_WITH_NESTED_HWVIRT_SVM 904 904 if (CPUMIsGuestInSvmNestedHwVirtMode(&pVCpu->cpum.GstCtx)) 905 return ( pVM->hmr0.s.svm.fFeatures & X86_CPUID_SVM_FEATURE_EDX_NRIP_SAVE)905 return (g_fHmSvmFeatures & X86_CPUID_SVM_FEATURE_EDX_NRIP_SAVE) 906 906 && pVM->cpum.ro.GuestFeatures.fSvmNextRipSave; 907 907 #endif 908 return RT_BOOL( pVM->hmr0.s.svm.fFeatures & X86_CPUID_SVM_FEATURE_EDX_NRIP_SAVE);908 return RT_BOOL(g_fHmSvmFeatures & X86_CPUID_SVM_FEATURE_EDX_NRIP_SAVE); 909 909 } 910 910 … … 1003 1003 * Determin some configuration parameters. 1004 1004 */ 1005 bool const fPauseFilter = RT_BOOL( pVM->hmr0.s.svm.fFeatures & X86_CPUID_SVM_FEATURE_EDX_PAUSE_FILTER);1006 bool const fPauseFilterThreshold = RT_BOOL( pVM->hmr0.s.svm.fFeatures & X86_CPUID_SVM_FEATURE_EDX_PAUSE_FILTER_THRESHOLD);1005 bool const fPauseFilter = RT_BOOL(g_fHmSvmFeatures & X86_CPUID_SVM_FEATURE_EDX_PAUSE_FILTER); 1006 bool const fPauseFilterThreshold = RT_BOOL(g_fHmSvmFeatures & X86_CPUID_SVM_FEATURE_EDX_PAUSE_FILTER_THRESHOLD); 1007 1007 bool const fUsePauseFilter = fPauseFilter && pVM->hm.s.svm.cPauseFilter; 1008 1008 1009 bool const fLbrVirt = RT_BOOL( pVM->hmr0.s.svm.fFeatures & X86_CPUID_SVM_FEATURE_EDX_LBR_VIRT);1009 bool const fLbrVirt = RT_BOOL(g_fHmSvmFeatures & X86_CPUID_SVM_FEATURE_EDX_LBR_VIRT); 1010 1010 bool const fUseLbrVirt = fLbrVirt && pVM->hm.s.svm.fLbrVirt; /** @todo IEM implementation etc. */ 1011 1011 1012 1012 #ifdef VBOX_WITH_NESTED_HWVIRT_SVM 1013 bool const fVirtVmsaveVmload = RT_BOOL( pVM->hmr0.s.svm.fFeatures & X86_CPUID_SVM_FEATURE_EDX_VIRT_VMSAVE_VMLOAD);1013 bool const fVirtVmsaveVmload = RT_BOOL(g_fHmSvmFeatures & X86_CPUID_SVM_FEATURE_EDX_VIRT_VMSAVE_VMLOAD); 1014 1014 bool const fUseVirtVmsaveVmload = fVirtVmsaveVmload && pVM->hm.s.svm.fVirtVmsaveVmload && fNestedPaging; 1015 1015 1016 bool const fVGif = RT_BOOL( pVM->hmr0.s.svm.fFeatures & X86_CPUID_SVM_FEATURE_EDX_VGIF);1016 bool const fVGif = RT_BOOL(g_fHmSvmFeatures & X86_CPUID_SVM_FEATURE_EDX_VGIF); 1017 1017 bool const fUseVGif = fVGif && pVM->hm.s.svm.fVGif; 1018 1018 #endif … … 1366 1366 else 1367 1367 { 1368 if ( pVM->hmr0.s.svm.fFeatures & X86_CPUID_SVM_FEATURE_EDX_FLUSH_BY_ASID)1368 if (g_fHmSvmFeatures & X86_CPUID_SVM_FEATURE_EDX_FLUSH_BY_ASID) 1369 1369 pVmcb->ctrl.TLBCtrl.n.u8TLBFlush = SVM_TLB_FLUSH_SINGLE_CONTEXT; 1370 1370 else … … 2053 2053 2054 2054 HMSVM_ASSERT_NOT_IN_NESTED_GUEST(pCtx); /* Nested VGIF is not supported yet. */ 2055 Assert( pVM->hmr0.s.svm.fFeatures & X86_CPUID_SVM_FEATURE_EDX_VGIF); /* Physical hardware supports VGIF. */2055 Assert(g_fHmSvmFeatures & X86_CPUID_SVM_FEATURE_EDX_VGIF); /* Physical hardware supports VGIF. */ 2056 2056 Assert(HMIsSvmVGifActive(pVM)); /* Outer VM has enabled VGIF. */ 2057 2057 NOREF(pVM); … … 4106 4106 */ 4107 4107 PVMCC pVM = pVCpu->CTX_SUFF(pVM); 4108 if (RT_UNLIKELY( ! pVM->hmr0.s.svm.fFeatures4108 if (RT_UNLIKELY( !g_fHmSvmFeatures 4109 4109 && pVCpu->hm.s.Event.fPending 4110 4110 && SVM_EVENT_GET_TYPE(pVCpu->hm.s.Event.u64IntInfo) == SVM_EVENT_NMI)) -
trunk/src/VBox/VMM/include/HMInternal.h
r87536 r87538 689 689 bool fAlwaysFlushTLB; 690 690 bool afAlignment0[3]; 691 /** SVM feature bits from cpuid 0x8000000a, safe ring-0 copy. */692 uint32_t fFeatures;693 691 } svm; 694 692 } HMR0PERVM; … … 1452 1450 extern bool g_fHmSvmSupported; 1453 1451 extern uint32_t g_uHmSvmRev; 1454 extern uint32_t g_ uHmSvmFeatures;1452 extern uint32_t g_fHmSvmFeatures; 1455 1453 1456 1454 extern SUPHWVIRTMSRS g_HmMsrs;
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