Changeset 88164 in vbox
- Timestamp:
- Mar 17, 2021 5:13:24 PM (4 years ago)
- Location:
- trunk/src/VBox/Devices/Audio
- Files:
-
- 5 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/Devices/Audio/DevHDA.cpp
r88158 r88164 499 499 SSMFIELD_ENTRY(HDABDLESTATELEGACY, u32BDLIndex), 500 500 SSMFIELD_ENTRY(HDABDLESTATELEGACY, cbBelowFIFOW), 501 SSMFIELD_ENTRY_OLD(FIFO, HDA_FIFO_MAX),/* Deprecated; now is handled in the stream's circular buffer. */501 SSMFIELD_ENTRY_OLD(FIFO, 256), /* Deprecated; now is handled in the stream's circular buffer. */ 502 502 SSMFIELD_ENTRY(HDABDLESTATELEGACY, u32BufOff), 503 503 SSMFIELD_ENTRY_TERM() -
trunk/src/VBox/Devices/Audio/DevHDA.h
r88063 r88164 82 82 /** Critical section protecting the HDA state. */ 83 83 PDMCRITSECT CritSect; 84 /** Internal stream states (aligned on 64 byte boundrary). */ 85 HDASTREAM aStreams[HDA_MAX_STREAMS]; 84 86 /** The HDA's register set. */ 85 87 uint32_t au32Regs[HDA_NUM_REGS]; 86 /** Internal stream states. */87 HDASTREAM aStreams[HDA_MAX_STREAMS];88 88 /** CORB buffer base address. */ 89 89 uint64_t u64CORBBase; … … 215 215 uint64_t uAlignmentCheckMagic; 216 216 } HDASTATE; 217 AssertCompileMemberAlignment(HDASTATE, aStreams, 64); 217 218 /** Pointer to a shared HDA device state. */ 218 219 typedef HDASTATE *PHDASTATE; -
trunk/src/VBox/Devices/Audio/DevHDACommon.h
r88137 r88164 103 103 * Other values not listed are not supported. 104 104 */ 105 /** Maximum FIFO size (in bytes). */106 #define HDA_FIFO_MAX 256107 105 108 106 /** Default timer frequency (in Hz). -
trunk/src/VBox/Devices/Audio/HDAStream.cpp
r88163 r88164 477 477 const uint32_t u32CBL = HDA_STREAM_REG(pThis, CBL, uSD); 478 478 const uint8_t u8FIFOS = HDA_STREAM_REG(pThis, FIFOS, uSD) + 1; 479 uint8_tu8FIFOW = hdaSDFIFOWToBytes(HDA_STREAM_REG(pThis, FIFOW, uSD));479 uint8_t u8FIFOW = hdaSDFIFOWToBytes(HDA_STREAM_REG(pThis, FIFOW, uSD)); 480 480 const uint16_t u16FMT = HDA_STREAM_REG(pThis, FMT, uSD); 481 481 -
trunk/src/VBox/Devices/Audio/HDAStream.h
r88158 r88164 234 234 typedef struct HDASTREAM 235 235 { 236 /** Internal state of this stream. */ 237 HDASTREAMSTATE State; 238 236 239 /** Stream descriptor number (SDn). */ 237 240 uint8_t u8SD; … … 239 242 * For a stereo stream, this is u8Channel + 1. */ 240 243 uint8_t u8Channel; 241 uint8_t abPadding0[6]; 242 #ifdef VBOX_WITH_AUDIO_HDA_ASYNC_IO 243 /** The stream's shared r0/r3 critical section to serialize access between the async I/O 244 * thread and (basically) the guest. */ 245 PDMCRITSECT CritSect; 246 #endif 247 /** DMA base address (SDnBDPU - SDnBDPL). 248 * Will be updated in hdaR3StreamInit(). */ 244 /** FIFO Watermark (checked + translated in bytes, FIFOW). 245 * This will be update from hdaRegWriteSDFIFOW() and also copied 246 * hdaR3StreamInit() for some reason. */ 247 uint8_t u8FIFOW; 248 249 /** @name Register values at stream setup. 250 * These will all be copied in hdaR3StreamInit(). 251 * @{ */ 252 /** FIFO Size (checked + translated in bytes, FIFOS). 253 * This is supposedly the max number of bytes we'll be DMA'ing in one chunk 254 * and correspondingly the LPIB & wall clock update jumps. However, we're 255 * not at all being honest with the guest about this. */ 256 uint8_t u8FIFOS; 257 /** Cyclic Buffer Length (SDnCBL) - Represents the size of the ring buffer. */ 258 uint32_t u32CBL; 259 /** Last Valid Index (SDnLVI). */ 260 uint16_t u16LVI; 261 /** Format (SDnFMT). */ 262 uint16_t u16FMT; 263 uint8_t abPadding[4]; 264 /** DMA base address (SDnBDPU - SDnBDPL). */ 249 265 uint64_t u64BDLBase; 250 /** Cyclic Buffer Length (SDnCBL). 251 * Represents the size of the ring buffer. 252 * Will be updated in hdaR3StreamInit(). */ 253 uint32_t u32CBL; 254 /** Format (SDnFMT). 255 * Will be updated in hdaR3StreamInit(). */ 256 uint16_t u16FMT; 257 /** FIFO Size (checked + translated in bytes, FIFOS). 258 * Maximum number of bytes that may have been DMA'd into 259 * memory but not yet transmitted on the link. 260 * 261 * Will be updated in hdaR3StreamInit(). */ 262 uint8_t u8FIFOS; 263 /** FIFO Watermark (checked + translated in bytes, FIFOW). */ 264 uint8_t u8FIFOW; 265 uint8_t abPadding1[2]; 266 /** FIFO scratch buffer, to avoid intermediate (re-)allocations. */ 267 uint8_t abFIFO[HDA_FIFO_MAX + 1]; 268 /** Last Valid Index (SDnLVI). 269 * Will be updated in hdaR3StreamInit(). */ 270 uint16_t u16LVI; 266 /** @} */ 267 271 268 /** The timer for pumping data thru the attached LUN drivers. */ 272 269 TMTIMERHANDLE hTimer; 273 /** Internal state of this stream. */ 274 HDASTREAMSTATE State; 270 271 #ifdef VBOX_WITH_AUDIO_HDA_ASYNC_IO 272 /** Pad the structure size to a 64 byte alignment. */ 273 uint64_t au64Padding1[2]; 274 /** Critical section for serialize access to the stream state between the async 275 * I/O thread and (basically) the guest. */ 276 PDMCRITSECT CritSect; 277 #endif 275 278 } HDASTREAM; 279 AssertCompileMemberAlignment(HDASTREAM, State.aBdl, 16); 280 AssertCompileMemberAlignment(HDASTREAM, State.aSchedule, 16); 281 AssertCompileSizeAlignment(HDASTREAM, 64); 276 282 /** Pointer to an HDA stream (SDI / SDO). */ 277 283 typedef HDASTREAM *PHDASTREAM; … … 320 326 /** Debug bits. */ 321 327 HDASTREAMDEBUG Dbg; 328 uint64_t au64Alignment[2]; 322 329 } HDASTREAMR3; 330 AssertCompileSizeAlignment(HDASTREAMR3, 64); 323 331 /** Pointer to an HDA stream (SDI / SDO). */ 324 332 typedef HDASTREAMR3 *PHDASTREAMR3;
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