Changeset 8876 in vbox for trunk/src/VBox/VMM/HWACCMInternal.h

Timestamp:

May 16, 2008 9:59:07 AM (17 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

30910

Message:

ASID based TLB flushing

File:

• trunk/src/VBox/VMM/HWACCMInternal.h (modified) (3 diffs)

trunk/src/VBox/VMM/HWACCMInternal.h

@@ -31 +31 @@
 #include <VBox/pgm.h>
 #include <iprt/memobj.h>
+#include <iprt/cpuset.h>
+#include <iprt/mp.h>
 
 __BEGIN_DECLS
@@ -317 +319 @@
     STAMCOUNTER             StatNoFlushTLBWorldSwitch;
     STAMCOUNTER             StatFlushTLBCRxChange;
+    STAMCOUNTER             StatFlushASID;
 
     STAMCOUNTER             StatSwitchGuestIrq;
@@ -327 +330 @@
 typedef HWACCM *PHWACCM;
 
+static struct
+{
+    struct
+    {
+        RTR0MEMOBJ  pMemObj;
+        bool        fVMXConfigured;
+        bool        fSVMConfigured;
+    } aCpuInfo[RTCPUSET_MAX_CPUS];
+
+    struct
+    {
+        /** Set by the ring-0 driver to indicate VMX is supported by the CPU. */
+        bool                        fSupported;
+
+        /** Host CR4 value (set by ring-0 VMX init) */
+        uint64_t                    hostCR4;
+
+        /** VMX MSR values */
+        struct
+        {
+            uint64_t                feature_ctrl;
+            uint64_t                vmx_basic_info;
+            uint64_t                vmx_pin_ctls;
+            uint64_t                vmx_proc_ctls;
+            uint64_t                vmx_exit;
+            uint64_t                vmx_entry;
+            uint64_t                vmx_misc;
+            uint64_t                vmx_cr0_fixed0;
+            uint64_t                vmx_cr0_fixed1;
+            uint64_t                vmx_cr4_fixed0;
+            uint64_t                vmx_cr4_fixed1;
+            uint64_t                vmx_vmcs_enum;
+        } msr;
+        /* Last instruction error */
+        uint32_t                    ulLastInstrError;
+    } vmx;
+    struct
+    {
+        /** Set by the ring-0 driver to indicate SVM is supported by the CPU. */
+        bool                        fSupported;
+
+        /** SVM revision. */
+        uint32_t                    u32Rev;
+
+        /** Maximum ASID allowed. */
+        uint32_t                    u32MaxASID;
+
+        /** SVM feature bits from cpuid 0x8000000a */
+        uint32_t                    u32Features;
+    } svm;
+    /** Saved error from detection */
+    int32_t         lLastError;
+
+    struct
+    {
+        uint32_t                    u32AMDFeatureECX;
+        uint32_t                    u32AMDFeatureEDX;
+    } cpuid;
+
+    HWACCMSTATE     enmHwAccmState;
+} HWACCMR0GLOBALS;
+
+typedef struct
+{
+    RTCPUID     idCpu;
+
+    RTR0MEMOBJ  pMemObj;
+    /* Current ASID (AMD-V only) */
+    uint32_t    uCurrentASID;
+
+    bool        fVMXConfigured;
+    bool        fSVMConfigured;
+} HWACCM_CPUINFO;
+typedef HWACCM_CPUINFO *PHWACCM_CPUINFO;
 
 #ifdef IN_RING0