Changeset 89499 in vbox for trunk/src/VBox

Timestamp:

Jun 4, 2021 9:36:58 AM (4 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

144856

Message:

Intel IOMMU: bugref:9967 Nits.

File:

• trunk/src/VBox/Devices/Bus/DevIommuIntel.cpp (modified) (10 diffs)

trunk/src/VBox/Devices/Bus/DevIommuIntel.cpp

@@ -354 +354 @@
     uint64_t                    fHawBaseMask;
     /** Maximum guest-address width (MGAW) invalid address mask. */
-    uint64_t                    fInvMgawMask;
+    uint64_t                    fMgawInvMask;
     /** Maximum supported paging level (3, 4 or 5). */
     uint8_t                     cMaxPagingLevel;
@@ -555 +555 @@
     uint8_t             cPagingLevel;
     uint8_t             afPadding[5];
-    /** The first-level page-table pointer (base).  */
+    /** The first-level page-table pointer.  */
     uint64_t            uFlptPtr;
-    /** The second-level page-table pointer (base).  */
+    /** The second-level page-table pointer.  */
     uint64_t            uSlptPtr;
 } DMARMEMREQAUX;
@@ -582 +582 @@
 typedef DMARMEMREQREMAP const *PCDMARMEMREQREMAP;
 
-typedef DECLCALLBACKTYPE(int, FNDMAADDRTRANSLATE,(PPDMDEVINS pDevIns, PCDMARMEMREQIN pMemReqIn, PCDMARMEMREQAUX pMemReqAux,
-                                                  PDMARIOPAGE pIoPageOut));
-typedef FNDMAADDRTRANSLATE *PFNDMAADDRTRANSLATE;
+typedef DECLCALLBACKTYPE(int, FNDMADDRLOOKUP,(PPDMDEVINS pDevIns, PCDMARMEMREQIN pMemReqIn, PCDMARMEMREQAUX pMemReqAux,
+                                              PDMARIOPAGE pIoPageOut));
+typedef FNDMADDRLOOKUP *PFNDMADDRLOOKUP;
 
 
@@ -2093 +2093 @@
  * Performs second level translation.
  *
+ * This is a DMA address lookup callback function which performs the translation
+ * (and access control) as part of the lookup.
+ *
  * @returns VBox status code.
  * @param   pDevIns     The IOMMU device instance.
@@ -2122 +2125 @@
 
     /* Second-level translations restricts input address to an implementation-specific MGAW. */
-    uint64_t const uDmaAddr = pMemReqIn->AddrRange.uAddr;
-    if (!(uDmaAddr & pThis->fInvMgawMask))
+    uint64_t const uAddrIn = pMemReqIn->AddrRange.uAddr;
+    if (!(uAddrIn & pThis->fMgawInvMask))
     { /* likely */ }
     else
@@ -2227 +2230 @@
          */
         {
-            uint16_t const idxPte         = (uDmaAddr >> cLevelShift) & UINT64_C(0x1ff);
+            uint16_t const idxPte         = (uAddrIn >> cLevelShift) & UINT64_C(0x1ff);
             uint64_t const offPte         = idxPte << 3;
             RTGCPHYS const GCPhysPtEntity = uPtEntity | offPte;
@@ -2280 +2283 @@
  * @returns VBox status code.
  * @param   pDevIns         The IOMMU device instance.
- * @param   pfnTranslate    The DMA address translation function.
+ * @param   pfnLookup       The DMA address lookup function.
  * @param   pMemReqRemap    The DMA memory request remapping info.
  */
-static int dmarDrMemRangeLookup(PPDMDEVINS pDevIns, PFNDMAADDRTRANSLATE pfnTranslate, PDMARMEMREQREMAP pMemReqRemap)
+static int dmarDrMemRangeLookup(PPDMDEVINS pDevIns, PFNDMADDRLOOKUP pfnLookup, PDMARMEMREQREMAP pMemReqRemap)
 {
     RTGCPHYS       GCPhysAddr  = NIL_RTGCPHYS;
@@ -2300 +2303 @@
         /* Update the input memory request with the next address in our range that needs translation. */
         MemReqIn.AddrRange.uAddr = uAddrInBase;
-        MemReqIn.AddrRange.cb    = cbRemaining;  /* Not currently accessed by pfnTranslate, but keep things consistent. */
+        MemReqIn.AddrRange.cb    = cbRemaining;  /* Not currently accessed by pfnLookup, but keep things consistent. */
 
         DMARIOPAGE IoPage;
-        rc = pfnTranslate(pDevIns, &MemReqIn, &pMemReqRemap->Aux, &IoPage);
+        rc = pfnLookup(pDevIns, &MemReqIn, &pMemReqRemap->Aux, &IoPage);
         if (RT_SUCCESS(rc))
         {
@@ -3717 +3720 @@
 
         pThis->fHawBaseMask    = ~(UINT64_MAX << cGstPhysAddrBits) & X86_PAGE_4K_BASE_MASK;
-        pThis->fInvMgawMask    = UINT64_MAX << cGstPhysAddrBits;
+        pThis->fMgawInvMask    = UINT64_MAX << cGstPhysAddrBits;
         pThis->cMaxPagingLevel = vtdCapRegGetMaxPagingLevel(fSagaw);
     }
@@ -3980 +3983 @@
      * Log some of the features exposed to software.
      */
-    uint32_t const uVerReg   = pThis->uVerReg;
-    uint8_t const  cMgawBits = RT_BF_GET(pThis->fCapReg, VTD_BF_CAP_REG_MGAW) + 1;
-    uint8_t const  fSagaw    = RT_BF_GET(pThis->fCapReg, VTD_BF_CAP_REG_SAGAW);
-    uint16_t const offFrcd   = RT_BF_GET(pThis->fCapReg, VTD_BF_CAP_REG_FRO);
-    uint16_t const offIva    = RT_BF_GET(pThis->fExtCapReg, VTD_BF_ECAP_REG_IRO);
-    LogRel(("%s: VER=%u.%u CAP=%#RX64 ECAP=%#RX64 (MGAW=%u bits, SAGAW=%#x HAW_Base=%#RX64 MGAW_Inv=%#RX64 FRO=%#x IRO=%#x cMaxPagingLevel=%u) mapped at %#RGp\n",
-            DMAR_LOG_PFX, RT_BF_GET(uVerReg, VTD_BF_VER_REG_MAX), RT_BF_GET(uVerReg, VTD_BF_VER_REG_MIN),
-            pThis->fCapReg, pThis->fExtCapReg, cMgawBits, fSagaw, pThis->fHawBaseMask, pThis->fInvMgawMask, offFrcd, offIva,
-            pThis->cMaxPagingLevel, DMAR_MMIO_BASE_PHYSADDR));
-
+    uint8_t const uVerMax   = RT_BF_GET(pThis->uVerReg, VTD_BF_VER_REG_MAX);
+    uint8_t const uVerMin   = RT_BF_GET(pThis->uVerReg, VTD_BF_VER_REG_MIN);
+    uint8_t const cMgawBits = RT_BF_GET(pThis->fCapReg, VTD_BF_CAP_REG_MGAW) + 1;
+    uint8_t const fSagaw    = RT_BF_GET(pThis->fCapReg, VTD_BF_CAP_REG_SAGAW);
+    uint16_t const offFrcd  = RT_BF_GET(pThis->fCapReg, VTD_BF_CAP_REG_FRO);
+    uint16_t const offIva   = RT_BF_GET(pThis->fExtCapReg, VTD_BF_ECAP_REG_IRO);
+    LogRel(("%s: Mapped at %#RGp (%u-level page-table supported)\n",
+            DMAR_LOG_PFX, DMAR_MMIO_BASE_PHYSADDR, pThis->cMaxPagingLevel));
+    LogRel(("%s: Version=%u.%u Cap=%#RX64 ExtCap=%#RX64 Mgaw=%u bits Sagaw=%#x HawBaseMask=%#RX64 MgawInvMask=%#RX64 FRO=%#x IRO=%#x\n",
+            DMAR_LOG_PFX, uVerMax, uVerMin, pThis->fCapReg, pThis->fExtCapReg, cMgawBits, fSagaw, pThis->fHawBaseMask,
+            pThis->fMgawInvMask, offFrcd, offIva));
     return VINF_SUCCESS;
 }