Changeset 89620 in vbox for trunk/src/VBox/VMM/VMMR0

Timestamp:

Jun 11, 2021 8:51:10 AM (4 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

145064

Message:

Intel IOMMU: bugref:9967 Allow PDMIoApicSetEoi operation to be queued to ring-3 if I/O APIC isn't available in R0.
This key change is taking the PDM lock such that it doesn't fail (VINF_SUCCESS instead of VINF_IOM_R3_MMIO_WRITE for rcBusy, which wouldn't have worked anyway when called via APICHvSetEoi for instance).
Also cleaned up the prototype of PDMIoApicSendMsi a bit (use PVMCC instead of PPDMDEVINS).

File:

• trunk/src/VBox/VMM/VMMR0/PDMR0DevHlp.cpp (modified) (2 diffs)

trunk/src/VBox/VMM/VMMR0/PDMR0DevHlp.cpp

@@ -1633 +1633 @@
     Log4(("pdmR0PciHlp_IoApicSendMsi: uBusDevFn=%#x Msi=(Addr:%#RX64 Data:%#RX32) uTagSrc=%#x\n", uBusDevFn, pMsi->Addr.u64,
           pMsi->Data.u32, uTagSrc));
-    PDMIoApicSendMsi(pDevIns, uBusDevFn, pMsi, uTagSrc);
+    PDMIoApicSendMsi(pDevIns->Internal.s.pGVM, uBusDevFn, pMsi, uTagSrc);
 }
 
@@ -1715 +1715 @@
 {
     PDMDEV_ASSERT_DEVINS(pDevIns);
-    PDMIoApicSendMsi(pDevIns, NIL_PCIBDF, pMsi, uTagSrc);
+    PDMIoApicSendMsi(pDevIns->Internal.s.pGVM, NIL_PCIBDF, pMsi, uTagSrc);
 }