- Timestamp:
- Jun 24, 2021 5:41:47 PM (4 years ago)
- svn:sync-xref-src-repo-rev:
- 145351
- Location:
- trunk/src/VBox/Devices/Audio
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/Devices/Audio/DevHda.cpp
r89887 r89893 314 314 * Global Variables * 315 315 *********************************************************************************************************************************/ 316 317 /** Turn a short global register name into an memory index and a stringized name. */ 318 #define HDA_REG_IDX(abbrev) HDA_MEM_IND_NAME(abbrev), #abbrev 319 320 /** Turns a short stream register name into an memory index and a stringized name. */ 321 #define HDA_REG_IDX_STRM(reg, suff) HDA_MEM_IND_NAME(reg ## suff), #reg #suff 322 323 /** Same as above for a register *not* stored in memory. */ 324 #define HDA_REG_IDX_NOMEM(abbrev) 0, #abbrev 316 325 317 326 /** No register description (RD) flags defined. */ -
trunk/src/VBox/Devices/Audio/DevHda.h
r89888 r89893 151 151 #define HDA_REG_DESC_SD0_BASE 0x80 152 152 153 /** Turn a short global register name into an memory index and a stringized name. */154 #define HDA_REG_IDX(abbrev) HDA_MEM_IND_NAME(abbrev), #abbrev155 156 /** Turns a short stream register name into an memory index and a stringized name. */157 #define HDA_REG_IDX_STRM(reg, suff) HDA_MEM_IND_NAME(reg ## suff), #reg #suff158 159 /** Same as above for a register *not* stored in memory. */160 #define HDA_REG_IDX_NOMEM(abbrev) 0, #abbrev161 162 153 /* 163 154 * NB: Register values stored in memory (au32Regs[]) are indexed through … … 543 534 | ( (_aChan) & HDA_SDFMT_CHANNELS_MASK)) 544 535 545 /** Interrupt on completion (IOC) flag. */ 546 #define HDA_BDLE_F_IOC RT_BIT(0) 547 548 549 /** 550 * BDL description structure. 551 * Do not touch this, as this must match to the HDA specs. 536 537 /** 538 * Buffer descriptor list entry (BDLE). 539 * 540 * See 3.6.3 in HDA specs rev 1.0a (2010-06-17). 552 541 */ 553 542 typedef struct HDABDLEDESC … … 557 546 /** Size of the actual buffer (in bytes). */ 558 547 uint32_t u32BufSize; 559 /** Bit 0: Interrupt on completion; the controller will generate 560 * an interrupt when the last byte of the buffer has been 561 * fetched by the DMA engine. 548 /** HDA_BDLE_F_XXX. 562 549 * 563 * Rest is reserved for further use and must be 0. */ 550 * Bit 0: IOC - Interrupt on completion / HDA_BDLE_F_IOC. 551 * The controller will generate an interrupt when the last byte of the buffer 552 * has been fetched by the DMA engine. 553 * 554 * Bits 31:1 are reserved for further use and must be 0. */ 564 555 uint32_t fFlags; 565 556 } HDABDLEDESC, *PHDABDLEDESC; 566 557 AssertCompileSize(HDABDLEDESC, 16); /* Always 16 byte. Also must be aligned on 128-byte boundary. */ 567 558 559 /** Interrupt on completion (IOC) flag. */ 560 #define HDA_BDLE_F_IOC RT_BIT(0) 568 561 569 562
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