Changeset 91343 in vbox

Timestamp:

Sep 23, 2021 8:01:24 AM (3 years ago)

Author:

vboxsync

Message:

VMM/HM: Add tertiary processor-based VM-execution controls to VMCSINFO and some minor cleanups.

Location:

trunk/src/VBox/VMM

Files:

• VMMR0/HMVMXR0.cpp (modified) (6 diffs)
• VMMR3/HM.cpp (modified) (2 diffs)
• include/HMInternal.h (modified) (1 diff)
• include/HMInternal.mac (modified) (1 diff)

trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp

@@ -2661 +2661 @@
     AssertRC(rc);
     AssertMsgReturnStmt(pVmcsInfo->u32EntryCtls == u32Val,
-                        ("%s controls mismatch: Cache=%#RX32 VMCS=%#RX32\n", pcszVmcs, pVmcsInfo->u32EntryCtls, u32Val),
+                        ("%s entry controls mismatch: Cache=%#RX32 VMCS=%#RX32\n", pcszVmcs, pVmcsInfo->u32EntryCtls, u32Val),
                         pVCpu->hm.s.u32HMError = VMX_VCI_CTRL_ENTRY,
                         VERR_VMX_VMCS_FIELD_CACHE_INVALID);
@@ -2668 +2668 @@
     AssertRC(rc);
     AssertMsgReturnStmt(pVmcsInfo->u32ExitCtls == u32Val,
-                        ("%s controls mismatch: Cache=%#RX32 VMCS=%#RX32\n", pcszVmcs, pVmcsInfo->u32ExitCtls, u32Val),
+                        ("%s exit controls mismatch: Cache=%#RX32 VMCS=%#RX32\n", pcszVmcs, pVmcsInfo->u32ExitCtls, u32Val),
                         pVCpu->hm.s.u32HMError = VMX_VCI_CTRL_EXIT,
                         VERR_VMX_VMCS_FIELD_CACHE_INVALID);
@@ -2675 +2675 @@
     AssertRC(rc);
     AssertMsgReturnStmt(pVmcsInfo->u32PinCtls == u32Val,
-                        ("%s controls mismatch: Cache=%#RX32 VMCS=%#RX32\n", pcszVmcs, pVmcsInfo->u32PinCtls, u32Val),
+                        ("%s pin controls mismatch: Cache=%#RX32 VMCS=%#RX32\n", pcszVmcs, pVmcsInfo->u32PinCtls, u32Val),
                         pVCpu->hm.s.u32HMError = VMX_VCI_CTRL_PIN_EXEC,
                         VERR_VMX_VMCS_FIELD_CACHE_INVALID);
@@ -2682 +2682 @@
     AssertRC(rc);
     AssertMsgReturnStmt(pVmcsInfo->u32ProcCtls == u32Val,
-                        ("%s controls mismatch: Cache=%#RX32 VMCS=%#RX32\n", pcszVmcs, pVmcsInfo->u32ProcCtls, u32Val),
+                        ("%s proc controls mismatch: Cache=%#RX32 VMCS=%#RX32\n", pcszVmcs, pVmcsInfo->u32ProcCtls, u32Val),
                         pVCpu->hm.s.u32HMError = VMX_VCI_CTRL_PROC_EXEC,
                         VERR_VMX_VMCS_FIELD_CACHE_INVALID);
@@ -2691 +2691 @@
         AssertRC(rc);
         AssertMsgReturnStmt(pVmcsInfo->u32ProcCtls2 == u32Val,
-                            ("%s controls mismatch: Cache=%#RX32 VMCS=%#RX32\n", pcszVmcs, pVmcsInfo->u32ProcCtls2, u32Val),
+                            ("%s proc2 controls mismatch: Cache=%#RX32 VMCS=%#RX32\n", pcszVmcs, pVmcsInfo->u32ProcCtls2, u32Val),
                             pVCpu->hm.s.u32HMError = VMX_VCI_CTRL_PROC_EXEC2,
+                            VERR_VMX_VMCS_FIELD_CACHE_INVALID);
+    }
+
+    uint64_t u64Val;
+    if (pVmcsInfo->u32ProcCtls & VMX_PROC_CTLS_USE_TERTIARY_CTLS)
+    {
+        rc = VMXReadVmcs64(VMX_VMCS64_CTRL_PROC_EXEC3_FULL, &u64Val);
+        AssertRC(rc);
+        AssertMsgReturnStmt(pVmcsInfo->u64ProcCtls3 == u64Val,
+                            ("%s proc3 controls mismatch: Cache=%#RX32 VMCS=%#RX64\n", pcszVmcs, pVmcsInfo->u64ProcCtls3, u64Val),
+                            pVCpu->hm.s.u32HMError = VMX_VCI_CTRL_PROC_EXEC3,
                             VERR_VMX_VMCS_FIELD_CACHE_INVALID);
     }
@@ -2703 +2714 @@
                         VERR_VMX_VMCS_FIELD_CACHE_INVALID);
 
-    uint64_t u64Val;
     rc = VMXReadVmcs64(VMX_VMCS64_CTRL_TSC_OFFSET_FULL, &u64Val);
     AssertRC(rc);

trunk/src/VBox/VMM/VMMR3/HM.cpp

@@ -501 +501 @@
      * Workaround for mesa vmsvga 3d driver making incorrect assumptions about
      * the hypervisor it is running under. */
-    bool f;
-    rc = CFGMR3QueryBoolDef(pCfgHm, "LovelyMesaDrvWorkaround", &f, false);
+    bool fMesaWorkaround;
+    rc = CFGMR3QueryBoolDef(pCfgHm, "LovelyMesaDrvWorkaround", &fMesaWorkaround, false);
     AssertLogRelRCReturn(rc, rc);
     for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
     {
         PVMCPU pVCpu = pVM->apCpusR3[idCpu];
-        pVCpu->hm.s.fTrapXcptGpForLovelyMesaDrv = f;
+        pVCpu->hm.s.fTrapXcptGpForLovelyMesaDrv = fMesaWorkaround;
     }
 
@@ -591 +591 @@
             {
                 case VERR_UNSUPPORTED_CPU:          pszMsg = "Unknown CPU, VT-x or AMD-v features cannot be ascertained"; break;
-                case VERR_VMX_NO_VMX:               pszMsg = "VT-x is not available"; break;
-                case VERR_VMX_MSR_VMX_DISABLED:     pszMsg = "VT-x is disabled in the BIOS"; break;
-                case VERR_VMX_MSR_ALL_VMX_DISABLED: pszMsg = "VT-x is disabled in the BIOS for all CPU modes"; break;
-                case VERR_VMX_MSR_LOCKING_FAILED:   pszMsg = "Failed to enable and lock VT-x features"; break;
-                case VERR_SVM_NO_SVM:               pszMsg = "AMD-V is not available"; break;
-                case VERR_SVM_DISABLED:             pszMsg = "AMD-V is disabled in the BIOS (or by the host OS)"; break;
+                case VERR_VMX_NO_VMX:               pszMsg = "VT-x is not available";                                     break;
+                case VERR_VMX_MSR_VMX_DISABLED:     pszMsg = "VT-x is disabled in the BIOS";                              break;
+                case VERR_VMX_MSR_ALL_VMX_DISABLED: pszMsg = "VT-x is disabled in the BIOS for all CPU modes";            break;
+                case VERR_VMX_MSR_LOCKING_FAILED:   pszMsg = "Failed to enable and lock VT-x features";                   break;
+                case VERR_SVM_NO_SVM:               pszMsg = "AMD-V is not available";                                    break;
+                case VERR_SVM_DISABLED:             pszMsg = "AMD-V is disabled in the BIOS (or by the host OS)";         break;
                 default:
                     return VMSetError(pVM, rc, RT_SRC_POS, "SUPR3QueryVTCaps failed with %Rrc", rc);

trunk/src/VBox/VMM/include/HMInternal.h

@@ -909 +909 @@
     /** Secondary processor-based VM-execution controls. */
     uint32_t                    u32ProcCtls2;
+    /** Tertiary processor-based VM-execution controls. */
+    uint64_t                    u64ProcCtls3;
     /** VM-entry controls. */
     uint32_t                    u32EntryCtls;

trunk/src/VBox/VMM/include/HMInternal.mac

@@ -54 +54 @@
     .u32ProcCtls                    resd    1
     .u32ProcCtls2                   resd    1
+    .u64ProcCtls3                   resq    1
     .u32EntryCtls                   resd    1
     .u32ExitCtls                    resd    1