- Timestamp:
- Oct 22, 2021 3:22:15 AM (3 years ago)
- File:
-
- 1 edited
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trunk/src/VBox/VMM/VMMAll/IEMAllCImplVmxInstr.cpp.h
r91974 r91987 1493 1493 * we zero them for consistency. 1494 1494 */ 1495 if ( (pVmcs->u32ProcCtls2 & VMX_PROC_CTLS2_EPT) 1496 && !(pVmcs->u32EntryCtls & VMX_ENTRY_CTLS_IA32E_MODE_GUEST) 1497 && (pVCpu->cpum.GstCtx.cr4 & X86_CR4_PAE) 1498 && (pVCpu->cpum.GstCtx.cr0 & X86_CR0_PG)) 1499 { 1500 pVmcs->u64GuestPdpte0.u = pVCpu->cpum.GstCtx.aPaePdpes[0].u; 1501 pVmcs->u64GuestPdpte1.u = pVCpu->cpum.GstCtx.aPaePdpes[1].u; 1502 pVmcs->u64GuestPdpte2.u = pVCpu->cpum.GstCtx.aPaePdpes[2].u; 1503 pVmcs->u64GuestPdpte3.u = pVCpu->cpum.GstCtx.aPaePdpes[3].u; 1495 if (pVmcs->u32ProcCtls2 & VMX_PROC_CTLS2_EPT) 1496 { 1497 if ( !(pVmcs->u32EntryCtls & VMX_ENTRY_CTLS_IA32E_MODE_GUEST) 1498 && (pVCpu->cpum.GstCtx.cr4 & X86_CR4_PAE) 1499 && (pVCpu->cpum.GstCtx.cr0 & X86_CR0_PG)) 1500 { 1501 pVmcs->u64GuestPdpte0.u = pVCpu->cpum.GstCtx.aPaePdpes[0].u; 1502 pVmcs->u64GuestPdpte1.u = pVCpu->cpum.GstCtx.aPaePdpes[1].u; 1503 pVmcs->u64GuestPdpte2.u = pVCpu->cpum.GstCtx.aPaePdpes[2].u; 1504 pVmcs->u64GuestPdpte3.u = pVCpu->cpum.GstCtx.aPaePdpes[3].u; 1505 } 1506 else 1507 { 1508 pVmcs->u64GuestPdpte0.u = 0; 1509 pVmcs->u64GuestPdpte1.u = 0; 1510 pVmcs->u64GuestPdpte2.u = 0; 1511 pVmcs->u64GuestPdpte3.u = 0; 1512 } 1513 1514 /* Clear PGM's copy of the EPT pointer for added safety. */ 1515 PGMSetGuestEptPtr(pVCpu, 0 /* uEptPtr */); 1504 1516 } 1505 1517 else … … 6153 6165 6154 6166 #ifdef VBOX_WITH_NESTED_HWVIRT_VMX_EPT 6155 /* Extended Page TablesPointer (EPTP). */6167 /* Extended-Page-Table Pointer (EPTP). */ 6156 6168 if (pVmcs->u32ProcCtls2 & VMX_PROC_CTLS2_EPT) 6157 6169 { 6158 6170 VMXVDIAG enmVmxDiag; 6159 rc = iemVmxVmentryCheckEptPtr(pVCpu, &enmVmxDiag);6171 int const rc = iemVmxVmentryCheckEptPtr(pVCpu, &enmVmxDiag); 6160 6172 if (RT_SUCCESS(rc)) 6161 6173 { /* likely */ } … … 6661 6673 /* SMI blocking is irrelevant. We don't support SMIs yet. */ 6662 6674 6663 /* Loading PDPTEs will be taken care when we switch modes. We don't support EPT yet. */ 6664 Assert(!(pVmcs->u32ProcCtls2 & VMX_PROC_CTLS2_EPT)); 6675 /* 6676 * Load the PAE PDPTEs from the VMCS when using EPT with PAE paging. 6677 */ 6678 if (pVmcs->u32ProcCtls2 & VMX_PROC_CTLS2_EPT) 6679 { 6680 if ( !(pVmcs->u32EntryCtls & VMX_ENTRY_CTLS_IA32E_MODE_GUEST) 6681 && (pVCpu->cpum.GstCtx.cr4 & X86_CR4_PAE) 6682 && (pVCpu->cpum.GstCtx.cr0 & X86_CR0_PG)) 6683 { 6684 X86PDPE aPaePdptes[X86_PG_PAE_PDPE_ENTRIES]; 6685 aPaePdptes[0].u = pVmcs->u64GuestPdpte0.u; 6686 aPaePdptes[1].u = pVmcs->u64GuestPdpte1.u; 6687 aPaePdptes[2].u = pVmcs->u64GuestPdpte2.u; 6688 aPaePdptes[3].u = pVmcs->u64GuestPdpte3.u; 6689 AssertCompile(RT_ELEMENTS(aPaePdptes) == RT_ELEMENTS(pVCpu->cpum.GstCtx.aPaePdpes)); 6690 for (unsigned i = 0; i < RT_ELEMENTS(pVCpu->cpum.GstCtx.aPaePdpes); i++) 6691 pVCpu->cpum.GstCtx.aPaePdpes[i].u = aPaePdptes[i].u; 6692 } 6693 6694 /* 6695 * Set PGM's copy of the EPT pointer. 6696 * The EPTP has already been validated while checking guest state. 6697 */ 6698 PGMSetGuestEptPtr(pVCpu, pVmcs->u64EptPtr.u); 6699 } 6665 6700 6666 6701 /* VPID is irrelevant. We don't support VPID yet. */
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