VirtualBox

Changeset 93338 in vbox for trunk/src/VBox


Ignore:
Timestamp:
Jan 19, 2022 5:46:52 AM (3 years ago)
Author:
vboxsync
Message:

VMM/IEM: Nested VMX: bugref:10092 Fixed CR0-fixed bits validation when unrestricted-guest mode is available/used.

Location:
trunk/src/VBox/VMM/VMMAll
Files:
2 edited

Legend:

Unmodified
Added
Removed
  • trunk/src/VBox/VMM/VMMAll/IEMAllCImpl.cpp.h

    r93115 r93338  
    58285828            if (IEM_VMX_IS_ROOT_MODE(pVCpu))
    58295829            {
    5830                 uint64_t const uCr0Fixed0 = pVCpu->cpum.GstCtx.hwvirt.vmx.Msrs.u64Cr0Fixed0;
     5830                uint64_t const uCr0Fixed0 = IEM_VMX_IS_NON_ROOT_MODE(pVCpu) ? iemVmxGetCr0Fixed0(pVCpu) : VMX_V_CR0_FIXED0;
    58315831                if ((uNewCrX & uCr0Fixed0) != uCr0Fixed0)
    58325832                {
  • trunk/src/VBox/VMM/VMMAll/IEMAllCImplVmxInstr.cpp.h

    r93291 r93338  
    461461
    462462/**
     463 * Gets CR0 fixed-0 bits in VMX non-root mode.
     464 *
     465 * We do this rather than fetching what we report to the guest (in
     466 * IA32_VMX_CR0_FIXED0 MSR) because real hardware (and so do we) report the same
     467 * values regardless of whether unrestricted-guest feature is available on the CPU.
     468 *
     469 * @returns CR0 fixed-0 bits.
     470 * @param   pVCpu   The cross context virtual CPU structure.
     471 */
     472DECLINLINE(uint64_t) iemVmxGetCr0Fixed0(PCVMCPUCC pVCpu)
     473{
     474    Assert(IEM_VMX_IS_ROOT_MODE(pVCpu));
     475    Assert(IEM_VMX_HAS_CURRENT_VMCS(pVCpu));
     476
     477    static uint64_t const s_auCr0Fixed0[2] = { VMX_V_CR0_FIXED0, VMX_V_CR0_FIXED0_UX };
     478    PCVMXVVMCS const pVmcs              = &pVCpu->cpum.GstCtx.hwvirt.vmx.Vmcs;
     479    uint8_t    const fUnrestrictedGuest = !!(pVmcs->u32ProcCtls2 & VMX_PROC_CTLS2_UNRESTRICTED_GUEST);
     480    uint64_t   const uCr0Fixed0         = s_auCr0Fixed0[fUnrestrictedGuest];
     481    Assert(!(uCr0Fixed0 & (X86_CR0_NW | X86_CR0_CD)));
     482    return uCr0Fixed0;
     483}
     484
     485
     486/**
    463487 * Gets a host selector from the VMCS.
    464488 *
     
    864888DECL_FORCE_INLINE(bool) iemVmxIsAutoMsrCountValid(PCVMCPU pVCpu, uint32_t uMsrCount)
    865889{
    866     uint64_t const u64VmxMiscMsr      = pVCpu->cpum.GstCtx.hwvirt.vmx.Msrs.u64Misc;
    867     uint32_t const cMaxSupportedMsrs  = VMX_MISC_MAX_MSRS(u64VmxMiscMsr);
     890    uint64_t const u64VmxMiscMsr     = pVCpu->cpum.GstCtx.hwvirt.vmx.Msrs.u64Misc;
     891    uint32_t const cMaxSupportedMsrs = VMX_MISC_MAX_MSRS(u64VmxMiscMsr);
    868892    Assert(cMaxSupportedMsrs <= VMX_V_AUTOMSR_AREA_SIZE / sizeof(VMXAUTOMSR));
    869893    if (uMsrCount <= cMaxSupportedMsrs)
     
    17081732    {
    17091733        /* Bits 63:32, 28:19, 17, 15:6, ET, CD, NW and CR0 fixed bits are not modified. */
    1710         uint64_t const uCr0Mb1       = pVCpu->cpum.GstCtx.hwvirt.vmx.Msrs.u64Cr0Fixed0;
    1711         uint64_t const uCr0Mb0       = pVCpu->cpum.GstCtx.hwvirt.vmx.Msrs.u64Cr0Fixed1;
     1734        uint64_t const uCr0Mb1       = iemVmxGetCr0Fixed0(pVCpu);
     1735        uint64_t const uCr0Mb0       = VMX_V_CR0_FIXED1;
    17121736        uint64_t const fCr0IgnMask   = VMX_EXIT_HOST_CR0_IGNORE_MASK | uCr0Mb1 | ~uCr0Mb0;
    17131737        uint64_t const uHostCr0      = pVmcs->u64HostCr0.u;
     
    25972621        Log3(("vmexit: Loading host-state failed. uExitReason=%u rc=%Rrc\n", uExitReason, VBOXSTRICTRC_VAL(rcStrict)));
    25982622
    2599     /* Notify HM that the current VMCS fields have been modified. */
    2600     HMNotifyVmxNstGstCurrentVmcsChanged(pVCpu);
    2601 
    2602     /* Notify HM that we've completed the VM-exit. */
    2603     HMNotifyVmxNstGstVmexit(pVCpu);
     2623    if (VM_IS_HM_ENABLED(pVCpu->CTX_SUFF(pVM)))
     2624    {
     2625        /* Notify HM that the current VMCS fields have been modified. */
     2626        HMNotifyVmxNstGstCurrentVmcsChanged(pVCpu);
     2627
     2628        /* Notify HM that we've completed the VM-exit. */
     2629        HMNotifyVmxNstGstVmexit(pVCpu);
     2630    }
    26042631
    26052632#  if defined(VBOX_WITH_NESTED_HWVIRT_ONLY_IN_IEM) && defined(IN_RING3)
     
    47934820    {
    47944821        /* CR0 MB1 bits. */
    4795         uint64_t u64Cr0Fixed0 = pVCpu->cpum.GstCtx.hwvirt.vmx.Msrs.u64Cr0Fixed0;
    4796         Assert(!(u64Cr0Fixed0 & (X86_CR0_NW | X86_CR0_CD)));
    4797         if (fUnrestrictedGuest)
    4798             u64Cr0Fixed0 &= ~(X86_CR0_PE | X86_CR0_PG);
     4822        uint64_t const u64Cr0Fixed0 = iemVmxGetCr0Fixed0(pVCpu);
    47994823        if ((pVmcs->u64GuestCr0.u & u64Cr0Fixed0) == u64Cr0Fixed0)
    48004824        { /* likely */ }
     
    57415765    {
    57425766        /* CR0 MB1 bits. */
    5743         uint64_t const u64Cr0Fixed0 = pVCpu->cpum.GstCtx.hwvirt.vmx.Msrs.u64Cr0Fixed0;
     5767        uint64_t const u64Cr0Fixed0 = iemVmxGetCr0Fixed0(pVCpu);
    57445768        if ((pVmcs->u64HostCr0.u & u64Cr0Fixed0) == u64Cr0Fixed0)
    57455769        { /* likely */ }
     
    62046228        }
    62056229#else
    6206         Assert(!(pVmcs->u32ProcCtls2 & VMX_PROC_CTLS2_EPT));                /* Support for EPT is conditional. */
    6207         Assert(!(pVmcs->u32ProcCtls2 & VMX_PROC_CTLS2_UNRESTRICTED_GUEST)); /* Support for Unrestricted-guests is conditional. */
     6230        Assert(!(pVmcs->u32ProcCtls2 & VMX_PROC_CTLS2_EPT));
     6231        Assert(!(pVmcs->u32ProcCtls2 & VMX_PROC_CTLS2_UNRESTRICTED_GUEST));
    62086232#endif
    6209 
    62106233        Assert(!(pVmcs->u32PinCtls & VMX_PIN_CTLS_POSTED_INT));             /* We don't support posted interrupts yet. */
    62116234        Assert(!(pVmcs->u32ProcCtls2 & VMX_PROC_CTLS2_PML));                /* We don't support PML yet. */
     
    80418064    iemVmxVmwriteNoCheck(pVmcs, u64Val, u64VmcsField);
    80428065
    8043     /* Notify HM that the VMCS content might have changed. */
    8044     if (!fInVmxNonRootMode)
     8066    if (   VM_IS_HM_ENABLED(pVCpu->CTX_SUFF(pVM))
     8067        && !fInVmxNonRootMode)
     8068    {
     8069        /* Notify HM that the VMCS content might have changed. */
    80458070        HMNotifyVmxNstGstCurrentVmcsChanged(pVCpu);
     8071    }
    80468072
    80478073    iemVmxVmSucceed(pVCpu);
     
    83978423        {
    83988424            /* Notify HM that a new, current VMCS is loaded. */
    8399             HMNotifyVmxNstGstCurrentVmcsChanged(pVCpu);
     8425            if (VM_IS_HM_ENABLED(pVCpu->CTX_SUFF(pVM)))
     8426                HMNotifyVmxNstGstCurrentVmcsChanged(pVCpu);
    84008427        }
    84018428        else
     
    87708797        /* CR0. */
    87718798        {
    8772             /* CR0 MB1 bits. */
    8773             uint64_t const uCr0Fixed0 = pVCpu->cpum.GstCtx.hwvirt.vmx.Msrs.u64Cr0Fixed0;
     8799            /*
     8800             * CR0 MB1 bits.
     8801             *
     8802             * We use VMX_V_CR0_FIXED0 below to ensure CR0.PE and CR0.PG are always set
     8803             * while executing VMXON. CR0.PE and CR0.PG are only allowed to be clear
     8804             * when the guest running in VMX non-root mode with unrestricted-guest control
     8805             * enabled in the VMCS.
     8806             */
     8807            uint64_t const uCr0Fixed0 = VMX_V_CR0_FIXED0;
    87748808            if ((pVCpu->cpum.GstCtx.cr0 & uCr0Fixed0) == uCr0Fixed0)
    87758809            { /* likely */ }
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