Changeset 93635 in vbox for trunk/src/VBox
- Timestamp:
- Feb 7, 2022 10:43:45 AM (3 years ago)
- Location:
- trunk/src/VBox
- Files:
-
- 23 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/Devices/Graphics/DevVGA-SVGA-cmd.cpp
r93115 r93635 358 358 * @param enmAccessType The access type. 359 359 * @param enmOrigin Who is making the access. 360 * @param pvUser User argument. 360 * @param pvUser User argument - VMM sets this to the address of the 361 * device instance. 361 362 */ 362 363 DECLCALLBACK(VBOXSTRICTRC) 363 364 vmsvgaR3GboAccessHandler(PVM pVM, PVMCPU pVCpu, RTGCPHYS GCPhys, void *pvPhys, void *pvBuf, size_t cbBuf, 364 PGMACCESSTYPE enmAccessType, PGMACCESSORIGIN enmOrigin, void *pvUser)365 PGMACCESSTYPE enmAccessType, PGMACCESSORIGIN enmOrigin, uint64_t uUser) 365 366 { 366 367 RT_NOREF(pVM, pVCpu, pvPhys, enmAccessType); … … 369 370 return VINF_PGM_HANDLER_DO_DEFAULT; 370 371 371 PPDMDEVINS pDevIns = (PPDMDEVINS)pvUser; 372 PVGASTATE pThis = PDMDEVINS_2_DATA(pDevIns, PVGASTATE); 373 PVGASTATECC pThisCC = PDMDEVINS_2_DATA_CC(pDevIns, PVGASTATECC); 374 PVMSVGAR3STATE pSvgaR3State = pThisCC->svga.pSvgaR3State; 372 PPDMDEVINS pDevIns = (PPDMDEVINS)uUser; 373 AssertPtrReturn(pDevIns, VERR_INTERNAL_ERROR_4); 374 AssertReturn(pDevIns->u32Version == PDM_DEVINSR3_VERSION, VERR_INTERNAL_ERROR_5); 375 PVGASTATE pThis = PDMDEVINS_2_DATA(pDevIns, PVGASTATE); 376 PVGASTATECC pThisCC = PDMDEVINS_2_DATA_CC(pDevIns, PVGASTATECC); 377 PVMSVGAR3STATE pSvgaR3State = pThisCC->svga.pSvgaR3State; 375 378 376 379 /* … … 415 418 } 416 419 417 418 420 #ifdef VBOX_WITH_VMSVGA3D 421 419 422 static int vmsvgaR3GboCreate(PVMSVGAR3STATE pSvgaR3State, SVGAMobFormat ptDepth, PPN64 baseAddress, uint32_t sizeInBytes, bool fGCPhys64, bool fWriteProtected, PVMSVGAGBO pGbo) 420 423 { … … 592 595 for (uint32_t i = 0; i < pGbo->cDescriptors; ++i) 593 596 { 594 rc = PDMDevHlpPGMHandlerPhysicalRegister(pSvgaR3State->pDevIns, 595 pGbo->paDescriptors[i].GCPhys , pGbo->paDescriptors[i].GCPhys+ pGbo->paDescriptors[i].cPages * PAGE_SIZE - 1,596 pSvgaR3State->hGboAccessHandlerType, pSvgaR3State->pDevIns, NIL_RTR0PTR, NIL_RTRCPTR,"VMSVGA GBO");597 rc = PDMDevHlpPGMHandlerPhysicalRegister(pSvgaR3State->pDevIns, pGbo->paDescriptors[i].GCPhys, 598 pGbo->paDescriptors[i].GCPhys + pGbo->paDescriptors[i].cPages * PAGE_SIZE - 1, 599 pSvgaR3State->hGboAccessHandlerType, "VMSVGA GBO"); 597 600 AssertRC(rc); 598 601 } … … 1035 1038 return rc; 1036 1039 } 1040 1037 1041 #endif /* VBOX_WITH_VMSVGA3D */ 1038 1039 1042 1040 1043 /* -
trunk/src/VBox/Devices/Graphics/DevVGA-SVGA-internal.h
r93115 r93635 248 248 249 249 DECLCALLBACK(VBOXSTRICTRC) vmsvgaR3GboAccessHandler(PVM pVM, PVMCPU pVCpu, RTGCPHYS GCPhys, void *pvPhys, void *pvBuf, size_t cbBuf, 250 PGMACCESSTYPE enmAccessType, PGMACCESSORIGIN enmOrigin, void *pvUser);250 PGMACCESSTYPE enmAccessType, PGMACCESSORIGIN enmOrigin, uint64_t uUser); 251 251 252 252 void vmsvgaR3ResetScreens(PVGASTATE pThis, PVGASTATECC pThisCC); -
trunk/src/VBox/VMM/VMMAll/IEMAll.cpp
r93554 r93635 16367 16367 * @callback_method_impl{FNPGMPHYSHANDLER, VMX APIC-access page accesses} 16368 16368 * 16369 * @remarks The @a pvUser argument is currently unused.16369 * @remarks The @a uUser argument is currently unused. 16370 16370 */ 16371 16371 PGM_ALL_CB2_DECL(VBOXSTRICTRC) iemVmxApicAccessPageHandler(PVMCC pVM, PVMCPUCC pVCpu, RTGCPHYS GCPhysFault, void *pvPhys, 16372 16372 void *pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, 16373 PGMACCESSORIGIN enmOrigin, void *pvUser)16374 { 16375 RT_NOREF3(pvPhys, enmOrigin, pvUser);16373 PGMACCESSORIGIN enmOrigin, uint64_t uUser) 16374 { 16375 RT_NOREF3(pvPhys, enmOrigin, uUser); 16376 16376 16377 16377 RTGCPHYS const GCPhysAccessBase = GCPhysFault & ~(RTGCPHYS)GUEST_PAGE_OFFSET_MASK; -
trunk/src/VBox/VMM/VMMAll/IEMAllCImplVmxInstr.cpp.h
r93554 r93635 6854 6854 PVMCPUCC pVCpu0 = VMCC_GET_CPU_0(pVM); 6855 6855 int rc = PGMHandlerPhysicalRegister(pVM, GCPhysApicAccess, GCPhysApicAccess + X86_PAGE_4K_SIZE - 1, 6856 pVCpu0->iem.s.hVmxApicAccessPage, NIL_RTR3PTR /* pvUserR3 */, 6857 NIL_RTR0PTR /* pvUserR0 */, NIL_RTRCPTR /* pvUserRC */, NULL /* pszDesc */); 6856 pVCpu0->iem.s.hVmxApicAccessPage, 0 /*uUser*/, NULL /*pszDesc*/); 6858 6857 if (RT_SUCCESS(rc)) 6859 6858 { /* likely */ } -
trunk/src/VBox/VMM/VMMAll/IOMAllMmioNew.cpp
r93554 r93635 726 726 * \#PF access handler callback for MMIO pages.} 727 727 * 728 * @remarks The @a pvUser argument is the MMIO handle.728 * @remarks The @a uUser argument is the MMIO handle. 729 729 */ 730 730 DECLEXPORT(VBOXSTRICTRC) iomMmioPfHandlerNew(PVMCC pVM, PVMCPUCC pVCpu, RTGCUINT uErrorCode, PCPUMCTXCORE pCtxCore, 731 RTGCPTR pvFault, RTGCPHYS GCPhysFault, void *pvUser)731 RTGCPTR pvFault, RTGCPHYS GCPhysFault, uint64_t uUser) 732 732 { 733 733 STAM_PROFILE_START(&pVM->iom.s.StatMmioPfHandler, Prf); … … 737 737 738 738 /* Translate the MMIO handle to a registration entry for the current context. */ 739 AssertReturn( (uintptr_t)pvUser < RT_MIN(pVM->iom.s.cMmioRegs, pVM->iom.s.cMmioAlloc), VERR_IOM_INVALID_MMIO_HANDLE);739 AssertReturn(uUser < RT_MIN(pVM->iom.s.cMmioRegs, pVM->iom.s.cMmioAlloc), VERR_IOM_INVALID_MMIO_HANDLE); 740 740 # ifdef IN_RING0 741 AssertReturn( (uintptr_t)pvUser < pVM->iomr0.s.cMmioAlloc, VERR_IOM_INVALID_MMIO_HANDLE);742 CTX_SUFF(PIOMMMIOENTRY) pRegEntry = &pVM->iomr0.s.paMmioRegs[ (uintptr_t)pvUser];741 AssertReturn(uUser < pVM->iomr0.s.cMmioAlloc, VERR_IOM_INVALID_MMIO_HANDLE); 742 CTX_SUFF(PIOMMMIOENTRY) pRegEntry = &pVM->iomr0.s.paMmioRegs[uUser]; 743 743 # else 744 CTX_SUFF(PIOMMMIOENTRY) pRegEntry = &pVM->iom.s.paMmioRegs[ (uintptr_t)pvUser];744 CTX_SUFF(PIOMMMIOENTRY) pRegEntry = &pVM->iom.s.paMmioRegs[uUser]; 745 745 # endif 746 746 … … 795 795 * @callback_method_impl{FNPGMPHYSHANDLER, MMIO page accesses} 796 796 * 797 * @remarks The @a pvUser argument is the MMIO handle.797 * @remarks The @a uUser argument is the MMIO handle. 798 798 */ 799 799 PGM_ALL_CB2_DECL(VBOXSTRICTRC) iomMmioHandlerNew(PVMCC pVM, PVMCPUCC pVCpu, RTGCPHYS GCPhysFault, void *pvPhys, void *pvBuf, 800 size_t cbBuf, PGMACCESSTYPE enmAccessType, PGMACCESSORIGIN enmOrigin, void *pvUser)800 size_t cbBuf, PGMACCESSTYPE enmAccessType, PGMACCESSORIGIN enmOrigin, uint64_t uUser) 801 801 { 802 802 STAM_PROFILE_START(UnusedMacroArg, Prf); 803 803 STAM_COUNTER_INC(&pVM->iom.s.CTX_SUFF(StatMmioHandler)); 804 Log4(("iomMmioHandlerNew: GCPhysFault=%RGp cbBuf=%#x enmAccessType=%d enmOrigin=%d pvUser=%p\n", GCPhysFault, cbBuf, enmAccessType, enmOrigin, pvUser));804 Log4(("iomMmioHandlerNew: GCPhysFault=%RGp cbBuf=%#x enmAccessType=%d enmOrigin=%d uUser=%p\n", GCPhysFault, cbBuf, enmAccessType, enmOrigin, uUser)); 805 805 806 806 Assert(enmAccessType == PGMACCESSTYPE_READ || enmAccessType == PGMACCESSTYPE_WRITE); … … 815 815 816 816 /* 817 * Translate pvUser to an MMIO registration table entry. We can do this817 * Translate uUser to an MMIO registration table entry. We can do this 818 818 * without any locking as the data is static after VM creation. 819 819 */ 820 AssertReturn( (uintptr_t)pvUser < RT_MIN(pVM->iom.s.cMmioRegs, pVM->iom.s.cMmioAlloc), VERR_IOM_INVALID_MMIO_HANDLE);820 AssertReturn(uUser < RT_MIN(pVM->iom.s.cMmioRegs, pVM->iom.s.cMmioAlloc), VERR_IOM_INVALID_MMIO_HANDLE); 821 821 #ifdef IN_RING0 822 AssertReturn( (uintptr_t)pvUser < pVM->iomr0.s.cMmioAlloc, VERR_IOM_INVALID_MMIO_HANDLE);823 CTX_SUFF(PIOMMMIOENTRY) const pRegEntry = &pVM->iomr0.s.paMmioRegs[ (uintptr_t)pvUser];824 PIOMMMIOENTRYR3 const pRegEntryR3 = &pVM->iomr0.s.paMmioRing3Regs[ (uintptr_t)pvUser];822 AssertReturn(uUser < pVM->iomr0.s.cMmioAlloc, VERR_IOM_INVALID_MMIO_HANDLE); 823 CTX_SUFF(PIOMMMIOENTRY) const pRegEntry = &pVM->iomr0.s.paMmioRegs[uUser]; 824 PIOMMMIOENTRYR3 const pRegEntryR3 = &pVM->iomr0.s.paMmioRing3Regs[uUser]; 825 825 #else 826 CTX_SUFF(PIOMMMIOENTRY) const pRegEntry = &pVM->iom.s.paMmioRegs[ (uintptr_t)pvUser];826 CTX_SUFF(PIOMMMIOENTRY) const pRegEntry = &pVM->iom.s.paMmioRegs[uUser]; 827 827 #endif 828 828 #ifdef VBOX_WITH_STATISTICS … … 854 854 && pRegEntry->cbRegion != 0 855 855 && ( enmAccessType == PGMACCESSTYPE_READ 856 ? pRegEntry->pfnReadCallback != NULL || pVM->iomr0.s.paMmioRing3Regs[ (uintptr_t)pvUser].pfnReadCallback == NULL857 : pRegEntry->pfnWriteCallback != NULL || pVM->iomr0.s.paMmioRing3Regs[ (uintptr_t)pvUser].pfnWriteCallback == NULL)856 ? pRegEntry->pfnReadCallback != NULL || pVM->iomr0.s.paMmioRing3Regs[uUser].pfnReadCallback == NULL 857 : pRegEntry->pfnWriteCallback != NULL || pVM->iomr0.s.paMmioRing3Regs[uUser].pfnWriteCallback == NULL) 858 858 && pDevIns ) 859 859 { /* likely */ } 860 860 else 861 861 { 862 Log4(("iomMmioHandlerNew: to ring-3: to-big=%RTbool zero-size=%RTbool no-callback=%RTbool pDevIns=%p hRegion=% p\n",862 Log4(("iomMmioHandlerNew: to ring-3: to-big=%RTbool zero-size=%RTbool no-callback=%RTbool pDevIns=%p hRegion=%#RX64\n", 863 863 !(cbBuf <= sizeof(pVCpu->iom.s.PendingMmioWrite.abValue)), !(pRegEntry->cbRegion != 0), 864 864 !( enmAccessType == PGMACCESSTYPE_READ 865 ? pRegEntry->pfnReadCallback != NULL || pVM->iomr0.s.paMmioRing3Regs[ (uintptr_t)pvUser].pfnReadCallback == NULL866 : pRegEntry->pfnWriteCallback != NULL || pVM->iomr0.s.paMmioRing3Regs[ (uintptr_t)pvUser].pfnWriteCallback == NULL),867 pDevIns, pvUser));865 ? pRegEntry->pfnReadCallback != NULL || pVM->iomr0.s.paMmioRing3Regs[uUser].pfnReadCallback == NULL 866 : pRegEntry->pfnWriteCallback != NULL || pVM->iomr0.s.paMmioRing3Regs[uUser].pfnWriteCallback == NULL), 867 pDevIns, uUser)); 868 868 STAM_COUNTER_INC(enmAccessType == PGMACCESSTYPE_READ ? &pStats->ReadRZToR3 : &pStats->WriteRZToR3); 869 869 STAM_COUNTER_INC(enmAccessType == PGMACCESSTYPE_READ ? &pVM->iom.s.StatMmioReadsR0ToR3 : &pVM->iom.s.StatMmioWritesR0ToR3); -
trunk/src/VBox/VMM/VMMAll/PDMAll.cpp
r93609 r93635 299 299 300 300 /** 301 * Translates a ring-0 device instance index to a pointer. 302 * 303 * This is used by PGM for device access handlers. 304 * 305 * @returns Device instance pointer if valid index, otherwise NULL (asserted). 306 * @param pVM The cross context VM structure. 307 * @param idxR0Device The ring-0 device instance index. 308 */ 309 VMM_INT_DECL(PPDMDEVINS) PDMDeviceRing0IdxToInstance(PVMCC pVM, uint64_t idxR0Device) 310 { 311 #ifdef IN_RING0 312 AssertMsgReturn(idxR0Device < RT_ELEMENTS(pVM->pdmr0.s.apDevInstances), ("%#RX64\n", idxR0Device), NULL); 313 PPDMDEVINS pDevIns = pVM->pdmr0.s.apDevInstances[idxR0Device]; 314 #elif defined(IN_RING3) 315 AssertMsgReturn(idxR0Device < RT_ELEMENTS(pVM->pdm.s.apDevRing0Instances), ("%#RX64\n", idxR0Device), NULL); 316 PPDMDEVINS pDevIns = pVM->pdm.s.apDevRing0Instances[idxR0Device]; 317 #else 318 # error "Unsupported context" 319 #endif 320 AssertMsg(pDevIns, ("%#RX64\n", idxR0Device)); 321 return pDevIns; 322 } 323 324 325 /** 301 326 * Locks PDM. 302 327 * -
trunk/src/VBox/VMM/VMMAll/PGMAllBth.h
r93617 r93635 319 319 { 320 320 rcStrict = pCurType->CTX_SUFF(pfnPfHandler)(pVM, pVCpu, uErr, pRegFrame, pvFault, GCPhysFault, 321 pCur->CTX_SUFF(pvUser)); 321 !pCurType->fRing0DevInsIdx ? pCur->uUser 322 : (uintptr_t)PDMDeviceRing0IdxToInstance(pVM, pCur->uUser)); 322 323 323 324 # ifdef VBOX_WITH_STATISTICS … … 329 330 else 330 331 { 331 void * const pvUser = pCur->CTX_SUFF(pvUser); 332 uint64_t const uUser = !pCurType->fRing0DevInsIdx ? pCur->uUser 333 : (uintptr_t)PDMDeviceRing0IdxToInstance(pVM, pCur->uUser); 332 334 PGM_UNLOCK(pVM); 333 335 *pfLockTaken = false; 334 336 335 rcStrict = pCurType->CTX_SUFF(pfnPfHandler)(pVM, pVCpu, uErr, pRegFrame, pvFault, GCPhysFault, pvUser);337 rcStrict = pCurType->CTX_SUFF(pfnPfHandler)(pVM, pVCpu, uErr, pRegFrame, pvFault, GCPhysFault, uUser); 336 338 337 339 # ifdef VBOX_WITH_STATISTICS -
trunk/src/VBox/VMM/VMMAll/PGMAllHandler.cpp
r93554 r93635 136 136 * @param pVM The cross context VM structure. 137 137 * @param hType The handler type registration handle. 138 * @param pvUserR3 User argument to the R3 handler. 139 * @param pvUserR0 User argument to the R0 handler. 140 * @param pvUserRC User argument to the RC handler. This can be a value 141 * less that 0x10000 or a (non-null) pointer that is 142 * automatically relocated. 138 * @param uUser User argument to the handlers (not pointer). 143 139 * @param pszDesc Description of this handler. If NULL, the type 144 140 * description will be used instead. … … 146 142 * success. 147 143 */ 148 int pgmHandlerPhysicalExCreate(PVMCC pVM, PGMPHYSHANDLERTYPE hType, RTR3PTR pvUserR3, RTR0PTR pvUserR0, RTRCPTR pvUserRC,144 int pgmHandlerPhysicalExCreate(PVMCC pVM, PGMPHYSHANDLERTYPE hType, uint64_t uUser, 149 145 R3PTRTYPE(const char *) pszDesc, PPGMPHYSHANDLER *ppPhysHandler) 150 146 { 151 147 PPGMPHYSHANDLERTYPEINT pType = PGMPHYSHANDLERTYPEINT_FROM_HANDLE(pVM, hType); 152 Log(("pgmHandlerPhysicalExCreate: pvUserR3=%RHv pvUserR0=%RHv pvUserGC=%RRvhType=%#x (%d, %s) pszDesc=%RHv:%s\n",153 pvUserR3, pvUserR0, pvUserRC, hType, pType->enmKind, R3STRING(pType->pszDesc), pszDesc, R3STRING(pszDesc)));148 Log(("pgmHandlerPhysicalExCreate: uUser=%#RX64 hType=%#x (%d, %s) pszDesc=%RHv:%s\n", 149 uUser, hType, pType->enmKind, R3STRING(pType->pszDesc), pszDesc, R3STRING(pszDesc))); 154 150 155 151 /* … … 158 154 AssertPtr(ppPhysHandler); 159 155 AssertReturn(pType->u32Magic == PGMPHYSHANDLERTYPEINT_MAGIC, VERR_INVALID_HANDLE); 160 #ifdef VBOX_WITH_RAW_MODE_KEEP161 AssertMsgReturn( (RTRCUINTPTR)pvUserRC < 0x10000162 || MMHyperR3ToRC(pVM, MMHyperRCToR3(pVM, pvUserRC)) == pvUserRC,163 ("Not RC pointer! pvUserRC=%RRv\n", pvUserRC),164 VERR_INVALID_PARAMETER);165 #else166 RT_NOREF(pvUserRC);167 #endif168 #if 0 /* No longer valid. */169 AssertMsgReturn( (RTR0UINTPTR)pvUserR0 < 0x10000170 || MMHyperR3ToR0(pVM, MMHyperR0ToR3(pVM, pvUserR0)) == pvUserR0,171 ("Not R0 pointer! pvUserR0=%RHv\n", pvUserR0),172 VERR_INVALID_PARAMETER);173 #endif174 156 175 157 /* … … 185 167 pNew->cAliasedPages = 0; 186 168 pNew->cTmpOffPages = 0; 187 pNew->pvUserR3 = pvUserR3; 188 pNew->pvUserR0 = pvUserR0; 169 pNew->uUser = uUser; 189 170 pNew->hType = hType; 190 171 pNew->pszDesc = pszDesc != NIL_RTR3PTR ? pszDesc : pType->pszDesc; … … 211 192 int pgmHandlerPhysicalExDup(PVMCC pVM, PPGMPHYSHANDLER pPhysHandlerSrc, PPGMPHYSHANDLER *ppPhysHandler) 212 193 { 213 return pgmHandlerPhysicalExCreate(pVM, 214 pPhysHandlerSrc->hType, 215 pPhysHandlerSrc->pvUserR3, 216 pPhysHandlerSrc->pvUserR0, 217 NIL_RTR0PTR, 218 pPhysHandlerSrc->pszDesc, 219 ppPhysHandler); 194 return pgmHandlerPhysicalExCreate(pVM, pPhysHandlerSrc->hType, pPhysHandlerSrc->uUser, 195 pPhysHandlerSrc->pszDesc, ppPhysHandler); 220 196 } 221 197 … … 329 305 * @param GCPhysLast Last physical address. (inclusive) 330 306 * @param hType The handler type registration handle. 331 * @param pvUserR3 User argument to the R3 handler. 332 * @param pvUserR0 User argument to the R0 handler. 333 * @param pvUserRC User argument to the RC handler. This can be a value 334 * less that 0x10000 or a (non-null) pointer that is 335 * automatically relocated. 307 * @param uUser User argument to the handler. 336 308 * @param pszDesc Description of this handler. If NULL, the type 337 309 * description will be used instead. 338 310 */ 339 311 VMMDECL(int) PGMHandlerPhysicalRegister(PVMCC pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysLast, PGMPHYSHANDLERTYPE hType, 340 RTR3PTR pvUserR3, RTR0PTR pvUserR0, RTRCPTR pvUserRC, R3PTRTYPE(const char *) pszDesc)312 uint64_t uUser, R3PTRTYPE(const char *) pszDesc) 341 313 { 342 314 #ifdef LOG_ENABLED 343 315 PPGMPHYSHANDLERTYPEINT pType = PGMPHYSHANDLERTYPEINT_FROM_HANDLE(pVM, hType); 344 Log(("PGMHandlerPhysicalRegister: GCPhys=%RGp GCPhysLast=%RGp pvUserR3=%RHv pvUserR0=%RHv pvUserGC=%RRvhType=%#x (%d, %s) pszDesc=%RHv:%s\n",345 GCPhys, GCPhysLast, pvUserR3, pvUserR0, pvUserRC, hType, pType->enmKind, R3STRING(pType->pszDesc), pszDesc, R3STRING(pszDesc)));316 Log(("PGMHandlerPhysicalRegister: GCPhys=%RGp GCPhysLast=%RGp uUser=%#RX64 hType=%#x (%d, %s) pszDesc=%RHv:%s\n", 317 GCPhys, GCPhysLast, uUser, hType, pType->enmKind, R3STRING(pType->pszDesc), pszDesc, R3STRING(pszDesc))); 346 318 #endif 347 319 348 320 PPGMPHYSHANDLER pNew; 349 int rc = pgmHandlerPhysicalExCreate(pVM, hType, pvUserR3, pvUserR0, pvUserRC, pszDesc, &pNew);321 int rc = pgmHandlerPhysicalExCreate(pVM, hType, uUser, pszDesc, &pNew); 350 322 if (RT_SUCCESS(rc)) 351 323 { … … 970 942 * @param pVM The cross context VM structure. 971 943 * @param GCPhys Start physical address of the handler. 972 * @param pvUserR3 User argument to the R3 handler. 973 * @param pvUserR0 User argument to the R0 handler. 974 */ 975 VMMDECL(int) PGMHandlerPhysicalChangeUserArgs(PVMCC pVM, RTGCPHYS GCPhys, RTR3PTR pvUserR3, RTR0PTR pvUserR0) 976 { 977 /* 978 * Find the handler. 979 */ 980 int rc = VINF_SUCCESS; 944 * @param uUser User argument to the handlers. 945 */ 946 VMMDECL(int) PGMHandlerPhysicalChangeUserArg(PVMCC pVM, RTGCPHYS GCPhys, uint64_t uUser) 947 { 948 /* 949 * Find the handler and make the change. 950 */ 951 int rc; 981 952 PGM_LOCK_VOID(pVM); 982 953 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys); 983 954 if (pCur) 984 955 { 985 /* 986 * Change arguments. 987 */ 988 pCur->pvUserR3 = pvUserR3; 989 pCur->pvUserR0 = pvUserR0; 956 pCur->uUser = uUser; 957 rc = VINF_SUCCESS; 990 958 } 991 959 else -
trunk/src/VBox/VMM/VMMAll/PGMAllPhys.cpp
r93593 r93635 122 122 DECLEXPORT(VBOXSTRICTRC) 123 123 pgmPhysHandlerRedirectToHC(PVMCC pVM, PVMCPUCC pVCpu, RTGCPHYS GCPhys, void *pvPhys, void *pvBuf, size_t cbBuf, 124 PGMACCESSTYPE enmAccessType, PGMACCESSORIGIN enmOrigin, void *pvUser) 125 { 126 NOREF(pVM); NOREF(pVCpu); NOREF(GCPhys); NOREF(pvPhys); NOREF(pvBuf); NOREF(cbBuf); 127 NOREF(enmAccessType); NOREF(enmOrigin); NOREF(pvUser); 124 PGMACCESSTYPE enmAccessType, PGMACCESSORIGIN enmOrigin, uint64_t uUser) 125 { 126 RT_NOREF(pVM, pVCpu, GCPhys, pvPhys, pvBuf, cbBuf, enmAccessType, enmOrigin, uUser); 128 127 return VINF_EM_RAW_EMULATE_INSTR; 129 128 } … … 135 134 */ 136 135 VMMDECL(VBOXSTRICTRC) pgmPhysPfHandlerRedirectToHC(PVMCC pVM, PVMCPUCC pVCpu, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, 137 RTGCPTR pvFault, RTGCPHYS GCPhysFault, void *pvUser)138 { 139 NOREF(pVM); NOREF(pVCpu); NOREF(uErrorCode); NOREF(pRegFrame); NOREF(pvFault); NOREF(GCPhysFault); NOREF(pvUser);136 RTGCPTR pvFault, RTGCPHYS GCPhysFault, uint64_t uUser) 137 { 138 RT_NOREF(pVM, pVCpu, uErrorCode, pRegFrame, pvFault, GCPhysFault, uUser); 140 139 return VINF_EM_RAW_EMULATE_INSTR; 141 140 } 142 141 142 #endif /* !IN_RING3 */ 143 144 /** 145 * Looks up a ROM range by its PGMROMRANGE::GCPhys value. 146 */ 147 DECLINLINE(PPGMROMRANGE) pgmPhysRomLookupByBase(PVMCC pVM, RTGCPHYS GCPhys) 148 { 149 for (PPGMROMRANGE pRom = pVM->pgm.s.CTX_SUFF(pRomRanges); pRom; pRom = pRom->CTX_SUFF(pNext)) 150 if (pRom->GCPhys == GCPhys) 151 return pRom; 152 return NULL; 153 } 154 155 #ifndef IN_RING3 143 156 144 157 /** … … 146 159 * \#PF access handler callback for guest ROM range write access.} 147 160 * 148 * @remarks The @a pvUser argument points to the PGMROMRANGE.161 * @remarks The @a uUser argument is the PGMROMRANGE::GCPhys value. 149 162 */ 150 163 DECLEXPORT(VBOXSTRICTRC) pgmPhysRomWritePfHandler(PVMCC pVM, PVMCPUCC pVCpu, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, 151 RTGCPTR pvFault, RTGCPHYS GCPhysFault, void *pvUser) 152 { 153 int rc; 154 PPGMROMRANGE pRom = (PPGMROMRANGE)pvUser; 155 uint32_t iPage = (GCPhysFault - pRom->GCPhys) >> GUEST_PAGE_SHIFT; 156 NOREF(uErrorCode); NOREF(pvFault); 164 RTGCPTR pvFault, RTGCPHYS GCPhysFault, uint64_t uUser) 165 166 { 167 PPGMROMRANGE const pRom = pgmPhysRomLookupByBase(pVM, uUser); 168 AssertReturn(pRom, VINF_EM_RAW_EMULATE_INSTR); 169 uint32_t const iPage = (GCPhysFault - pRom->GCPhys) >> GUEST_PAGE_SHIFT; 170 int rc; 171 RT_NOREF(uErrorCode, pvFault); 157 172 158 173 Assert(uErrorCode & X86_TRAP_PF_RW); /* This shall not be used for read access! */ … … 216 231 * Access handler callback for ROM write accesses.} 217 232 * 218 * @remarks The @a pvUser argument points to the PGMROMRANGE.233 * @remarks The @a uUser argument is the PGMROMRANGE::GCPhys value. 219 234 */ 220 235 PGM_ALL_CB2_DECL(VBOXSTRICTRC) 221 236 pgmPhysRomWriteHandler(PVMCC pVM, PVMCPUCC pVCpu, RTGCPHYS GCPhys, void *pvPhys, void *pvBuf, size_t cbBuf, 222 PGMACCESSTYPE enmAccessType, PGMACCESSORIGIN enmOrigin, void *pvUser) 223 { 224 PPGMROMRANGE pRom = (PPGMROMRANGE)pvUser; 225 const uint32_t iPage = (GCPhys - pRom->GCPhys) >> GUEST_PAGE_SHIFT; 237 PGMACCESSTYPE enmAccessType, PGMACCESSORIGIN enmOrigin, uint64_t uUser) 238 { 239 PPGMROMRANGE const pRom = pgmPhysRomLookupByBase(pVM, uUser); 240 AssertReturn(pRom, VERR_INTERNAL_ERROR_3); 241 uint32_t const iPage = (GCPhys - pRom->GCPhys) >> GUEST_PAGE_SHIFT; 226 242 Assert(iPage < (pRom->cb >> GUEST_PAGE_SHIFT)); 227 PPGMROMPAGE pRomPage = &pRom->aPages[iPage]; 243 PPGMROMPAGE const pRomPage = &pRom->aPages[iPage]; 244 228 245 Log5(("pgmPhysRomWriteHandler: %d %c %#08RGp %#04zx\n", pRomPage->enmProt, enmAccessType == PGMACCESSTYPE_READ ? 'R' : 'W', GCPhys, cbBuf)); 229 NOREF(pVCpu); NOREF(pvPhys); NOREF(enmOrigin);246 RT_NOREF(pVCpu, pvPhys, enmOrigin); 230 247 231 248 if (enmAccessType == PGMACCESSTYPE_READ) … … 328 345 * Common worker for pgmPhysMmio2WriteHandler and pgmPhysMmio2WritePfHandler. 329 346 */ 330 static VBOXSTRICTRC pgmPhysMmio2WriteHandlerCommon(PVMCC pVM, PVMCPUCC pVCpu, uint ptr_t hMmio2, RTGCPHYS GCPhys, RTGCPTR GCPtr)347 static VBOXSTRICTRC pgmPhysMmio2WriteHandlerCommon(PVMCC pVM, PVMCPUCC pVCpu, uint64_t hMmio2, RTGCPHYS GCPhys, RTGCPTR GCPtr) 331 348 { 332 349 /* … … 377 394 * \#PF access handler callback for guest MMIO2 dirty page tracing.} 378 395 * 379 * @remarks The @a pvUser is the MMIO2 index.396 * @remarks The @a uUser is the MMIO2 index. 380 397 */ 381 398 DECLEXPORT(VBOXSTRICTRC) pgmPhysMmio2WritePfHandler(PVMCC pVM, PVMCPUCC pVCpu, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, 382 RTGCPTR pvFault, RTGCPHYS GCPhysFault, void *pvUser)399 RTGCPTR pvFault, RTGCPHYS GCPhysFault, uint64_t uUser) 383 400 { 384 401 RT_NOREF(pVCpu, uErrorCode, pRegFrame); … … 386 403 if (RT_SUCCESS(rcStrict)) 387 404 { 388 rcStrict = pgmPhysMmio2WriteHandlerCommon(pVM, pVCpu, (uintptr_t)pvUser, GCPhysFault, pvFault);405 rcStrict = pgmPhysMmio2WriteHandlerCommon(pVM, pVCpu, uUser, GCPhysFault, pvFault); 389 406 PGM_UNLOCK(pVM); 390 407 } … … 398 415 * Access handler callback for MMIO2 dirty page tracing.} 399 416 * 400 * @remarks The @a pvUser is the MMIO2 index.417 * @remarks The @a uUser is the MMIO2 index. 401 418 */ 402 419 PGM_ALL_CB2_DECL(VBOXSTRICTRC) 403 420 pgmPhysMmio2WriteHandler(PVMCC pVM, PVMCPUCC pVCpu, RTGCPHYS GCPhys, void *pvPhys, void *pvBuf, size_t cbBuf, 404 PGMACCESSTYPE enmAccessType, PGMACCESSORIGIN enmOrigin, void *pvUser)421 PGMACCESSTYPE enmAccessType, PGMACCESSORIGIN enmOrigin, uint64_t uUser) 405 422 { 406 423 VBOXSTRICTRC rcStrict = PGM_LOCK(pVM); /* We should already have it, but just make sure we do. */ 407 424 if (RT_SUCCESS(rcStrict)) 408 425 { 409 rcStrict = pgmPhysMmio2WriteHandlerCommon(pVM, pVCpu, (uintptr_t)pvUser, GCPhys, ~(RTGCPTR)0);426 rcStrict = pgmPhysMmio2WriteHandlerCommon(pVM, pVCpu, uUser, GCPhys, ~(RTGCPTR)0); 410 427 PGM_UNLOCK(pVM); 411 428 if (rcStrict == VINF_SUCCESS) … … 2415 2432 */ 2416 2433 PVMCPUCC pVCpu = VMMGetCpu(pVM); 2417 PPGMPHYSHANDLER pPhys = NULL;2418 2434 if ( PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) == PGM_PAGE_HNDL_PHYS_STATE_ALL 2419 2435 || PGM_PAGE_IS_MMIO_OR_SPECIAL_ALIAS(pPage)) 2420 2436 { 2421 pPhys= pgmHandlerPhysicalLookup(pVM, GCPhys);2422 AssertReleaseMsg(p Phys, ("GCPhys=%RGp cb=%#x\n", GCPhys, cb));2423 Assert(GCPhys >= p Phys->Core.Key && GCPhys <= pPhys->Core.KeyLast);2424 Assert((p Phys->Core.Key & GUEST_PAGE_OFFSET_MASK) == 0);2425 Assert((p Phys->Core.KeyLast & GUEST_PAGE_OFFSET_MASK) == GUEST_PAGE_OFFSET_MASK);2437 PPGMPHYSHANDLER pCur = pgmHandlerPhysicalLookup(pVM, GCPhys); 2438 AssertReleaseMsg(pCur, ("GCPhys=%RGp cb=%#x\n", GCPhys, cb)); 2439 Assert(GCPhys >= pCur->Core.Key && GCPhys <= pCur->Core.KeyLast); 2440 Assert((pCur->Core.Key & GUEST_PAGE_OFFSET_MASK) == 0); 2441 Assert((pCur->Core.KeyLast & GUEST_PAGE_OFFSET_MASK) == GUEST_PAGE_OFFSET_MASK); 2426 2442 #ifndef IN_RING3 2427 2443 if (enmOrigin != PGMACCESSORIGIN_IEM) … … 2432 2448 } 2433 2449 #endif 2434 PFNPGMPHYSHANDLER pfnHandler = PGMPHYSHANDLER_GET_TYPE(pVM, pPhys)->CTX_SUFF(pfnHandler); Assert(pfnHandler); 2435 void *pvUser = pPhys->CTX_SUFF(pvUser); 2436 2437 Log5(("pgmPhysReadHandler: GCPhys=%RGp cb=%#x pPage=%R[pgmpage] phys %s\n", GCPhys, cb, pPage, R3STRING(pPhys->pszDesc) )); 2438 STAM_PROFILE_START(&pPhys->Stat, h); 2450 PPGMPHYSHANDLERTYPEINT const pCurType = PGMPHYSHANDLER_GET_TYPE(pVM, pCur); 2451 PFNPGMPHYSHANDLER const pfnHandler = pCurType->CTX_SUFF(pfnHandler); Assert(pfnHandler); 2452 uint64_t const uUser = !pCurType->fRing0DevInsIdx ? pCur->uUser 2453 : (uintptr_t)PDMDeviceRing0IdxToInstance(pVM, pCur->uUser); 2454 2455 Log5(("pgmPhysReadHandler: GCPhys=%RGp cb=%#x pPage=%R[pgmpage] phys %s\n", GCPhys, cb, pPage, R3STRING(pCur->pszDesc) )); 2456 STAM_PROFILE_START(&pCur->Stat, h); 2439 2457 PGM_LOCK_ASSERT_OWNER(pVM); 2440 2458 2441 2459 /* Release the PGM lock as MMIO handlers take the IOM lock. (deadlock prevention) */ 2442 2460 PGM_UNLOCK(pVM); 2443 rcStrict = pfnHandler(pVM, pVCpu, GCPhys, (void *)pvSrc, pvBuf, cb, PGMACCESSTYPE_READ, enmOrigin, pvUser);2461 rcStrict = pfnHandler(pVM, pVCpu, GCPhys, (void *)pvSrc, pvBuf, cb, PGMACCESSTYPE_READ, enmOrigin, uUser); 2444 2462 PGM_LOCK_VOID(pVM); 2445 2463 2446 2464 #ifdef VBOX_WITH_STATISTICS 2447 p Phys= pgmHandlerPhysicalLookup(pVM, GCPhys);2448 if (p Phys)2449 STAM_PROFILE_STOP(&p Phys->Stat, h);2465 pCur = pgmHandlerPhysicalLookup(pVM, GCPhys); 2466 if (pCur) 2467 STAM_PROFILE_STOP(&pCur->Stat, h); 2450 2468 #else 2451 p Phys= NULL; /* might not be valid anymore. */2469 pCur = NULL; /* might not be valid anymore. */ 2452 2470 #endif 2453 2471 AssertLogRelMsg(PGM_HANDLER_PHYS_IS_VALID_STATUS(rcStrict, false), … … 2676 2694 PPGMPHYSHANDLERTYPEINT const pCurType = PGMPHYSHANDLER_GET_TYPE(pVM, pCur); 2677 2695 PFNPGMPHYSHANDLER const pfnHandler = pCurType->CTX_SUFF(pfnHandler); 2678 void * const pvUser = pCur->CTX_SUFF(pvUser); 2696 uint64_t const uUser = !pCurType->fRing0DevInsIdx ? pCur->uUser 2697 : (uintptr_t)PDMDeviceRing0IdxToInstance(pVM, pCur->uUser); 2679 2698 STAM_PROFILE_START(&pCur->Stat, h); 2680 2699 … … 2684 2703 PGM_LOCK_ASSERT_OWNER(pVM); 2685 2704 if (pCurType->fKeepPgmLock) 2686 rcStrict = pfnHandler(pVM, pVCpu, GCPhys, pvDst, (void *)pvBuf, cbRange, PGMACCESSTYPE_WRITE, enmOrigin, pvUser);2705 rcStrict = pfnHandler(pVM, pVCpu, GCPhys, pvDst, (void *)pvBuf, cbRange, PGMACCESSTYPE_WRITE, enmOrigin, uUser); 2687 2706 else 2688 2707 { 2689 2708 PGM_UNLOCK(pVM); 2690 rcStrict = pfnHandler(pVM, pVCpu, GCPhys, pvDst, (void *)pvBuf, cbRange, PGMACCESSTYPE_WRITE, enmOrigin, pvUser);2709 rcStrict = pfnHandler(pVM, pVCpu, GCPhys, pvDst, (void *)pvBuf, cbRange, PGMACCESSTYPE_WRITE, enmOrigin, uUser); 2691 2710 PGM_LOCK_VOID(pVM); 2692 2711 } … … 2801 2820 PPGMPHYSHANDLERTYPEINT const pCurType = PGMPHYSHANDLER_GET_TYPE(pVM, pPhys); 2802 2821 PFNPGMPHYSHANDLER const pfnHandler = pCurType->CTX_SUFF(pfnHandler); 2803 void * const pvUser = pPhys->CTX_SUFF(pvUser); 2822 uint64_t const uUser = !pCurType->fRing0DevInsIdx ? pPhys->uUser 2823 : (uintptr_t)PDMDeviceRing0IdxToInstance(pVM, pPhys->uUser); 2804 2824 2805 2825 Log5(("pgmPhysWriteHandler: GCPhys=%RGp cbRange=%#x pPage=%R[pgmpage] phys %s\n", GCPhys, cbRange, pPage, R3STRING(pPhys->pszDesc) )); … … 2811 2831 PGM_LOCK_ASSERT_OWNER(pVM); 2812 2832 if (pCurType->fKeepPgmLock) 2813 rcStrict2 = pfnHandler(pVM, pVCpu, GCPhys, pvDst, (void *)pvBuf, cbRange, PGMACCESSTYPE_WRITE, enmOrigin, pvUser);2833 rcStrict2 = pfnHandler(pVM, pVCpu, GCPhys, pvDst, (void *)pvBuf, cbRange, PGMACCESSTYPE_WRITE, enmOrigin, uUser); 2814 2834 else 2815 2835 { 2816 2836 PGM_UNLOCK(pVM); 2817 rcStrict2 = pfnHandler(pVM, pVCpu, GCPhys, pvDst, (void *)pvBuf, cbRange, PGMACCESSTYPE_WRITE, enmOrigin, pvUser);2837 rcStrict2 = pfnHandler(pVM, pVCpu, GCPhys, pvDst, (void *)pvBuf, cbRange, PGMACCESSTYPE_WRITE, enmOrigin, uUser); 2818 2838 PGM_LOCK_VOID(pVM); 2819 2839 } -
trunk/src/VBox/VMM/VMMAll/PGMAllPool.cpp
r93619 r93635 937 937 * \#PF access handler callback for page table pages.} 938 938 * 939 * @remarks The @a pvUser argument points tothe PGMPOOLPAGE.939 * @remarks The @a uUser argument is the index of the PGMPOOLPAGE. 940 940 */ 941 941 DECLEXPORT(VBOXSTRICTRC) pgmRZPoolAccessPfHandler(PVMCC pVM, PVMCPUCC pVCpu, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, 942 RTGCPTR pvFault, RTGCPHYS GCPhysFault, void *pvUser)942 RTGCPTR pvFault, RTGCPHYS GCPhysFault, uint64_t uUser) 943 943 { 944 944 STAM_PROFILE_START(&pVM->pgm.s.CTX_SUFF(pPool)->StatMonitorRZ, a); 945 PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool); 946 PPGMPOOLPAGE pPage = (PPGMPOOLPAGE)pvUser; 947 unsigned cMaxModifications; 948 bool fForcedFlush = false; 949 NOREF(uErrorCode); 945 PPGMPOOL const pPool = pVM->pgm.s.CTX_SUFF(pPool); 946 AssertReturn(uUser < pPool->cCurPages, VERR_PGM_POOL_IPE); 947 PPGMPOOLPAGE const pPage = &pPool->aPages[uUser]; 948 unsigned cMaxModifications; 949 bool fForcedFlush = false; 950 RT_NOREF_PV(uErrorCode); 950 951 951 952 LogFlow(("pgmRZPoolAccessPfHandler: pvFault=%RGv pPage=%p:{.idx=%d} GCPhysFault=%RGp\n", pvFault, pPage, pPage->idx, GCPhysFault)); … … 1241 1242 * 1242 1243 * @remarks Only uses the VINF_PGM_HANDLER_DO_DEFAULT status. 1244 * @note The @a uUser argument is the index of the PGMPOOLPAGE. 1243 1245 */ 1244 1246 PGM_ALL_CB2_DECL(VBOXSTRICTRC) 1245 1247 pgmPoolAccessHandler(PVMCC pVM, PVMCPUCC pVCpu, RTGCPHYS GCPhys, void *pvPhys, void *pvBuf, size_t cbBuf, 1246 PGMACCESSTYPE enmAccessType, PGMACCESSORIGIN enmOrigin, void *pvUser)1247 { 1248 PPGMPOOL 1248 PGMACCESSTYPE enmAccessType, PGMACCESSORIGIN enmOrigin, uint64_t uUser) 1249 { 1250 PPGMPOOL const pPool = pVM->pgm.s.CTX_SUFF(pPool); 1249 1251 STAM_PROFILE_START(&pPool->CTX_SUFF_Z(StatMonitor), a); 1250 PPGMPOOLPAGE pPage = (PPGMPOOLPAGE)pvUser; 1252 AssertReturn(uUser < pPool->cCurPages, VERR_PGM_POOL_IPE); 1253 PPGMPOOLPAGE const pPage = &pPool->aPages[uUser]; 1251 1254 LogFlow(("PGM_ALL_CB_DECL: GCPhys=%RGp %p:{.Core=%RHp, .idx=%d, .GCPhys=%RGp, .enmType=%d}\n", 1252 1255 GCPhys, pPage, pPage->Core.Key, pPage->idx, pPage->GCPhys, pPage->enmKind)); … … 2477 2480 const RTGCPHYS GCPhysPage = pPage->GCPhys & ~(RTGCPHYS)PAGE_OFFSET_MASK; 2478 2481 rc = PGMHandlerPhysicalRegister(pVM, GCPhysPage, GCPhysPage + PAGE_OFFSET_MASK, pPool->hAccessHandlerType, 2479 pgmPoolConvertPageToR3(pPool, pPage), pgmPoolConvertPageToR0(pPool, pPage), 2480 NIL_RTRCPTR, NIL_RTR3PTR /*pszDesc*/); 2482 pPage - &pPool->aPages[0], NIL_RTR3PTR /*pszDesc*/); 2481 2483 /** @todo we should probably deal with out-of-memory conditions here, but for now increasing 2482 2484 * the heap size should suffice. */ … … 2555 2557 PPGMPOOLPAGE pNewHead = &pPool->aPages[pPage->iMonitoredNext]; 2556 2558 pNewHead->iMonitoredPrev = NIL_PGMPOOL_IDX; 2557 rc = PGMHandlerPhysicalChangeUserArgs(pVM, pPage->GCPhys & ~(RTGCPHYS)PAGE_OFFSET_MASK, 2558 pgmPoolConvertPageToR3(pPool, pNewHead), 2559 pgmPoolConvertPageToR0(pPool, pNewHead)); 2559 rc = PGMHandlerPhysicalChangeUserArg(pVM, pPage->GCPhys & ~(RTGCPHYS)PAGE_OFFSET_MASK, pPage->iMonitoredNext); 2560 2560 2561 2561 AssertFatalRCSuccess(rc); -
trunk/src/VBox/VMM/VMMR0/PDMR0Device.cpp
r93609 r93635 421 421 if (idxR0Device < RT_ELEMENTS(pGVM->pdmr0.s.apDevInstances)) 422 422 { 423 pGVM->pdmr0.s.apDevInstances[idxR0Device] = pDevIns; 424 pGVM->pdmr0.s.cDevInstances = idxR0Device + 1; 423 pGVM->pdmr0.s.apDevInstances[idxR0Device] = pDevIns; 424 pGVM->pdmr0.s.cDevInstances = idxR0Device + 1; 425 pGVM->pdm.s.apDevRing0Instances[idxR0Device] = pDevIns->pDevInsForR3; 425 426 pDevIns->Internal.s.idxR0Device = idxR0Device; 426 427 pDevInsR3->Internal.s.idxR0Device = idxR0Device; -
trunk/src/VBox/VMM/VMMR0/PGMR0.cpp
r93599 r93635 990 990 if (pHandlerType->CTX_SUFF(pfnPfHandler)) 991 991 { 992 void *pvUser = pHandler->CTX_SUFF(pvUser); 992 uint64_t const uUser = !pHandlerType->fRing0DevInsIdx ? pHandler->uUser 993 : (uintptr_t)PDMDeviceRing0IdxToInstance(pGVM, pHandler->uUser); 993 994 STAM_PROFILE_START(&pHandler->Stat, h); 994 995 PGM_UNLOCK(pGVM); 995 996 996 Log6(("PGMR0Trap0eHandlerNPMisconfig: calling %p(,%#x,,%RGp,%p)\n", pHandlerType->CTX_SUFF(pfnPfHandler), uErr, GCPhysFault, pvUser));997 Log6(("PGMR0Trap0eHandlerNPMisconfig: calling %p(,%#x,,%RGp,%p)\n", pHandlerType->CTX_SUFF(pfnPfHandler), uErr, GCPhysFault, uUser)); 997 998 rc = pHandlerType->CTX_SUFF(pfnPfHandler)(pGVM, pGVCpu, uErr == UINT32_MAX ? RTGCPTR_MAX : uErr, pRegFrame, 998 GCPhysFault, GCPhysFault, pvUser);999 GCPhysFault, GCPhysFault, uUser); 999 1000 1000 1001 #ifdef VBOX_WITH_STATISTICS -
trunk/src/VBox/VMM/VMMR3/IEMR3.cpp
r93115 r93635 172 172 { 173 173 PVMCPU pVCpu0 = pVM->apCpusR3[0]; 174 int rc = PGMR3HandlerPhysicalTypeRegister(pVM, PGMPHYSHANDLERKIND_ALL, false /*fKeepPgmLock*/,174 int rc = PGMR3HandlerPhysicalTypeRegister(pVM, PGMPHYSHANDLERKIND_ALL, 0 /*fFlags*/, 175 175 iemVmxApicAccessPageHandler, 176 176 NULL /* pszModR0 */, -
trunk/src/VBox/VMM/VMMR3/IOM.cpp
r93115 r93635 159 159 * Register the MMIO access handler type. 160 160 */ 161 rc = PGMR3HandlerPhysicalTypeRegister(pVM, PGMPHYSHANDLERKIND_MMIO, false /*fKeepPgmLock*/,161 rc = PGMR3HandlerPhysicalTypeRegister(pVM, PGMPHYSHANDLERKIND_MMIO, 0 /*fFlags*/, 162 162 iomMmioHandlerNew, 163 163 NULL, "iomMmioHandlerNew", "iomMmioPfHandlerNew", -
trunk/src/VBox/VMM/VMMR3/IOMR3Mmio.cpp
r93554 r93635 399 399 ASMAtomicWriteU64(&pRegEntry->GCPhysMapping, GCPhys); 400 400 rc = PGMR3PhysMMIORegister(pVM, GCPhys, cbRegion, pVM->iom.s.hNewMmioHandlerType, 401 (void *)(uintptr_t)hRegion, hRegion,hRegion, pRegEntry->pszDesc);401 hRegion, pRegEntry->pszDesc); 402 402 AssertRCReturnStmt(rc, ASMAtomicWriteU64(&pRegEntry->GCPhysMapping, NIL_RTGCPHYS); IOM_UNLOCK_EXCL(pVM), rc); 403 403 … … 418 418 ASMAtomicWriteU64(&pRegEntry->GCPhysMapping, GCPhys); 419 419 rc = PGMR3PhysMMIORegister(pVM, GCPhys, cbRegion, pVM->iom.s.hNewMmioHandlerType, 420 (void *)(uintptr_t)hRegion, hRegion,hRegion, pRegEntry->pszDesc);420 hRegion, pRegEntry->pszDesc); 421 421 AssertRCReturnStmt(rc, ASMAtomicWriteU64(&pRegEntry->GCPhysMapping, NIL_RTGCPHYS); IOM_UNLOCK_EXCL(pVM), rc); 422 422 … … 444 444 /* First entry in the lookup table: */ 445 445 ASMAtomicWriteU64(&pRegEntry->GCPhysMapping, GCPhys); 446 rc = PGMR3PhysMMIORegister(pVM, GCPhys, cbRegion, pVM->iom.s.hNewMmioHandlerType, 447 (void *)(uintptr_t)hRegion, hRegion, hRegion, pRegEntry->pszDesc); 446 rc = PGMR3PhysMMIORegister(pVM, GCPhys, cbRegion, pVM->iom.s.hNewMmioHandlerType, hRegion, pRegEntry->pszDesc); 448 447 AssertRCReturnStmt(rc, ASMAtomicWriteU64(&pRegEntry->GCPhysMapping, NIL_RTGCPHYS); IOM_UNLOCK_EXCL(pVM), rc); 449 448 -
trunk/src/VBox/VMM/VMMR3/PDMDevHlp.cpp
r93611 r93635 873 873 pszDesc, pszDesc, phType)); 874 874 875 int rc = PGMR3HandlerPhysicalTypeRegister(pVM, enmKind, false /*fKeepPgmLock*/, pfnHandlerR3, 875 int rc = PGMR3HandlerPhysicalTypeRegister(pVM, enmKind, 876 pDevIns->Internal.s.fIntFlags & PDMDEVINSINT_FLAGS_R0_ENABLED 877 ? PGMPHYSHANDLER_F_R0_DEVINS_IDX : 0, 878 pfnHandlerR3, 876 879 pDevIns->pReg->pszR0Mod, pszHandlerR0, pszPfHandlerR0, 877 880 pDevIns->pReg->pszRCMod, pszHandlerRC, pszPfHandlerRC, … … 886 889 /** @interface_method_impl{PDMDEVHLPR3,pfnPGMHandlerPhysicalRegister} */ 887 890 static DECLCALLBACK(int) pdmR3DevHlp_PGMHandlerPhysicalRegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPHYS GCPhysLast, 888 PGMPHYSHANDLERTYPE hType, RTR3PTR pvUserR3, RTR0PTR pvUserR0, 889 RTRCPTR pvUserRC, R3PTRTYPE(const char *) pszDesc) 891 PGMPHYSHANDLERTYPE hType, R3PTRTYPE(const char *) pszDesc) 890 892 { 891 893 PDMDEV_ASSERT_DEVINS(pDevIns); 892 894 PVM pVM = pDevIns->Internal.s.pVMR3; 893 LogFlow(("pdmR3DevHlp_PGMHandlerPhysicalRegister: caller='%s'/%d: GCPhys=%RGp GCPhysLast=%RGp hType=%u pvUserR3=%p pvUserR0=%llx pvUsereRC=%llx pszDesc=%p:{%s}\n", 894 pDevIns->pReg->szName, pDevIns->iInstance, GCPhys, GCPhysLast, hType, pvUserR3, pvUserR0, pvUserRC, pszDesc, pszDesc)); 895 896 int rc = PGMHandlerPhysicalRegister(pVM, GCPhys, GCPhysLast, hType, pvUserR3, pvUserR0, pvUserRC, pszDesc); 895 LogFlow(("pdmR3DevHlp_PGMHandlerPhysicalRegister: caller='%s'/%d: GCPhys=%RGp GCPhysLast=%RGp hType=%u pszDesc=%p:{%s}\n", 896 pDevIns->pReg->szName, pDevIns->iInstance, GCPhys, GCPhysLast, hType, pszDesc, pszDesc)); 897 898 int rc = PGMHandlerPhysicalRegister(pVM, GCPhys, GCPhysLast, hType, 899 pDevIns->Internal.s.fIntFlags & PDMDEVINSINT_FLAGS_R0_ENABLED 900 ? pDevIns->Internal.s.idxR0Device : (uintptr_t)pDevIns, 901 pszDesc); 897 902 898 903 Log(("pdmR3DevHlp_PGMHandlerPhysicalRegister: caller='%s'/%d: returns %Rrc\n", … … 5774 5779 /** @interface_method_impl{PDMDEVHLPR3,pfnPGMHandlerPhysicalRegister} */ 5775 5780 static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PGMHandlerPhysicalRegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPHYS GCPhysLast, 5776 PGMPHYSHANDLERTYPE hType, RTR3PTR pvUserR3, RTR0PTR pvUserR0, 5777 RTRCPTR pvUserRC, R3PTRTYPE(const char *) pszDesc) 5778 { 5779 PDMDEV_ASSERT_DEVINS(pDevIns); 5780 RT_NOREF(GCPhys, GCPhysLast, hType, pvUserR3, pvUserR0, pvUserRC, pszDesc); 5781 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", 5782 pDevIns->pReg->szName, pDevIns->iInstance)); 5781 PGMPHYSHANDLERTYPE hType, R3PTRTYPE(const char *) pszDesc) 5782 { 5783 PDMDEV_ASSERT_DEVINS(pDevIns); 5784 RT_NOREF(GCPhys, GCPhysLast, hType, pszDesc); 5785 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance)); 5783 5786 return VERR_ACCESS_DENIED; 5784 5787 } -
trunk/src/VBox/VMM/VMMR3/PDMDevice.cpp
r93609 r93635 390 390 rc = RTStrCopy(Req.szModName, sizeof(Req.szModName), pReg->pszR0Mod); 391 391 AssertLogRelRCReturn(rc, rc); 392 392 393 rc = VMMR3CallR0Emt(pVM, pVM->apCpusR3[0], VMMR0_DO_PDM_DEVICE_CREATE, 0, &Req.Hdr); 393 394 AssertLogRelMsgRCReturn(rc, ("VMMR0_DO_PDM_DEVICE_CREATE for %s failed: %Rrc\n", pReg->szName, rc), rc); 395 394 396 pDevIns = Req.pDevInsR3; 395 397 pCritSect = pDevIns->pCritSectRoR3; 398 396 399 Assert(pDevIns->Internal.s.fIntFlags & PDMDEVINSINT_FLAGS_R0_ENABLED); 400 AssertLogRelReturn(pDevIns->Internal.s.idxR0Device < PDM_MAX_RING0_DEVICE_INSTANCES, VERR_PDM_DEV_IPE_1); 401 AssertLogRelReturn(pVM->pdm.s.apDevRing0Instances[pDevIns->Internal.s.idxR0Device] == pDevIns, VERR_PDM_DEV_IPE_1); 397 402 } 398 403 else -
trunk/src/VBox/VMM/VMMR3/PGM.cpp
r93596 r93635 954 954 if (RT_SUCCESS(rc)) 955 955 /** @todo why isn't pgmPhysRomWriteHandler registered for ring-0? */ 956 rc = PGMR3HandlerPhysicalTypeRegister(pVM, PGMPHYSHANDLERKIND_WRITE, false /*fKeepPgmLock*/,956 rc = PGMR3HandlerPhysicalTypeRegister(pVM, PGMPHYSHANDLERKIND_WRITE, 0 /*fFlags*/, 957 957 pgmPhysRomWriteHandler, 958 958 NULL, NULL, "pgmPhysRomWritePfHandler", … … 965 965 */ 966 966 if (RT_SUCCESS(rc)) 967 rc = PGMR3HandlerPhysicalTypeRegister(pVM, PGMPHYSHANDLERKIND_WRITE, true /*fKeepPgmLock*/,967 rc = PGMR3HandlerPhysicalTypeRegister(pVM, PGMPHYSHANDLERKIND_WRITE, PGMPHYSHANDLER_F_KEEP_PGM_LOCK, 968 968 pgmPhysMmio2WriteHandler, 969 969 NULL, "pgmPhysMmio2WriteHandler", "pgmPhysMmio2WritePfHandler", -
trunk/src/VBox/VMM/VMMR3/PGMHandler.cpp
r93554 r93635 65 65 * @param pVM The cross context VM structure. 66 66 * @param enmKind The kind of access handler. 67 * @param fKeepPgmLock Whether to hold the PGM lock while calling the 68 * handler or not. Mainly for PGM callers. 67 * @param fFlags PGMPHYSHANDLER_F_XXX 69 68 * @param pfnHandlerR3 Pointer to the ring-3 handler callback. 70 69 * @param pfnHandlerR0 Pointer to the ring-0 handler callback. … … 75 74 * safe). 76 75 */ 77 VMMR3_INT_DECL(int) PGMR3HandlerPhysicalTypeRegisterEx(PVM pVM, PGMPHYSHANDLERKIND enmKind, bool fKeepPgmLock,76 VMMR3_INT_DECL(int) PGMR3HandlerPhysicalTypeRegisterEx(PVM pVM, PGMPHYSHANDLERKIND enmKind, uint32_t fFlags, 78 77 PFNPGMPHYSHANDLER pfnHandlerR3, 79 78 R0PTRTYPE(PFNPGMPHYSHANDLER) pfnHandlerR0, … … 89 88 || enmKind == PGMPHYSHANDLERKIND_MMIO, 90 89 VERR_INVALID_PARAMETER); 90 AssertMsgReturn(!(fFlags & ~PGMPHYSHANDLER_F_VALID_MASK), ("%#x\n", fFlags), VERR_INVALID_FLAGS); 91 91 92 92 PPGMPHYSHANDLERTYPEINT pType; … … 99 99 pType->uState = enmKind == PGMPHYSHANDLERKIND_WRITE 100 100 ? PGM_PAGE_HNDL_PHYS_STATE_WRITE : PGM_PAGE_HNDL_PHYS_STATE_ALL; 101 pType->fKeepPgmLock = fKeepPgmLock; 101 pType->fKeepPgmLock = RT_BOOL(fFlags & PGMPHYSHANDLER_F_KEEP_PGM_LOCK); 102 pType->fRing0DevInsIdx = RT_BOOL(fFlags & PGMPHYSHANDLER_F_R0_DEVINS_IDX); 102 103 pType->pfnHandlerR3 = pfnHandlerR3; 103 104 pType->pfnHandlerR0 = pfnHandlerR0; … … 125 126 * @param pVM The cross context VM structure. 126 127 * @param enmKind The kind of access handler. 127 * @param fKeepPgmLock Whether to hold the PGM lock while calling the 128 * handler or not. Mainly for PGM callers. 128 * @param fFlags PGMPHYSHANDLER_F_XXX 129 129 * @param pfnHandlerR3 Pointer to the ring-3 handler callback. 130 130 * @param pszModR0 The name of the ring-0 module, NULL is an alias for … … 144 144 * safe). 145 145 */ 146 VMMR3DECL(int) PGMR3HandlerPhysicalTypeRegister(PVM pVM, PGMPHYSHANDLERKIND enmKind, bool fKeepPgmLock,146 VMMR3DECL(int) PGMR3HandlerPhysicalTypeRegister(PVM pVM, PGMPHYSHANDLERKIND enmKind, uint32_t fFlags, 147 147 R3PTRTYPE(PFNPGMPHYSHANDLER) pfnHandlerR3, 148 148 const char *pszModR0, const char *pszHandlerR0, const char *pszPfHandlerR0, … … 209 209 } 210 210 if (RT_SUCCESS(rc)) 211 return PGMR3HandlerPhysicalTypeRegisterEx(pVM, enmKind, f KeepPgmLock, pfnHandlerR3,211 return PGMR3HandlerPhysicalTypeRegisterEx(pVM, enmKind, fFlags, pfnHandlerR3, 212 212 pfnHandlerR0, pfnPfHandlerR0, pszDesc, phType); 213 213 } … … 365 365 pHlp->pfnPrintf(pHlp, 366 366 "Physical handlers: (PhysHandlers=%d (%#x))\n" 367 "%*s %*s %*s %*s HandlerGC UserGCType Description\n",367 "%*s %*s %*s %*s uUser Type Description\n", 368 368 pVM->pgm.s.pTreesR3->PhysHandlers, pVM->pgm.s.pTreesR3->PhysHandlers, 369 369 - (int)sizeof(RTGCPHYS) * 2, "From", 370 370 - (int)sizeof(RTGCPHYS) * 2 - 3, "- To (incl)", 371 - (int)sizeof(RTHCPTR) * 2 - 1, "Handler HC",372 - (int)sizeof(RTHCPTR) * 2 - 1, " UserHC");371 - (int)sizeof(RTHCPTR) * 2 - 1, "HandlerR3", 372 - (int)sizeof(RTHCPTR) * 2 - 1, "HandlerR0"); 373 373 RTAvlroGCPhysDoWithAll(&pVM->pgm.s.pTreesR3->PhysHandlers, true, pgmR3InfoHandlersPhysicalOne, &Args); 374 374 } … … 397 397 } 398 398 pHlp->pfnPrintf(pHlp, 399 "%RGp - %RGp %RHv %RHv % RHv %RHv%s %s\n",400 pCur->Core.Key, pCur->Core.KeyLast, pCurType->pfnHandlerR3, pCur ->pvUserR3,401 p CurType->pfnPfHandlerR0, pCur->pvUserR0, pszType, pCur->pszDesc);399 "%RGp - %RGp %RHv %RHv %#018RX64 %s %s\n", 400 pCur->Core.Key, pCur->Core.KeyLast, pCurType->pfnHandlerR3, pCurType->pfnPfHandlerR0, pCur->uUser, 401 pszType, pCur->pszDesc); 402 402 #ifdef VBOX_WITH_STATISTICS 403 403 if (pArgs->fStats) -
trunk/src/VBox/VMM/VMMR3/PGMPhys.cpp
r93624 r93635 2257 2257 * @param cb The size of the MMIO region. 2258 2258 * @param hType The physical access handler type registration. 2259 * @param pvUserR3 The user argument for R3. 2260 * @param pvUserR0 The user argument for R0. 2261 * @param pvUserRC The user argument for RC. 2259 * @param uUser The user argument. 2262 2260 * @param pszDesc The description of the MMIO region. 2263 2261 */ 2264 2262 VMMR3DECL(int) PGMR3PhysMMIORegister(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cb, PGMPHYSHANDLERTYPE hType, 2265 RTR3PTR pvUserR3, RTR0PTR pvUserR0, RTRCPTR pvUserRC, const char *pszDesc)2263 uint64_t uUser, const char *pszDesc) 2266 2264 { 2267 2265 /* … … 2403 2401 * Register the access handler. 2404 2402 */ 2405 rc = PGMHandlerPhysicalRegister(pVM, GCPhys, GCPhysLast, hType, pvUserR3, pvUserR0, pvUserRC, pszDesc);2403 rc = PGMHandlerPhysicalRegister(pVM, GCPhys, GCPhysLast, hType, uUser, pszDesc); 2406 2404 if (RT_SUCCESS(rc)) 2407 2405 { … … 2847 2845 2848 2846 { 2849 rc = pgmHandlerPhysicalExCreate(pVM, pVM->pgm.s.hMmio2DirtyPhysHandlerType, 2850 (RTR3PTR)(uintptr_t)idMmio2, idMmio2, idMmio2, pszDesc, &pNew->pPhysHandlerR3); 2847 rc = pgmHandlerPhysicalExCreate(pVM, pVM->pgm.s.hMmio2DirtyPhysHandlerType, idMmio2, pszDesc, &pNew->pPhysHandlerR3); 2851 2848 AssertLogRelMsgRCBreak(rc, ("idMmio2=%zu\n", idMmio2)); 2852 2849 } … … 4518 4515 * Register the ROM access handler. 4519 4516 */ 4520 rc = PGMHandlerPhysicalRegister(pVM, GCPhys, GCPhysLast, pVM->pgm.s.hRomPhysHandlerType, 4521 pRomNew, pRomNewR0, NIL_RTRCPTR, pszDesc); 4517 rc = PGMHandlerPhysicalRegister(pVM, GCPhys, GCPhysLast, pVM->pgm.s.hRomPhysHandlerType, GCPhys, pszDesc); 4522 4518 if (RT_SUCCESS(rc)) 4523 4519 { -
trunk/src/VBox/VMM/VMMR3/PGMPool.cpp
r93617 r93635 283 283 284 284 pPool->hAccessHandlerType = NIL_PGMPHYSHANDLERTYPE; 285 rc = PGMR3HandlerPhysicalTypeRegister(pVM, PGMPHYSHANDLERKIND_WRITE, true /*fKeepPgmLock*/,285 rc = PGMR3HandlerPhysicalTypeRegister(pVM, PGMPHYSHANDLERKIND_WRITE, PGMPHYSHANDLER_F_KEEP_PGM_LOCK, 286 286 pgmPoolAccessHandler, 287 287 NULL, "pgmPoolAccessHandler", "pgmRZPoolAccessPfHandler", -
trunk/src/VBox/VMM/include/PDMInternal.h
r93633 r93635 1433 1433 1434 1434 1435 /** Max number of ring-0 device instances. */ 1436 #define PDM_MAX_RING0_DEVICE_INSTANCES 190 1437 1438 1435 1439 /** 1436 1440 * PDM VM Instance data. … … 1470 1474 R3PTRTYPE(PPDMDEV) pDevs; 1471 1475 /** List of devices instances. (FIFO) */ 1472 R3PTRTYPE(PPDMDEVINS) pDevInstances; 1476 PPDMDEVINSR3 pDevInstances; 1477 /** This runs parallel to PDMR0PERVM::apDevInstances and is used with 1478 * physical access handlers to get the ring-3 device instance for passing down 1479 * as uUser. */ 1480 PPDMDEVINSR3 apDevRing0Instances[PDM_MAX_RING0_DEVICE_INSTANCES]; 1481 1473 1482 /** List of registered USB devices. (FIFO) */ 1474 1483 R3PTRTYPE(PPDMUSB) pUsbDevs; … … 1556 1565 bool volatile fNsUnchokeTimerArmed; 1557 1566 /** Align aNsGroups on a cacheline. */ 1558 bool afPadding2[19 ];1567 bool afPadding2[19+16]; 1559 1568 /** Number of network shaper groups. 1560 1569 * @note Marked volatile to prevent re-reading after validation. */ … … 1613 1622 uint32_t u32Padding1; 1614 1623 /** Pointer to ring-0 device instances. */ 1615 R0PTRTYPE(struct PDMDEVINSR0 *) apDevInstances[ 190];1624 R0PTRTYPE(struct PDMDEVINSR0 *) apDevInstances[PDM_MAX_RING0_DEVICE_INSTANCES]; 1616 1625 /** Number of valid ring-0 queue instances (aQueues). */ 1617 1626 uint32_t cQueues; -
trunk/src/VBox/VMM/include/PGMInternal.h
r93624 r93635 498 498 /** The PGM_PAGE_HNDL_PHYS_STATE_XXX value corresponding to enmKind. */ 499 499 uint8_t uState; 500 /** Whether to keep the PGM lock when calling the handler. */ 500 /** Whether to keep the PGM lock when calling the handler. 501 * @sa PGMPHYSHANDLER_F_KEEP_PGM_LOCK */ 501 502 bool fKeepPgmLock; 502 bool afPadding[2]; 503 /** Set if this is registered by a device instance and uUser should be 504 * translated from a device instance ID to a pointer. 505 * @sa PGMPHYSHANDLER_F_R0_DEVINS_IDX */ 506 bool fRing0DevInsIdx; 507 bool afPadding[1]; 503 508 /** Pointer to R3 callback function. */ 504 509 R3PTRTYPE(PFNPGMPHYSHANDLER) pfnHandlerR3; … … 543 548 /** Registered handler type handle (heap offset). */ 544 549 PGMPHYSHANDLERTYPE hType; 545 /** User argument for R3 handlers. */ 546 R3PTRTYPE(void *) pvUserR3; 547 /** User argument for R0 handlers. */ 548 R0PTRTYPE(void *) pvUserR0; 550 /** User argument for the handlers. */ 551 uint64_t uUser; 549 552 /** Description / Name. For easing debugging. */ 550 553 R3PTRTYPE(const char *) pszDesc; … … 3569 3572 #define PGM_LOCK_ASSERT_OWNER_EX(a_pVM, a_pVCpu) Assert(PDMCritSectIsOwnerEx((a_pVCpu), &(a_pVM)->pgm.s.CritSectX)) 3570 3573 3571 int pgmHandlerPhysicalExCreate(PVMCC pVM, PGMPHYSHANDLERTYPE hType, RTR3PTR pvUserR3, RTR0PTR pvUserR0,3572 R TRCPTR pvUserRC, R3PTRTYPE(const char *) pszDesc, PPGMPHYSHANDLER *ppPhysHandler);3574 int pgmHandlerPhysicalExCreate(PVMCC pVM, PGMPHYSHANDLERTYPE hType, uint64_t uUser, 3575 R3PTRTYPE(const char *) pszDesc, PPGMPHYSHANDLER *ppPhysHandler); 3573 3576 int pgmHandlerPhysicalExDup(PVMCC pVM, PPGMPHYSHANDLER pPhysHandlerSrc, PPGMPHYSHANDLER *ppPhysHandler); 3574 3577 int pgmHandlerPhysicalExRegister(PVMCC pVM, PPGMPHYSHANDLER pPhysHandler, RTGCPHYS GCPhys, RTGCPHYS GCPhysLast);
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