- Timestamp:
- Mar 12, 2022 8:12:21 PM (3 years ago)
- Location:
- trunk/src/VBox/Devices
- Files:
-
- 9 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/Devices/Graphics/DevVGA-SVGA-cmd.cpp
r94146 r94205 815 815 816 816 817 int vmsvgaR3OTableReadSurface(PVMSVGAR3STATE pSvgaR3State, uint32_t sid, SVGAOTableSurfaceEntry *pEntrySurface) 818 { 819 return vmsvgaR3OTableRead(pSvgaR3State, &pSvgaR3State->aGboOTables[SVGA_OTABLE_SURFACE], 820 sid, SVGA3D_OTABLE_SURFACE_ENTRY_SIZE, pEntrySurface, sizeof(SVGAOTableSurfaceEntry)); 821 } 822 823 817 824 /* 818 825 * … … 877 884 878 885 879 staticPVMSVGAMOB vmsvgaR3MobGet(PVMSVGAR3STATE pSvgaR3State, SVGAMobId RT_UNTRUSTED_GUEST mobid)886 PVMSVGAMOB vmsvgaR3MobGet(PVMSVGAR3STATE pSvgaR3State, SVGAMobId RT_UNTRUSTED_GUEST mobid) 880 887 { 881 888 if (mobid == SVGA_ID_INVALID) … … 1511 1518 offMob += dims.cbPitch; 1512 1519 } 1520 /** @todo Take into account map.cbDepthPitch */ 1513 1521 } 1514 1522 -
trunk/src/VBox/Devices/Graphics/DevVGA-SVGA.cpp
r94101 r94205 409 409 SSMFIELD_ENTRY_IGNORE( VMSVGAState, fFifoExtCommandWakeup), 410 410 SSMFIELD_ENTRY_IGNORE( VMSVGAState, cGMR), 411 SSMFIELD_ENTRY_VER( VMSVGAState, au32DevCaps, VGA_SAVEDSTATE_VERSION_VMSVGA_DX), 412 SSMFIELD_ENTRY_VER( VMSVGAState, u32DevCapIndex, VGA_SAVEDSTATE_VERSION_VMSVGA_DX), 413 SSMFIELD_ENTRY_VER( VMSVGAState, u32RegCommandLow, VGA_SAVEDSTATE_VERSION_VMSVGA_DX), 414 SSMFIELD_ENTRY_VER( VMSVGAState, u32RegCommandHigh, VGA_SAVEDSTATE_VERSION_VMSVGA_DX), 415 411 416 SSMFIELD_ENTRY_TERM() 412 417 }; … … 3955 3960 # ifdef VBOX_WITH_VMSVGA3D 3956 3961 if (pThis->svga.f3DEnabled) 3957 vmsvga3dSaveExec(pDevIns, pThisCC, pSSM); 3962 { 3963 if (vmsvga3dIsLegacyBackend(pThisCC)) 3964 vmsvga3dSaveExec(pDevIns, pThisCC, pSSM); 3965 else 3966 vmsvga3dDXSaveExec(pDevIns, pThisCC, pSSM); 3967 } 3958 3968 # endif 3959 3969 break; … … 3976 3986 # endif 3977 3987 3978 vmsvga3dLoadExec(pDevIns, pThis, pThisCC, pLoadState->pSSM, pLoadState->uVersion, pLoadState->uPass); 3988 if (vmsvga3dIsLegacyBackend(pThisCC)) 3989 vmsvga3dLoadExec(pDevIns, pThis, pThisCC, pLoadState->pSSM, pLoadState->uVersion, pLoadState->uPass); 3990 else 3991 vmsvga3dDXLoadExec(pDevIns, pThis, pThisCC, pLoadState->pSSM, pLoadState->uVersion, pLoadState->uPass); 3979 3992 } 3980 3993 # endif … … 5441 5454 } 5442 5455 5456 static int vmsvgaR3LoadBufCtx(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, PVMSVGACMDBUFCTX pBufCtx) 5457 { 5458 PCPDMDEVHLPR3 pHlp = pDevIns->pHlpR3; 5459 5460 int rc = pHlp->pfnSSMGetU32(pSSM, &pBufCtx->cSubmitted); 5461 AssertLogRelRCReturn(rc, rc); 5462 5463 for (uint32_t i = 0; i < pBufCtx->cSubmitted; ++i) 5464 { 5465 PVMSVGACMDBUF pCmdBuf = vmsvgaR3CmdBufAlloc(pBufCtx); 5466 AssertPtrReturn(pCmdBuf, VERR_NO_MEMORY); 5467 5468 pHlp->pfnSSMGetGCPhys(pSSM, &pCmdBuf->GCPhysCB); 5469 5470 uint32_t u32; 5471 rc = pHlp->pfnSSMGetU32(pSSM, &u32); 5472 AssertRCReturn(rc, rc); 5473 AssertReturn(u32 == sizeof(SVGACBHeader), VERR_INVALID_STATE); 5474 pHlp->pfnSSMGetMem(pSSM, &pCmdBuf->hdr, sizeof(SVGACBHeader)); 5475 5476 rc = pHlp->pfnSSMGetU32(pSSM, &u32); 5477 AssertRCReturn(rc, rc); 5478 AssertReturn(u32 == pCmdBuf->hdr.length, VERR_INVALID_STATE); 5479 5480 pCmdBuf->pvCommands = RTMemAlloc(pCmdBuf->hdr.length); 5481 AssertPtrReturn(pCmdBuf->pvCommands, VERR_NO_MEMORY); 5482 5483 rc = pHlp->pfnSSMGetMem(pSSM, pCmdBuf->pvCommands, pCmdBuf->hdr.length); 5484 AssertRCReturn(rc, rc); 5485 } 5486 return rc; 5487 } 5488 5489 static int vmsvgaR3LoadGbo(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, VMSVGAGBO *pGbo) 5490 { 5491 PCPDMDEVHLPR3 pHlp = pDevIns->pHlpR3; 5492 5493 int rc; 5494 pHlp->pfnSSMGetU32(pSSM, &pGbo->fGboFlags); 5495 pHlp->pfnSSMGetU32(pSSM, &pGbo->cTotalPages); 5496 pHlp->pfnSSMGetU32(pSSM, &pGbo->cbTotal); 5497 rc = pHlp->pfnSSMGetU32(pSSM, &pGbo->cDescriptors); 5498 AssertRCReturn(rc, rc); 5499 5500 if (pGbo->cDescriptors) 5501 { 5502 pGbo->paDescriptors = (PVMSVGAGBODESCRIPTOR)RTMemAllocZ(pGbo->cDescriptors * sizeof(VMSVGAGBODESCRIPTOR)); 5503 AssertPtrReturn(pGbo->paDescriptors, VERR_NO_MEMORY); 5504 } 5505 5506 for (uint32_t iDesc = 0; iDesc < pGbo->cDescriptors; ++iDesc) 5507 { 5508 PVMSVGAGBODESCRIPTOR pDesc = &pGbo->paDescriptors[iDesc]; 5509 pHlp->pfnSSMGetGCPhys(pSSM, &pDesc->GCPhys); 5510 rc = pHlp->pfnSSMGetU64(pSSM, &pDesc->cPages); 5511 } 5512 5513 if (pGbo->fGboFlags & VMSVGAGBO_F_HOST_BACKED) 5514 { 5515 pGbo->pvHost = RTMemAlloc(pGbo->cbTotal); 5516 AssertPtrReturn(pGbo->pvHost, VERR_NO_MEMORY); 5517 rc = pHlp->pfnSSMGetMem(pSSM, pGbo->pvHost, pGbo->cbTotal); 5518 } 5519 5520 return rc; 5521 } 5522 5443 5523 /** 5444 5524 * Portion of VMSVGA state which must be loaded oin the FIFO thread. … … 5474 5554 *pScreen = screen; 5475 5555 pScreen->fModified = true; 5556 5557 if (uVersion >= VGA_SAVEDSTATE_VERSION_VMSVGA_DX) 5558 { 5559 uint32_t u32; 5560 pHlp->pfnSSMGetU32(pSSM, &u32); /* Size of screen bitmap. */ 5561 AssertLogRelRCReturn(rc, rc); 5562 if (u32) 5563 { 5564 pScreen->pvScreenBitmap = RTMemAlloc(u32); 5565 AssertPtrReturn(pScreen->pvScreenBitmap, VERR_NO_MEMORY); 5566 5567 pHlp->pfnSSMGetMem(pSSM, pScreen->pvScreenBitmap, u32); 5568 } 5569 } 5476 5570 } 5477 5571 else … … 5594 5688 } 5595 5689 5690 if (uVersion >= VGA_SAVEDSTATE_VERSION_VMSVGA_DX) 5691 { 5692 bool f; 5693 uint32_t u32; 5694 5695 rc = pHlp->pfnSSMGetBool(pSSM, &f); 5696 AssertLogRelRCReturn(rc, rc); 5697 AssertReturn(f == pThis->fVMSVGA10, VERR_INVALID_STATE); 5698 5699 if (pThis->fVMSVGA10) 5700 { 5701 /* Device context command buffers. */ 5702 rc = vmsvgaR3LoadBufCtx(pDevIns, pSSM, &pSVGAState->CmdBufCtxDC); 5703 AssertLogRelRCReturn(rc, rc); 5704 5705 /* DX contexts command buffers. */ 5706 uint32_t cBufCtx; 5707 rc = pHlp->pfnSSMGetU32(pSSM, &cBufCtx); 5708 AssertLogRelRCReturn(rc, rc); 5709 AssertReturn(cBufCtx == RT_ELEMENTS(pSVGAState->apCmdBufCtxs), VERR_INVALID_STATE); 5710 for (uint32_t j = 0; j < cBufCtx; ++j) 5711 { 5712 rc = pHlp->pfnSSMGetBool(pSSM, &f); 5713 AssertLogRelRCReturn(rc, rc); 5714 if (f) 5715 { 5716 pSVGAState->apCmdBufCtxs[j] = (PVMSVGACMDBUFCTX)RTMemAlloc(sizeof(VMSVGACMDBUFCTX)); 5717 AssertPtrReturn(pSVGAState->apCmdBufCtxs[j], VERR_NO_MEMORY); 5718 vmsvgaR3CmdBufCtxInit(pSVGAState->apCmdBufCtxs[j]); 5719 5720 rc = vmsvgaR3LoadBufCtx(pDevIns, pSSM, pSVGAState->apCmdBufCtxs[j]); 5721 AssertLogRelRCReturn(rc, rc); 5722 } 5723 } 5724 5725 rc = pHlp->pfnSSMGetU32(pSSM, &u32); 5726 pSVGAState->fCmdBuf = u32; 5727 5728 /* 5729 * OTables GBOs. 5730 */ 5731 rc = pHlp->pfnSSMGetU32(pSSM, &u32); 5732 AssertLogRelRCReturn(rc, rc); 5733 AssertReturn(u32 == SVGA_OTABLE_MAX, VERR_INVALID_STATE); 5734 for (int i = 0; i < SVGA_OTABLE_MAX; ++i) 5735 { 5736 VMSVGAGBO *pGbo = &pSVGAState->aGboOTables[i]; 5737 rc = vmsvgaR3LoadGbo(pDevIns, pSSM, pGbo); 5738 AssertRCReturn(rc, rc); 5739 } 5740 5741 /* 5742 * MOBs. 5743 */ 5744 for (;;) 5745 { 5746 rc = pHlp->pfnSSMGetU32(pSSM, &u32); /* MOB id. */ 5747 AssertRCReturn(rc, rc); 5748 if (u32 == SVGA_ID_INVALID) 5749 break; 5750 5751 PVMSVGAMOB pMob = (PVMSVGAMOB)RTMemAllocZ(sizeof(*pMob)); 5752 AssertPtrReturn(pMob, VERR_NO_MEMORY); 5753 5754 rc = vmsvgaR3LoadGbo(pDevIns, pSSM, &pMob->Gbo); 5755 AssertRCReturn(rc, rc); 5756 5757 pMob->Core.Key = u32; 5758 if (RTAvlU32Insert(&pSVGAState->MOBTree, &pMob->Core)) 5759 RTListPrepend(&pSVGAState->MOBLRUList, &pMob->nodeLRU); 5760 else 5761 AssertFailedReturn(VERR_NO_MEMORY); 5762 } 5763 5764 # ifdef VMSVGA3D_DX 5765 if (pThis->svga.f3DEnabled) 5766 { 5767 pHlp->pfnSSMGetU32(pSSM, &pSVGAState->idDXContextCurrent); 5768 } 5769 # endif 5770 } 5771 } 5772 5596 5773 # ifdef RT_OS_DARWIN /** @todo r=bird: this is normally done on the EMT, so for DARWIN we do that when loading saved state too now. See DevVGA-SVGA3d-shared.h. */ 5597 5774 if (pThis->svga.f3DEnabled) … … 5662 5839 } 5663 5840 5841 static int vmsvgaR3SaveBufCtx(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, PVMSVGACMDBUFCTX pBufCtx) 5842 { 5843 PCPDMDEVHLPR3 pHlp = pDevIns->pHlpR3; 5844 5845 int rc = pHlp->pfnSSMPutU32(pSSM, pBufCtx->cSubmitted); 5846 AssertLogRelRCReturn(rc, rc); 5847 if (pBufCtx->cSubmitted) 5848 { 5849 PVMSVGACMDBUF pIter; 5850 RTListForEach(&pBufCtx->listSubmitted, pIter, VMSVGACMDBUF, nodeBuffer) 5851 { 5852 pHlp->pfnSSMPutGCPhys(pSSM, pIter->GCPhysCB); 5853 pHlp->pfnSSMPutU32(pSSM, sizeof(SVGACBHeader)); 5854 pHlp->pfnSSMPutMem(pSSM, &pIter->hdr, sizeof(SVGACBHeader)); 5855 pHlp->pfnSSMPutU32(pSSM, pIter->hdr.length); 5856 rc = pHlp->pfnSSMPutMem(pSSM, pIter->pvCommands, pIter->hdr.length); 5857 AssertLogRelRCReturn(rc, rc); 5858 } 5859 } 5860 return rc; 5861 } 5862 5863 static int vmsvgaR3SaveGbo(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, VMSVGAGBO *pGbo) 5864 { 5865 PCPDMDEVHLPR3 pHlp = pDevIns->pHlpR3; 5866 5867 int rc; 5868 pHlp->pfnSSMPutU32(pSSM, pGbo->fGboFlags); 5869 pHlp->pfnSSMPutU32(pSSM, pGbo->cTotalPages); 5870 pHlp->pfnSSMPutU32(pSSM, pGbo->cbTotal); 5871 rc = pHlp->pfnSSMPutU32(pSSM, pGbo->cDescriptors); 5872 for (uint32_t iDesc = 0; iDesc < pGbo->cDescriptors; ++iDesc) 5873 { 5874 PVMSVGAGBODESCRIPTOR pDesc = &pGbo->paDescriptors[iDesc]; 5875 pHlp->pfnSSMPutGCPhys(pSSM, pDesc->GCPhys); 5876 rc = pHlp->pfnSSMPutU64(pSSM, pDesc->cPages); 5877 } 5878 if (pGbo->fGboFlags & VMSVGAGBO_F_HOST_BACKED) 5879 rc = pHlp->pfnSSMPutMem(pSSM, pGbo->pvHost, pGbo->cbTotal); 5880 return rc; 5881 } 5882 5664 5883 /** 5665 5884 * Portion of SVGA state which must be saved in the FIFO thread. … … 5682 5901 AssertLogRelRCReturn(rc, rc); 5683 5902 5684 for (uint32_t i = 0; i < cScreens; ++i)5903 for (uint32_t i = 0; i < RT_ELEMENTS(pSVGAState->aScreens); ++i) 5685 5904 { 5686 5905 VMSVGASCREENOBJECT *pScreen = &pSVGAState->aScreens[i]; 5906 if (!pScreen->fDefined) 5907 continue; 5687 5908 5688 5909 rc = pHlp->pfnSSMPutStructEx(pSSM, pScreen, sizeof(*pScreen), 0, g_aVMSVGASCREENOBJECTFields, NULL); 5689 5910 AssertLogRelRCReturn(rc, rc); 5911 5912 /* 5913 * VGA_SAVEDSTATE_VERSION_VMSVGA_DX 5914 */ 5915 if (pScreen->pvScreenBitmap) 5916 { 5917 uint32_t const cbScreenBitmap = pScreen->cHeight * pScreen->cbPitch; 5918 pHlp->pfnSSMPutU32(pSSM, cbScreenBitmap); 5919 pHlp->pfnSSMPutMem(pSSM, pScreen->pvScreenBitmap, cbScreenBitmap); 5920 } 5921 else 5922 pHlp->pfnSSMPutU32(pSSM, 0); 5690 5923 } 5691 5924 return VINF_SUCCESS; … … 5738 5971 AssertLogRelRCReturn(rc, rc); 5739 5972 } 5973 } 5974 5975 /* 5976 * VGA_SAVEDSTATE_VERSION_VMSVGA_DX 5977 */ 5978 5979 rc = pHlp->pfnSSMPutBool(pSSM, pThis->fVMSVGA10); 5980 AssertLogRelRCReturn(rc, rc); 5981 5982 if (pThis->fVMSVGA10) 5983 { 5984 /* Device context command buffers. */ 5985 rc = vmsvgaR3SaveBufCtx(pDevIns, pSSM, &pSVGAState->CmdBufCtxDC); 5986 AssertRCReturn(rc, rc); 5987 5988 /* DX contexts command buffers. */ 5989 rc = pHlp->pfnSSMPutU32(pSSM, RT_ELEMENTS(pSVGAState->apCmdBufCtxs)); 5990 AssertLogRelRCReturn(rc, rc); 5991 for (unsigned i = 0; i < RT_ELEMENTS(pSVGAState->apCmdBufCtxs); ++i) 5992 { 5993 if (pSVGAState->apCmdBufCtxs[i]) 5994 { 5995 pHlp->pfnSSMPutBool(pSSM, true); 5996 rc = vmsvgaR3SaveBufCtx(pDevIns, pSSM, pSVGAState->apCmdBufCtxs[i]); 5997 AssertRCReturn(rc, rc); 5998 } 5999 else 6000 pHlp->pfnSSMPutBool(pSSM, false); 6001 } 6002 6003 rc = pHlp->pfnSSMPutU32(pSSM, pSVGAState->fCmdBuf); 6004 AssertRCReturn(rc, rc); 6005 6006 /* 6007 * OTables GBOs. 6008 */ 6009 pHlp->pfnSSMPutU32(pSSM, SVGA_OTABLE_MAX); 6010 for (int i = 0; i < SVGA_OTABLE_MAX; ++i) 6011 { 6012 VMSVGAGBO *pGbo = &pSVGAState->aGboOTables[i]; 6013 rc = vmsvgaR3SaveGbo(pDevIns, pSSM, pGbo); 6014 AssertRCReturn(rc, rc); 6015 } 6016 6017 /* 6018 * MOBs. 6019 */ 6020 PVMSVGAMOB pIter; 6021 RTListForEach(&pSVGAState->MOBLRUList, pIter, VMSVGAMOB, nodeLRU) 6022 { 6023 pHlp->pfnSSMPutU32(pSSM, pIter->Core.Key); /* MOB id. */ 6024 rc = vmsvgaR3SaveGbo(pDevIns, pSSM, &pIter->Gbo); 6025 AssertRCReturn(rc, rc); 6026 } 6027 6028 pHlp->pfnSSMPutU32(pSSM, SVGA_ID_INVALID); /* End marker. */ 6029 6030 # ifdef VMSVGA3D_DX 6031 if (pThis->svga.f3DEnabled) 6032 { 6033 pHlp->pfnSSMPutU32(pSSM, pSVGAState->idDXContextCurrent); 6034 } 6035 # endif 5740 6036 } 5741 6037 -
trunk/src/VBox/Devices/Graphics/DevVGA-SVGA.h
r93650 r94205 616 616 #define VMSVGA_IS_GBO_CREATED(a_Gbo) ((a_Gbo)->paDescriptors != NULL) 617 617 618 int vmsvgaR3OTableReadSurface(PVMSVGAR3STATE pSvgaR3State, uint32_t sid, SVGAOTableSurfaceEntry *pEntrySurface); 619 618 620 /* MOB is also a GBO. 619 621 */ … … 626 628 typedef VMSVGAMOB const *PCVMSVGAMOB; 627 629 630 PVMSVGAMOB vmsvgaR3MobGet(PVMSVGAR3STATE pSvgaR3State, SVGAMobId RT_UNTRUSTED_GUEST mobid); 628 631 int vmsvgaR3MobBackingStoreCreate(PVMSVGAR3STATE pSvgaR3State, PVMSVGAMOB pMob, uint32_t cbValid); 629 632 void vmsvgaR3MobBackingStoreDelete(PVMSVGAR3STATE pSvgaR3State, PVMSVGAMOB pMob); -
trunk/src/VBox/Devices/Graphics/DevVGA-SVGA3d-dx-savedstate.cpp
r94196 r94205 134 134 AssertReturn(u32 == RT_ELEMENTS(pDXContext->aCOTMobs), VERR_INVALID_STATE); 135 135 136 for ( inti = 0; i < RT_ELEMENTS(pDXContext->aCOTMobs); ++i)136 for (unsigned i = 0; i < RT_ELEMENTS(pDXContext->aCOTMobs); ++i) 137 137 { 138 138 rc = pHlp->pfnSSMGetU32(pSSM, &u32); … … 165 165 166 166 AssertCompile(RT_ELEMENTS(cot) == RT_ELEMENTS(pDXContext->aCOTMobs)); 167 for ( inti = 0; i < RT_ELEMENTS(cot); ++i)167 for (unsigned i = 0; i < RT_ELEMENTS(cot); ++i) 168 168 { 169 169 uint32_t cEntries; … … 367 367 rc = pHlp->pfnSSMPutU32(pSSM, RT_ELEMENTS(pDXContext->aCOTMobs)); 368 368 AssertLogRelRCReturn(rc, rc); 369 for ( inti = 0; i < RT_ELEMENTS(pDXContext->aCOTMobs); ++i)369 for (unsigned i = 0; i < RT_ELEMENTS(pDXContext->aCOTMobs); ++i) 370 370 { 371 371 uint32_t const mobId = vmsvgaR3MobId(pDXContext->aCOTMobs[i]); … … 396 396 397 397 AssertCompile(RT_ELEMENTS(cot) == RT_ELEMENTS(pDXContext->aCOTMobs)); 398 for ( inti = 0; i < RT_ELEMENTS(cot); ++i)398 for (unsigned i = 0; i < RT_ELEMENTS(cot); ++i) 399 399 { 400 400 pHlp->pfnSSMPutU32(pSSM, cot[i].cEntries); -
trunk/src/VBox/Devices/Graphics/DevVGA-SVGA3d-dx.cpp
r94146 r94205 121 121 ; 122 122 123 LogFunc(("cid = %d, state = 0x%08X\n", cid, u32TrackedState)); 123 124 124 125 if (u32TrackedState & DX_STATE_VS) … … 438 439 439 440 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyContext(pThisCC, pDXContext); 441 442 RT_ZERO(*pDXContext); 443 pDXContext->cid = SVGA3D_INVALID_ID; 444 440 445 return rc; 441 446 } -
trunk/src/VBox/Devices/Graphics/DevVGA-SVGA3d-win-dx.cpp
r94151 r94205 1837 1837 pSurface->pBackendSurface = pBackendSurface; 1838 1838 pSurface->idAssociatedContext = DX_CID_BACKEND; 1839 pSurface->fDirty = true;1840 1839 return VINF_SUCCESS; 1841 1840 } … … 1927 1926 * Create the texture in backend device and open for the specified context. 1928 1927 */ 1928 D3D11_SUBRESOURCE_DATA *paInitialData = NULL; 1929 D3D11_SUBRESOURCE_DATA aInitialData[SVGA3D_MAX_MIP_LEVELS]; 1930 if (pSurface->paMipmapLevels[0].pSurfaceData) 1931 { 1932 /** @todo Can happen for a non GBO surface or if GBO texture was updated prior to creation if the hardware resource. Test this. */ 1933 for (uint32_t i = 0; i < numMipLevels; ++i) 1934 { 1935 PVMSVGA3DMIPMAPLEVEL pMipmapLevel = &pSurface->paMipmapLevels[i]; 1936 D3D11_SUBRESOURCE_DATA *p = &aInitialData[i]; 1937 p->pSysMem = pMipmapLevel->pSurfaceData; 1938 p->SysMemPitch = pMipmapLevel->cbSurfacePitch; 1939 p->SysMemSlicePitch = pMipmapLevel->cbSurfacePlane; 1940 } 1941 paInitialData = &aInitialData[0]; 1942 } 1943 1929 1944 D3D11_TEXTURE2D_DESC td; 1930 1945 RT_ZERO(td); … … 1942 1957 td.MiscFlags = MiscFlags; 1943 1958 1944 hr = pDXDevice->pDevice->CreateTexture2D(&td, 0, &pBackendSurface->u.pTexture2D);1959 hr = pDXDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->u.pTexture2D); 1945 1960 Assert(SUCCEEDED(hr)); 1946 1961 if (SUCCEEDED(hr)) … … 1951 1966 td.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE; 1952 1967 td.MiscFlags = 0; 1953 hr = pDXDevice->pDevice->CreateTexture2D(&td, 0, &pBackendSurface->pDynamicTexture);1968 hr = pDXDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->pDynamicTexture); 1954 1969 Assert(SUCCEEDED(hr)); 1955 1970 } … … 1961 1976 td.BindFlags = 0; /* No flags allowed. */ 1962 1977 td.CPUAccessFlags = D3D11_CPU_ACCESS_READ | D3D11_CPU_ACCESS_WRITE; 1963 hr = pDXDevice->pDevice->CreateTexture2D(&td, 0, &pBackendSurface->pStagingTexture);1978 hr = pDXDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->pStagingTexture); 1964 1979 Assert(SUCCEEDED(hr)); 1965 1980 } … … 2525 2540 2526 2541 pInitialData = &initialData; 2527 2528 pMipLevel->fDirty = false;2529 pSurface->fDirty = false;2530 2542 } 2531 2543 … … 2594 2606 pSurface->pBackendSurface = pBackendSurface; 2595 2607 pSurface->idAssociatedContext = pDXContext->cid; 2596 pSurface->fDirty = true;2597 2608 return VINF_SUCCESS; 2598 2609 } … … 2638 2649 2639 2650 pInitialData = &initialData; 2640 2641 pMipLevel->fDirty = false;2642 pSurface->fDirty = false;2643 2651 } 2644 2652 … … 5112 5120 if (pSurface->idAssociatedContext == pDXContext->cid) 5113 5121 { 5114 Assert(pSurface->pBackendSurface);5115 vmsvga3dBackSurfaceDestroy(pThisCC, pSurface);5122 if (pSurface->pBackendSurface) 5123 vmsvga3dBackSurfaceDestroy(pThisCC, pSurface); 5116 5124 } 5117 5125 else if (pSurface->idAssociatedContext == DX_CID_BACKEND) 5118 5126 { 5119 5127 /* May have shared resources in this context. */ 5120 Assert(pSurface->pBackendSurface); 5121 DXSHAREDTEXTURE *pSharedTexture = (DXSHAREDTEXTURE *)RTAvlU32Get(&pSurface->pBackendSurface->SharedTextureTree, pDXContext->cid); 5122 if (pSharedTexture) 5128 if (pSurface->pBackendSurface) 5123 5129 { 5124 Assert(pSharedTexture->sid == sid); 5125 RTAvlU32Remove(&pSurface->pBackendSurface->SharedTextureTree, pDXContext->cid); 5126 D3D_RELEASE(pSharedTexture->pTexture); 5127 RTMemFreeZ(pSharedTexture, sizeof(*pSharedTexture)); 5130 DXSHAREDTEXTURE *pSharedTexture = (DXSHAREDTEXTURE *)RTAvlU32Get(&pSurface->pBackendSurface->SharedTextureTree, pDXContext->cid); 5131 if (pSharedTexture) 5132 { 5133 Assert(pSharedTexture->sid == sid); 5134 RTAvlU32Remove(&pSurface->pBackendSurface->SharedTextureTree, pDXContext->cid); 5135 D3D_RELEASE(pSharedTexture->pTexture); 5136 RTMemFreeZ(pSharedTexture, sizeof(*pSharedTexture)); 5137 } 5128 5138 } 5129 5139 } … … 5937 5947 AssertRCReturn(rc, rc); 5938 5948 } 5939 #if 05940 if (pSurface->fDirty)5941 {5942 /* Get mobid for the surface and read from the MOB. */5943 SVGA3dSurfaceImageId imageId;5944 imageId.sid = paVertexBuffer[i].sid;5945 imageId.face = 0;5946 imageId.mipmap = 0;5947 5948 SVGA3dBox box;5949 box.x = 0;5950 box.y = 0;5951 box.z = 0;5952 box.w = pSurface->paMipmapLevels[0].mipmapSize.width;5953 box.h = 1;5954 box.d = 1;5955 5956 rc = vmsvgaR3UpdateGBSurface(pThisCC, &imageId, &box);5957 AssertRCReturn(rc, rc);5958 }5959 #endif5960 5949 5961 5950 Assert(pSurface->pBackendSurface->u.pBuffer); … … 6003 5992 AssertRCReturn(rc, rc); 6004 5993 } 6005 #if 0 6006 if (pSurface->fDirty) 6007 { 6008 /* Get mobid for the surface and read from the MOB. */ 6009 SVGA3dSurfaceImageId imageId; 6010 imageId.sid = sid; 6011 imageId.face = 0; 6012 imageId.mipmap = 0; 6013 6014 SVGA3dBox box; 6015 box.x = 0; 6016 box.y = 0; 6017 box.z = 0; 6018 box.w = pSurface->paMipmapLevels[0].mipmapSize.width; 6019 box.h = 1; 6020 box.d = 1; 6021 6022 rc = vmsvgaR3UpdateGBSurface(pThisCC, &imageId, &box); 6023 AssertRCReturn(rc, rc); 6024 } 6025 #endif 5994 6026 5995 pResource = pSurface->pBackendSurface->u.pBuffer; 6027 5996 enmDxgiFormat = vmsvgaDXSurfaceFormat2Dxgi(format); … … 7058 7027 continue; /* Skip uninitialized entry. */ 7059 7028 7029 /* Define views which were not defined yet in backend. */ 7060 7030 DXVIEW *pDXView = &pBackendDXContext->paRenderTargetView[i]; 7061 7031 /** @todo Verify that the pEntry content still corresponds to the view. */ 7062 7032 if (pDXView->u.pView) 7063 7033 dxViewAddToList(pThisCC, pDXView); 7034 else if (pDXView->enmViewType == VMSVGA3D_VIEWTYPE_NONE) 7035 dxDefineRenderTargetView(pThisCC, pDXContext, i, pEntry); 7064 7036 } 7065 7037 break; … … 7087 7059 continue; /* Skip uninitialized entry. */ 7088 7060 7061 /* Define views which were not defined yet in backend. */ 7089 7062 DXVIEW *pDXView = &pBackendDXContext->paDepthStencilView[i]; 7090 7063 /** @todo Verify that the pEntry content still corresponds to the view. */ 7091 7064 if (pDXView->u.pView) 7092 7065 dxViewAddToList(pThisCC, pDXView); 7066 else if (pDXView->enmViewType == VMSVGA3D_VIEWTYPE_NONE) 7067 dxDefineDepthStencilView(pThisCC, pDXContext, i, pEntry); 7093 7068 } 7094 7069 break; … … 7116 7091 continue; /* Skip uninitialized entry. */ 7117 7092 7093 /* Define views which were not defined yet in backend. */ 7118 7094 DXVIEW *pDXView = &pBackendDXContext->paShaderResourceView[i]; 7119 7095 /** @todo Verify that the pEntry content still corresponds to the view. */ 7120 7096 if (pDXView->u.pView) 7121 7097 dxViewAddToList(pThisCC, pDXView); 7098 else if (pDXView->enmViewType == VMSVGA3D_VIEWTYPE_NONE) 7099 dxDefineShaderResourceView(pThisCC, pDXContext, i, pEntry); 7122 7100 } 7123 7101 break; … … 7841 7819 7842 7820 7821 static DECLCALLBACK(int) vmsvga3dBackDXLoadState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PCPDMDEVHLPR3 pHlp, PSSMHANDLE pSSM) 7822 { 7823 RT_NOREF(pThisCC); 7824 uint32_t u32; 7825 int rc; 7826 7827 rc = pHlp->pfnSSMGetU32(pSSM, &u32); 7828 AssertLogRelRCReturn(rc, rc); 7829 AssertLogRelRCReturn(u32 == pDXContext->pBackendDXContext->cShader, VERR_INVALID_STATE); 7830 7831 for (uint32_t i = 0; i < pDXContext->pBackendDXContext->cShader; ++i) 7832 { 7833 DXSHADER *pDXShader = &pDXContext->pBackendDXContext->paShader[i]; 7834 7835 rc = pHlp->pfnSSMGetU32(pSSM, &u32); 7836 AssertLogRelRCReturn(rc, rc); 7837 AssertLogRelReturn((SVGA3dShaderType)u32 == pDXShader->enmShaderType, VERR_INVALID_STATE); 7838 7839 if (pDXShader->enmShaderType == SVGA3D_SHADERTYPE_INVALID) 7840 continue; 7841 7842 pHlp->pfnSSMGetU32(pSSM, &pDXShader->soid); 7843 7844 pHlp->pfnSSMGetU32(pSSM, &u32); 7845 pDXShader->shaderInfo.enmProgramType = (VGPU10_PROGRAM_TYPE)u32; 7846 7847 rc = pHlp->pfnSSMGetU32(pSSM, &pDXShader->shaderInfo.cbBytecode); 7848 AssertLogRelRCReturn(rc, rc); 7849 AssertLogRelReturn(pDXShader->shaderInfo.cbBytecode <= 2 * SVGA3D_MAX_SHADER_MEMORY_BYTES, VERR_INVALID_STATE); 7850 7851 pDXShader->shaderInfo.pvBytecode = RTMemAlloc(pDXShader->shaderInfo.cbBytecode); 7852 AssertPtrReturn(pDXShader->shaderInfo.pvBytecode, VERR_NO_MEMORY); 7853 pHlp->pfnSSMGetMem(pSSM, pDXShader->shaderInfo.pvBytecode, pDXShader->shaderInfo.cbBytecode); 7854 7855 rc = pHlp->pfnSSMGetU32(pSSM, &pDXShader->shaderInfo.cInputSignature); 7856 AssertLogRelRCReturn(rc, rc); 7857 AssertLogRelReturn(pDXShader->shaderInfo.cInputSignature <= 32, VERR_INVALID_STATE); 7858 pHlp->pfnSSMGetMem(pSSM, pDXShader->shaderInfo.aInputSignature, pDXShader->shaderInfo.cInputSignature * sizeof(SVGA3dDXSignatureEntry)); 7859 7860 rc = pHlp->pfnSSMGetU32(pSSM, &pDXShader->shaderInfo.cOutputSignature); 7861 AssertLogRelRCReturn(rc, rc); 7862 AssertLogRelReturn(pDXShader->shaderInfo.cOutputSignature <= 32, VERR_INVALID_STATE); 7863 pHlp->pfnSSMGetMem(pSSM, pDXShader->shaderInfo.aOutputSignature, pDXShader->shaderInfo.cOutputSignature * sizeof(SVGA3dDXSignatureEntry)); 7864 7865 rc = pHlp->pfnSSMGetU32(pSSM, &pDXShader->shaderInfo.cPatchConstantSignature); 7866 AssertLogRelRCReturn(rc, rc); 7867 AssertLogRelReturn(pDXShader->shaderInfo.cPatchConstantSignature <= 32, VERR_INVALID_STATE); 7868 pHlp->pfnSSMGetMem(pSSM, pDXShader->shaderInfo.aPatchConstantSignature, pDXShader->shaderInfo.cPatchConstantSignature * sizeof(SVGA3dDXSignatureEntry)); 7869 7870 rc = pHlp->pfnSSMGetU32(pSSM, &pDXShader->shaderInfo.cDclResource); 7871 AssertLogRelRCReturn(rc, rc); 7872 AssertLogRelReturn(pDXShader->shaderInfo.cDclResource <= SVGA3D_DX_MAX_SRVIEWS, VERR_INVALID_STATE); 7873 pHlp->pfnSSMGetMem(pSSM, pDXShader->shaderInfo.aOffDclResource, pDXShader->shaderInfo.cDclResource * sizeof(uint32_t)); 7874 } 7875 7876 rc = pHlp->pfnSSMGetU32(pSSM, &pDXContext->pBackendDXContext->cSOTarget); 7877 AssertLogRelRCReturn(rc, rc); 7878 7879 return VINF_SUCCESS; 7880 } 7881 7882 7883 static DECLCALLBACK(int) vmsvga3dBackDXSaveState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PCPDMDEVHLPR3 pHlp, PSSMHANDLE pSSM) 7884 { 7885 RT_NOREF(pThisCC); 7886 int rc; 7887 7888 pHlp->pfnSSMPutU32(pSSM, pDXContext->pBackendDXContext->cShader); 7889 for (uint32_t i = 0; i < pDXContext->pBackendDXContext->cShader; ++i) 7890 { 7891 DXSHADER *pDXShader = &pDXContext->pBackendDXContext->paShader[i]; 7892 7893 pHlp->pfnSSMPutU32(pSSM, (uint32_t)pDXShader->enmShaderType); 7894 if (pDXShader->enmShaderType == SVGA3D_SHADERTYPE_INVALID) 7895 continue; 7896 7897 pHlp->pfnSSMPutU32(pSSM, pDXShader->soid); 7898 7899 pHlp->pfnSSMPutU32(pSSM, (uint32_t)pDXShader->shaderInfo.enmProgramType); 7900 pHlp->pfnSSMPutU32(pSSM, pDXShader->shaderInfo.cbBytecode); 7901 pHlp->pfnSSMPutMem(pSSM, pDXShader->shaderInfo.pvBytecode, pDXShader->shaderInfo.cbBytecode); 7902 pHlp->pfnSSMPutU32(pSSM, pDXShader->shaderInfo.cInputSignature); 7903 pHlp->pfnSSMPutMem(pSSM, pDXShader->shaderInfo.aInputSignature, pDXShader->shaderInfo.cInputSignature * sizeof(SVGA3dDXSignatureEntry)); 7904 pHlp->pfnSSMPutU32(pSSM, pDXShader->shaderInfo.cOutputSignature); 7905 pHlp->pfnSSMPutMem(pSSM, pDXShader->shaderInfo.aOutputSignature, pDXShader->shaderInfo.cOutputSignature * sizeof(SVGA3dDXSignatureEntry)); 7906 pHlp->pfnSSMPutU32(pSSM, pDXShader->shaderInfo.cPatchConstantSignature); 7907 pHlp->pfnSSMPutMem(pSSM, pDXShader->shaderInfo.aPatchConstantSignature, pDXShader->shaderInfo.cPatchConstantSignature * sizeof(SVGA3dDXSignatureEntry)); 7908 pHlp->pfnSSMPutU32(pSSM, pDXShader->shaderInfo.cDclResource); 7909 pHlp->pfnSSMPutMem(pSSM, pDXShader->shaderInfo.aOffDclResource, pDXShader->shaderInfo.cDclResource * sizeof(uint32_t)); 7910 } 7911 rc = pHlp->pfnSSMPutU32(pSSM, pDXContext->pBackendDXContext->cSOTarget); 7912 AssertLogRelRCReturn(rc, rc); 7913 7914 return VINF_SUCCESS; 7915 } 7916 7917 7843 7918 static DECLCALLBACK(int) vmsvga3dBackQueryInterface(PVGASTATECC pThisCC, char const *pszInterfaceName, void *pvInterfaceFuncs, size_t cbInterfaceFuncs) 7844 7919 { … … 7853 7928 { 7854 7929 VMSVGA3DBACKENDFUNCSDX *p = (VMSVGA3DBACKENDFUNCSDX *)pvInterfaceFuncs; 7930 p->pfnDXSaveState = vmsvga3dBackDXSaveState; 7931 p->pfnDXLoadState = vmsvga3dBackDXLoadState; 7855 7932 p->pfnDXDefineContext = vmsvga3dBackDXDefineContext; 7856 7933 p->pfnDXDestroyContext = vmsvga3dBackDXDestroyContext; -
trunk/src/VBox/Devices/Graphics/DevVGA-SVGA3d.h
r94146 r94205 394 394 typedef struct 395 395 { 396 DECLCALLBACKMEMBER(int, pfnDXSaveState, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PCPDMDEVHLPR3 pHlp, PSSMHANDLE pSSM)); 397 DECLCALLBACKMEMBER(int, pfnDXLoadState, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PCPDMDEVHLPR3 pHlp, PSSMHANDLE pSSM)); 396 398 DECLCALLBACKMEMBER(int, pfnDXDefineContext, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 397 399 DECLCALLBACKMEMBER(int, pfnDXDestroyContext, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); … … 642 644 int vmsvga3dSurfaceStretchBltNonMSToMS(PVGASTATECC pThisCC, uint32_t idDXContext); 643 645 int vmsvga3dDXBindShaderIface(PVGASTATECC pThisCC, uint32_t idDXContext); 646 int vmsvga3dDXLoadExec(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass); 647 int vmsvga3dDXSaveExec(PPDMDEVINS pDevIns, PVGASTATECC pThisCC, PSSMHANDLE pSSM); 644 648 #endif /* VMSVGA3D_DX */ 645 649 -
trunk/src/VBox/Devices/Graphics/DevVGASavedState.h
r93115 r94205 47 47 } while (0) 48 48 49 #define VGA_SAVEDSTATE_VERSION 23 49 #define VGA_SAVEDSTATE_VERSION 24 50 #define VGA_SAVEDSTATE_VERSION_VMSVGA_DX 24 /* VGPU10. */ 50 51 #define VGA_SAVEDSTATE_VERSION_VMSVGA_MIPLEVELS 23 /* Surface struct with number of miplevels. */ 51 52 #define VGA_SAVEDSTATE_VERSION_VMSVGA_CURSOR 22 /* Legacy cursor registers. */ -
trunk/src/VBox/Devices/Makefile.kmk
r93652 r94205 337 337 VBoxDD_SOURCES += \ 338 338 Graphics/DevVGA-SVGA3d-dx.cpp \ 339 Graphics/DevVGA-SVGA3d-dx-savedstate.cpp \ 339 340 Graphics/DevVGA-SVGA3d-dx-shader.cpp 340 341 if "$(KBUILD_TARGET)" == "win" || defined(VBOX_WITH_DXVK)
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