Changeset 9421 in vbox
- Timestamp:
- Jun 5, 2008 1:17:00 PM (17 years ago)
- Location:
- trunk
- Files:
-
- 13 edited
-
include/VBox/cpum.h (modified) (1 diff)
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include/VBox/cpum.mac (modified) (3 diffs)
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src/VBox/VMM/CPUM.cpp (modified) (3 diffs)
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src/VBox/VMM/CPUMInternal.mac (modified) (5 diffs)
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src/VBox/VMM/DBGF.cpp (modified) (1 diff)
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src/VBox/VMM/DBGFDisas.cpp (modified) (1 diff)
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src/VBox/VMM/VMMAll/SELMAll.cpp (modified) (7 diffs)
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src/VBox/VMM/VMMR0/HWACCMR0.cpp (modified) (1 diff)
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src/VBox/VMM/VMMR0/HWSVMR0.h (modified) (2 diffs)
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src/VBox/VMM/VMMR0/HWVMXR0.cpp (modified) (2 diffs)
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src/VBox/VMM/VMMR0/HWVMXR0.h (modified) (2 diffs)
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src/VBox/VMM/VMMTests.cpp (modified) (1 diff)
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src/recompiler/VBoxRecompiler.c (modified) (6 diffs)
Legend:
- Unmodified
- Added
- Removed
-
trunk/include/VBox/cpum.h
r9411 r9421 48 48 { 49 49 /** Base register. */ 50 uint 32_t u32Base;50 uint64_t u64Base; 51 51 /** Limit (expanded). */ 52 52 uint32_t u32Limit; -
trunk/include/VBox/cpum.mac
r9411 r9421 71 71 .r15 resq 1 72 72 73 .esHid.u 32Base resd173 .esHid.u64Base resq 1 74 74 .esHid.u32Limit resd 1 75 75 .esHid.Attr resd 1 76 76 77 .csHid.u 32Base resd177 .csHid.u64Base resq 1 78 78 .csHid.u32Limit resd 1 79 79 .csHid.Attr resd 1 80 80 81 .ssHid.u 32Base resd181 .ssHid.u64Base resq 1 82 82 .ssHid.u32Limit resd 1 83 83 .ssHid.Attr resd 1 84 84 85 .dsHid.u 32Base resd185 .dsHid.u64Base resq 1 86 86 .dsHid.u32Limit resd 1 87 87 .dsHid.Attr resd 1 88 88 89 .fsHid.u 32Base resd189 .fsHid.u64Base resq 1 90 90 .fsHid.u32Limit resd 1 91 91 .fsHid.Attr resd 1 92 92 93 .gsHid.u 32Base resd193 .gsHid.u64Base resq 1 94 94 .gsHid.u32Limit resd 1 95 95 .gsHid.Attr resd 1 … … 134 134 .r15 resq 1 135 135 136 .esHid.u 32Base resd1136 .esHid.u64Base resq 1 137 137 .esHid.u32Limit resd 1 138 138 .esHid.Attr resd 1 139 139 140 .csHid.u 32Base resd1140 .csHid.u64Base resq 1 141 141 .csHid.u32Limit resd 1 142 142 .csHid.Attr resd 1 143 143 144 .ssHid.u 32Base resd1144 .ssHid.u64Base resq 1 145 145 .ssHid.u32Limit resd 1 146 146 .ssHid.Attr resd 1 147 147 148 .dsHid.u 32Base resd1148 .dsHid.u64Base resq 1 149 149 .dsHid.u32Limit resd 1 150 150 .dsHid.Attr resd 1 151 151 152 .fsHid.u 32Base resd1152 .fsHid.u64Base resq 1 153 153 .fsHid.u32Limit resd 1 154 154 .fsHid.Attr resd 1 155 155 156 .gsHid.u 32Base resd1156 .gsHid.u64Base resq 1 157 157 .gsHid.u32Limit resd 1 158 158 .gsHid.Attr resd 1 … … 199 199 .msrKERNELGSBASE resb 8 200 200 201 .ldtrHid.u 32Base resd1201 .ldtrHid.u64Base resq 1 202 202 .ldtrHid.u32Limit resd 1 203 203 .ldtrHid.Attr resd 1 204 204 205 .trHid.u 32Base resd1205 .trHid.u64Base resq 1 206 206 .trHid.u32Limit resd 1 207 207 .trHid.Attr resd 1 -
trunk/src/VBox/VMM/CPUM.cpp
r9380 r9421 538 538 539 539 pCtx->cs = 0xf000; 540 pCtx->csHid.u 32Base = UINT32_C(0xffff0000);540 pCtx->csHid.u64Base = UINT64_C(0xffff0000); 541 541 pCtx->csHid.u32Limit = 0x0000ffff; 542 542 pCtx->csHid.Attr.n.u1DescType = 1; /* code/data segment */ … … 831 831 pszPrefix, pCtxCore->eax, pszPrefix, pCtxCore->ebx, pszPrefix, pCtxCore->ecx, pszPrefix, pCtxCore->edx, pszPrefix, pCtxCore->esi, pszPrefix, pCtxCore->edi, 832 832 pszPrefix, pCtxCore->eip, pszPrefix, pCtxCore->esp, pszPrefix, pCtxCore->ebp, pszPrefix, X86_EFL_GET_IOPL(efl), *pszPrefix ? 33 : 31, szEFlags, 833 pszPrefix, (RTSEL)pCtxCore->cs, pCtx->csHid.u 32Base, pCtx->csHid.u32Limit, pCtx->csHid.Attr.u, pszPrefix, pCtx->dr0, pszPrefix, pCtx->dr1,834 pszPrefix, (RTSEL)pCtxCore->ds, pCtx->dsHid.u 32Base, pCtx->dsHid.u32Limit, pCtx->dsHid.Attr.u, pszPrefix, pCtx->dr2, pszPrefix, pCtx->dr3,835 pszPrefix, (RTSEL)pCtxCore->es, pCtx->esHid.u 32Base, pCtx->esHid.u32Limit, pCtx->esHid.Attr.u, pszPrefix, pCtx->dr4, pszPrefix, pCtx->dr5,836 pszPrefix, (RTSEL)pCtxCore->fs, pCtx->fsHid.u 32Base, pCtx->fsHid.u32Limit, pCtx->fsHid.Attr.u, pszPrefix, pCtx->dr6, pszPrefix, pCtx->dr7,837 pszPrefix, (RTSEL)pCtxCore->gs, pCtx->gsHid.u 32Base, pCtx->gsHid.u32Limit, pCtx->gsHid.Attr.u, pszPrefix, pCtx->cr0, pszPrefix, pCtx->cr2,838 pszPrefix, (RTSEL)pCtxCore->ss, pCtx->ssHid.u 32Base, pCtx->ssHid.u32Limit, pCtx->ssHid.Attr.u, pszPrefix, pCtx->cr3, pszPrefix, pCtx->cr4,833 pszPrefix, (RTSEL)pCtxCore->cs, pCtx->csHid.u64Base, pCtx->csHid.u32Limit, pCtx->csHid.Attr.u, pszPrefix, pCtx->dr0, pszPrefix, pCtx->dr1, 834 pszPrefix, (RTSEL)pCtxCore->ds, pCtx->dsHid.u64Base, pCtx->dsHid.u32Limit, pCtx->dsHid.Attr.u, pszPrefix, pCtx->dr2, pszPrefix, pCtx->dr3, 835 pszPrefix, (RTSEL)pCtxCore->es, pCtx->esHid.u64Base, pCtx->esHid.u32Limit, pCtx->esHid.Attr.u, pszPrefix, pCtx->dr4, pszPrefix, pCtx->dr5, 836 pszPrefix, (RTSEL)pCtxCore->fs, pCtx->fsHid.u64Base, pCtx->fsHid.u32Limit, pCtx->fsHid.Attr.u, pszPrefix, pCtx->dr6, pszPrefix, pCtx->dr7, 837 pszPrefix, (RTSEL)pCtxCore->gs, pCtx->gsHid.u64Base, pCtx->gsHid.u32Limit, pCtx->gsHid.Attr.u, pszPrefix, pCtx->cr0, pszPrefix, pCtx->cr2, 838 pszPrefix, (RTSEL)pCtxCore->ss, pCtx->ssHid.u64Base, pCtx->ssHid.u32Limit, pCtx->ssHid.Attr.u, pszPrefix, pCtx->cr3, pszPrefix, pCtx->cr4, 839 839 pszPrefix, pCtx->gdtr.pGdt, pCtx->gdtr.cbGdt, pszPrefix, pCtx->idtr.pIdt, pCtx->idtr.cbIdt, pszPrefix, efl, 840 pszPrefix, (RTSEL)pCtx->ldtr, pCtx->ldtrHid.u 32Base, pCtx->ldtrHid.u32Limit, pCtx->ldtrHid.Attr.u,841 pszPrefix, (RTSEL)pCtx->tr, pCtx->trHid.u 32Base, pCtx->trHid.u32Limit, pCtx->trHid.Attr.u,840 pszPrefix, (RTSEL)pCtx->ldtr, pCtx->ldtrHid.u64Base, pCtx->ldtrHid.u32Limit, pCtx->ldtrHid.Attr.u, 841 pszPrefix, (RTSEL)pCtx->tr, pCtx->trHid.u64Base, pCtx->trHid.u32Limit, pCtx->trHid.Attr.u, 842 842 pszPrefix, pCtx->SysEnter.cs, pCtx->SysEnter.eip, pCtx->SysEnter.esp); 843 843 … … 1803 1803 if (CPUMAreHiddenSelRegsValid(pVM)) 1804 1804 { 1805 State.GCPtrSegBase = pCtx->csHid.u 32Base;1806 State.GCPtrSegEnd = pCtx->csHid.u32Limit + 1 + (RTGCUINTPTR)pCtx->csHid.u 32Base;1805 State.GCPtrSegBase = pCtx->csHid.u64Base; 1806 State.GCPtrSegEnd = pCtx->csHid.u32Limit + 1 + (RTGCUINTPTR)pCtx->csHid.u64Base; 1807 1807 State.cbSegLimit = pCtx->csHid.u32Limit; 1808 1808 pCpu->mode = pCtx->csHid.Attr.n.u1DefBig ? CPUMODE_32BIT : CPUMODE_16BIT; -
trunk/src/VBox/VMM/CPUMInternal.mac
r9411 r9421 206 206 .Hyper.r15 resq 1 207 207 208 .Hyper.esHid.u 32Base resd1208 .Hyper.esHid.u64Base resq 1 209 209 .Hyper.esHid.u32Limit resd 1 210 210 .Hyper.esHid.Attr resd 1 211 211 212 .Hyper.csHid.u 32Base resd1212 .Hyper.csHid.u64Base resq 1 213 213 .Hyper.csHid.u32Limit resd 1 214 214 .Hyper.csHid.Attr resd 1 215 215 216 .Hyper.ssHid.u 32Base resd1216 .Hyper.ssHid.u64Base resq 1 217 217 .Hyper.ssHid.u32Limit resd 1 218 218 .Hyper.ssHid.Attr resd 1 219 219 220 .Hyper.dsHid.u 32Base resd1220 .Hyper.dsHid.u64Base resq 1 221 221 .Hyper.dsHid.u32Limit resd 1 222 222 .Hyper.dsHid.Attr resd 1 223 223 224 .Hyper.fsHid.u 32Base resd1224 .Hyper.fsHid.u64Base resq 1 225 225 .Hyper.fsHid.u32Limit resd 1 226 226 .Hyper.fsHid.Attr resd 1 227 227 228 .Hyper.gsHid.u 32Base resd1228 .Hyper.gsHid.u64Base resq 1 229 229 .Hyper.gsHid.u32Limit resd 1 230 230 .Hyper.gsHid.Attr resd 1 … … 270 270 .Hyper.msrKERNELGSBASE resb 8 271 271 272 .Hyper.ldtrHid.u 32Base resd1272 .Hyper.ldtrHid.u64Base resq 1 273 273 .Hyper.ldtrHid.u32Limit resd 1 274 274 .Hyper.ldtrHid.Attr resd 1 275 275 276 .Hyper.trHid.u 32Base resd1276 .Hyper.trHid.u64Base resq 1 277 277 .Hyper.trHid.u32Limit resd 1 278 278 .Hyper.trHid.Attr resd 1 … … 322 322 .Guest.r15 resq 1 323 323 324 .Guest.esHid.u 32Base resd1324 .Guest.esHid.u64Base resq 1 325 325 .Guest.esHid.u32Limit resd 1 326 326 .Guest.esHid.Attr resd 1 327 327 328 .Guest.csHid.u 32Base resd1328 .Guest.csHid.u64Base resq 1 329 329 .Guest.csHid.u32Limit resd 1 330 330 .Guest.csHid.Attr resd 1 331 331 332 .Guest.ssHid.u 32Base resd1332 .Guest.ssHid.u64Base resq 1 333 333 .Guest.ssHid.u32Limit resd 1 334 334 .Guest.ssHid.Attr resd 1 335 335 336 .Guest.dsHid.u 32Base resd1336 .Guest.dsHid.u64Base resq 1 337 337 .Guest.dsHid.u32Limit resd 1 338 338 .Guest.dsHid.Attr resd 1 339 339 340 .Guest.fsHid.u 32Base resd1340 .Guest.fsHid.u64Base resq 1 341 341 .Guest.fsHid.u32Limit resd 1 342 342 .Guest.fsHid.Attr resd 1 343 343 344 .Guest.gsHid.u 32Base resd1344 .Guest.gsHid.u64Base resq 1 345 345 .Guest.gsHid.u32Limit resd 1 346 346 .Guest.gsHid.Attr resd 1 … … 386 386 .Guest.msrKERNELGSBASE resb 8 387 387 388 .Guest.ldtrHid.u 32Base resd1388 .Guest.ldtrHid.u64Base resq 1 389 389 .Guest.ldtrHid.u32Limit resd 1 390 390 .Guest.ldtrHid.Attr resd 1 391 391 392 .Guest.trHid.u 32Base resd1392 .Guest.trHid.u64Base resq 1 393 393 .Guest.trHid.u32Limit resd 1 394 394 .Guest.trHid.Attr resd 1 … … 436 436 437 437 ; CPUMCTX debug stuff... 438 .GuestEntry resb 10 24438 .GuestEntry resb 1056 439 439 440 440 endstruc -
trunk/src/VBox/VMM/DBGF.cpp
r8823 r9421 560 560 PCPUMCTX pCtx; 561 561 CPUMQueryGuestCtxPtr(pVM, &pCtx); 562 uint32_t eip = pCtx->eip + pCtx->csHid.u32Base;562 RTGCPTR eip = pCtx->rip + pCtx->csHid.u64Base; 563 563 #endif 564 564 for (iBp = 0; iBp < ELEMENTS(pVM->dbgf.s.aBreakpoints); iBp++) -
trunk/src/VBox/VMM/DBGFDisas.cpp
r9292 r9421 323 323 && CPUMAreHiddenSelRegsValid(pVM)) 324 324 { 325 SelInfo.GCPtrBase = pHiddenSel->u 32Base;325 SelInfo.GCPtrBase = pHiddenSel->u64Base; 326 326 SelInfo.cbLimit = pHiddenSel->u32Limit; 327 327 SelInfo.fHyper = false; -
trunk/src/VBox/VMM/VMMAll/SELMAll.cpp
r9412 r9421 99 99 100 100 if (CPUMAreHiddenSelRegsValid(pVM)) 101 uFlat += pHiddenSel->u 32Base;101 uFlat += pHiddenSel->u64Base; 102 102 else 103 103 uFlat += ((RTGCUINTPTR)Sel << 4); … … 108 108 if (!CPUMAreHiddenSelRegsValid(pVM)) 109 109 return selmToFlat(pVM, Sel, Addr); 110 return (RTGCPTR)(pHiddenSel->u 32Base + (RTGCUINTPTR)Addr);110 return (RTGCPTR)(pHiddenSel->u64Base + (RTGCUINTPTR)Addr); 111 111 } 112 112 … … 142 142 if ( pHiddenSel 143 143 && CPUMAreHiddenSelRegsValid(pVM)) 144 *ppvGC = (RTGCPTR)(pHiddenSel->u 32Base + uFlat);144 *ppvGC = (RTGCPTR)(pHiddenSel->u64Base + uFlat); 145 145 else 146 146 *ppvGC = (RTGCPTR)(((RTGCUINTPTR)Sel << 4) + uFlat); … … 166 166 167 167 u32Limit = pHiddenSel->u32Limit; 168 pvFlat = (RTGCPTR)(pHiddenSel->u 32Base + (RTGCUINTPTR)Addr);168 pvFlat = (RTGCPTR)(pHiddenSel->u64Base + (RTGCUINTPTR)Addr); 169 169 } 170 170 else … … 334 334 uFlat += ((RTGCUINTPTR)SelCS << 4); 335 335 else 336 uFlat += pHidCS->u 32Base;336 uFlat += pHidCS->u64Base; 337 337 *ppvFlat = (RTGCPTR)uFlat; 338 338 return VINF_SUCCESS; … … 457 457 if ((RTGCUINTPTR)Addr <= u32Limit) 458 458 { 459 *ppvFlat = (RTGCPTR)( (RTGCUINTPTR)Addr + pHidCS->u 32Base );459 *ppvFlat = (RTGCPTR)( (RTGCUINTPTR)Addr + pHidCS->u64Base ); 460 460 return VINF_SUCCESS; 461 461 } … … 850 850 pHiddenTRReg = CPUMGetGuestTRHid(pVM); 851 851 852 *pGCPtrTss = pHiddenTRReg->u 32Base;852 *pGCPtrTss = pHiddenTRReg->u64Base; 853 853 *pcbTss = pHiddenTRReg->u32Limit; 854 854 -
trunk/src/VBox/VMM/VMMR0/HWACCMR0.cpp
r9414 r9421 981 981 Log(("eax=%08x ebx=%08x ecx=%08x edx=%08x esi=%08x edi=%08x\n" 982 982 "eip=%08x esp=%08x ebp=%08x iopl=%d %*s\n" 983 "cs={%04x base=% 08xlimit=%08x flags=%08x} dr0=%08RX64 dr1=%08RX64\n"984 "ds={%04x base=% 08xlimit=%08x flags=%08x} dr2=%08RX64 dr3=%08RX64\n"985 "es={%04x base=% 08xlimit=%08x flags=%08x} dr4=%08RX64 dr5=%08RX64\n"986 "fs={%04x base=% 08xlimit=%08x flags=%08x} dr6=%08RX64 dr7=%08RX64\n"983 "cs={%04x base=%VGv limit=%08x flags=%08x} dr0=%08RX64 dr1=%08RX64\n" 984 "ds={%04x base=%VGv limit=%08x flags=%08x} dr2=%08RX64 dr3=%08RX64\n" 985 "es={%04x base=%VGv limit=%08x flags=%08x} dr4=%08RX64 dr5=%08RX64\n" 986 "fs={%04x base=%VGv limit=%08x flags=%08x} dr6=%08RX64 dr7=%08RX64\n" 987 987 , 988 988 pCtx->eax, pCtx->ebx, pCtx->ecx, pCtx->edx, pCtx->esi, pCtx->edi, 989 989 pCtx->eip, pCtx->esp, pCtx->ebp, X86_EFL_GET_IOPL(efl), 31, szEFlags, 990 (RTSEL)pCtx->cs, pCtx->csHid.u 32Base, pCtx->csHid.u32Limit, pCtx->csHid.Attr.u, pCtx->dr0, pCtx->dr1,991 (RTSEL)pCtx->ds, pCtx->dsHid.u 32Base, pCtx->dsHid.u32Limit, pCtx->dsHid.Attr.u, pCtx->dr2, pCtx->dr3,992 (RTSEL)pCtx->es, pCtx->esHid.u 32Base, pCtx->esHid.u32Limit, pCtx->esHid.Attr.u, pCtx->dr4, pCtx->dr5,993 (RTSEL)pCtx->fs, pCtx->fsHid.u 32Base, pCtx->fsHid.u32Limit, pCtx->fsHid.Attr.u, pCtx->dr6, pCtx->dr7));994 995 Log(("gs={%04x base=% 08xlimit=%08x flags=%08x} cr0=%08RX64 cr2=%08RX64\n"996 "ss={%04x base=% 08xlimit=%08x flags=%08x} cr3=%08RX64 cr4=%08RX64\n"990 (RTSEL)pCtx->cs, pCtx->csHid.u64Base, pCtx->csHid.u32Limit, pCtx->csHid.Attr.u, pCtx->dr0, pCtx->dr1, 991 (RTSEL)pCtx->ds, pCtx->dsHid.u64Base, pCtx->dsHid.u32Limit, pCtx->dsHid.Attr.u, pCtx->dr2, pCtx->dr3, 992 (RTSEL)pCtx->es, pCtx->esHid.u64Base, pCtx->esHid.u32Limit, pCtx->esHid.Attr.u, pCtx->dr4, pCtx->dr5, 993 (RTSEL)pCtx->fs, pCtx->fsHid.u64Base, pCtx->fsHid.u32Limit, pCtx->fsHid.Attr.u, pCtx->dr6, pCtx->dr7)); 994 995 Log(("gs={%04x base=%VGv limit=%08x flags=%08x} cr0=%08RX64 cr2=%08RX64\n" 996 "ss={%04x base=%VGv limit=%08x flags=%08x} cr3=%08RX64 cr4=%08RX64\n" 997 997 "gdtr=%08x:%04x idtr=%08x:%04x eflags=%08x\n" 998 "ldtr={%04x base=% 08xlimit=%08x flags=%08x}\n"999 "tr ={%04x base=% 08xlimit=%08x flags=%08x}\n"998 "ldtr={%04x base=%VGv limit=%08x flags=%08x}\n" 999 "tr ={%04x base=%VGv limit=%08x flags=%08x}\n" 1000 1000 "SysEnter={cs=%04llx eip=%08llx esp=%08llx}\n" 1001 1001 "FCW=%04x FSW=%04x FTW=%04x\n", 1002 (RTSEL)pCtx->gs, pCtx->gsHid.u 32Base, pCtx->gsHid.u32Limit, pCtx->gsHid.Attr.u, pCtx->cr0, pCtx->cr2,1003 (RTSEL)pCtx->ss, pCtx->ssHid.u 32Base, pCtx->ssHid.u32Limit, pCtx->ssHid.Attr.u, pCtx->cr3, pCtx->cr4,1002 (RTSEL)pCtx->gs, pCtx->gsHid.u64Base, pCtx->gsHid.u32Limit, pCtx->gsHid.Attr.u, pCtx->cr0, pCtx->cr2, 1003 (RTSEL)pCtx->ss, pCtx->ssHid.u64Base, pCtx->ssHid.u32Limit, pCtx->ssHid.Attr.u, pCtx->cr3, pCtx->cr4, 1004 1004 pCtx->gdtr.pGdt, pCtx->gdtr.cbGdt, pCtx->idtr.pIdt, pCtx->idtr.cbIdt, efl, 1005 (RTSEL)pCtx->ldtr, pCtx->ldtrHid.u 32Base, pCtx->ldtrHid.u32Limit, pCtx->ldtrHid.Attr.u,1006 (RTSEL)pCtx->tr, pCtx->trHid.u 32Base, pCtx->trHid.u32Limit, pCtx->trHid.Attr.u,1005 (RTSEL)pCtx->ldtr, pCtx->ldtrHid.u64Base, pCtx->ldtrHid.u32Limit, pCtx->ldtrHid.Attr.u, 1006 (RTSEL)pCtx->tr, pCtx->trHid.u64Base, pCtx->trHid.u32Limit, pCtx->trHid.Attr.u, 1007 1007 pCtx->SysEnter.cs, pCtx->SysEnter.eip, pCtx->SysEnter.esp, 1008 1008 pCtx->fpu.FCW, pCtx->fpu.FSW, pCtx->fpu.FTW)); -
trunk/src/VBox/VMM/VMMR0/HWSVMR0.h
r9407 r9421 143 143 pVMCB->guest.REG.u16Sel = pCtx->reg; \ 144 144 pVMCB->guest.REG.u32Limit = pCtx->reg##Hid.u32Limit; \ 145 pVMCB->guest.REG.u64Base = pCtx->reg##Hid.u 32Base; \145 pVMCB->guest.REG.u64Base = pCtx->reg##Hid.u64Base; \ 146 146 pVMCB->guest.REG.u16Attr = SVM_HIDSEGATTR_VMX2SVM(pCtx->reg##Hid.Attr.u); 147 147 … … 149 149 pCtx->reg = pVMCB->guest.REG.u16Sel; \ 150 150 pCtx->reg##Hid.u32Limit = pVMCB->guest.REG.u32Limit; \ 151 pCtx->reg##Hid.u 32Base = pVMCB->guest.REG.u64Base; \151 pCtx->reg##Hid.u64Base = pVMCB->guest.REG.u64Base; \ 152 152 pCtx->reg##Hid.Attr.u = SVM_HIDSEGATTR_SVM2VMX(pVMCB->guest.REG.u16Attr); 153 153 -
trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp
r9412 r9421 703 703 rc = VMXWriteVMCS(VMX_VMCS_GUEST_FIELD_LDTR, pCtx->ldtr); 704 704 rc |= VMXWriteVMCS(VMX_VMCS_GUEST_LDTR_LIMIT, pCtx->ldtrHid.u32Limit); 705 rc |= VMXWriteVMCS(VMX_VMCS_GUEST_LDTR_BASE, pCtx->ldtrHid.u 32Base);705 rc |= VMXWriteVMCS(VMX_VMCS_GUEST_LDTR_BASE, pCtx->ldtrHid.u64Base); 706 706 rc |= VMXWriteVMCS(VMX_VMCS_GUEST_LDTR_ACCESS_RIGHTS, pCtx->ldtrHid.Attr.u); 707 707 } … … 722 722 { 723 723 rc |= VMXWriteVMCS(VMX_VMCS_GUEST_TR_LIMIT, pCtx->trHid.u32Limit); 724 rc |= VMXWriteVMCS(VMX_VMCS_GUEST_TR_BASE, pCtx->trHid.u 32Base);724 rc |= VMXWriteVMCS(VMX_VMCS_GUEST_TR_BASE, pCtx->trHid.u64Base); 725 725 } 726 726 val = pCtx->trHid.Attr.u; -
trunk/src/VBox/VMM/VMMR0/HWVMXR0.h
r9407 r9421 140 140 rc = VMXWriteVMCS(VMX_VMCS_GUEST_FIELD_##REG, pCtx->reg); \ 141 141 rc |= VMXWriteVMCS(VMX_VMCS_GUEST_##REG##_LIMIT, pCtx->reg##Hid.u32Limit); \ 142 rc |= VMXWriteVMCS(VMX_VMCS_GUEST_##REG##_BASE, pCtx->reg##Hid.u 32Base); \142 rc |= VMXWriteVMCS(VMX_VMCS_GUEST_##REG##_BASE, pCtx->reg##Hid.u64Base); \ 143 143 if (pCtx->eflags.u32 & X86_EFL_VM) \ 144 144 val = pCtx->reg##Hid.Attr.u; \ … … 157 157 pCtx->reg##Hid.u32Limit = val; \ 158 158 VMXReadVMCS(VMX_VMCS_GUEST_##REG##_BASE, &val); \ 159 pCtx->reg##Hid.u 32Base = val; \159 pCtx->reg##Hid.u64Base = val; \ 160 160 VMXReadVMCS(VMX_VMCS_GUEST_##REG##_ACCESS_RIGHTS, &val); \ 161 161 pCtx->reg##Hid.Attr.u = val; -
trunk/src/VBox/VMM/VMMTests.cpp
r9221 r9421 437 437 AssertRC(rc); \ 438 438 \ 439 pHyperCtx->reg##Hid.u 32Base = selInfo.GCPtrBase; \439 pHyperCtx->reg##Hid.u64Base = selInfo.GCPtrBase; \ 440 440 pHyperCtx->reg##Hid.u32Limit = selInfo.cbLimit; \ 441 441 pHyperCtx->reg##Hid.Attr.n.u1Present = selInfo.Raw.Gen.u1Present; \ -
trunk/src/recompiler/VBoxRecompiler.c
r9415 r9421 1109 1109 1110 1110 Ctx.tr = env->tr.selector; 1111 Ctx.trHid.u 32Base = (uint32_t)env->tr.base;1111 Ctx.trHid.u64Base = env->tr.base; 1112 1112 Ctx.trHid.u32Limit = env->tr.limit; 1113 1113 Ctx.trHid.Attr.u = (env->tr.flags >> 8) & 0xF0FF; 1114 1114 1115 1115 Ctx.idtr.cbIdt = env->idt.limit; 1116 Ctx.idtr.pIdt = (uint32_t)env->idt.base;1116 Ctx.idtr.pIdt = env->idt.base; 1117 1117 1118 1118 Ctx.eflags.u32 = env->eflags; 1119 1119 1120 1120 Ctx.cs = env->segs[R_CS].selector; 1121 Ctx.csHid.u 32Base = (uint32_t)env->segs[R_CS].base;1121 Ctx.csHid.u64Base = env->segs[R_CS].base; 1122 1122 Ctx.csHid.u32Limit = env->segs[R_CS].limit; 1123 1123 Ctx.csHid.Attr.u = (env->segs[R_CS].flags >> 8) & 0xF0FF; 1124 1124 1125 1125 Ctx.ss = env->segs[R_SS].selector; 1126 Ctx.ssHid.u 32Base = (uint32_t)env->segs[R_SS].base;1126 Ctx.ssHid.u64Base = env->segs[R_SS].base; 1127 1127 Ctx.ssHid.u32Limit = env->segs[R_SS].limit; 1128 1128 Ctx.ssHid.Attr.u = (env->segs[R_SS].flags >> 8) & 0xF0FF; … … 1753 1753 { 1754 1754 pVM->rem.s.Env.ldt.selector = pCtx->ldtr; 1755 pVM->rem.s.Env.ldt.base = pCtx->ldtrHid.u 32Base;1755 pVM->rem.s.Env.ldt.base = pCtx->ldtrHid.u64Base; 1756 1756 pVM->rem.s.Env.ldt.limit = pCtx->ldtrHid.u32Limit; 1757 1757 pVM->rem.s.Env.ldt.flags = (pCtx->ldtrHid.Attr.u << 8) & 0xFFFFFF;; … … 1766 1766 { 1767 1767 pVM->rem.s.Env.tr.selector = pCtx->tr; 1768 pVM->rem.s.Env.tr.base = pCtx->trHid.u 32Base;1768 pVM->rem.s.Env.tr.base = pCtx->trHid.u64Base; 1769 1769 pVM->rem.s.Env.tr.limit = pCtx->trHid.u32Limit; 1770 1770 pVM->rem.s.Env.tr.flags = (pCtx->trHid.Attr.u << 8) & 0xFFFFFF;; … … 1808 1808 cpu_x86_set_cpl(&pVM->rem.s.Env, CPUMGetGuestCPL(pVM, CPUMCTX2CORE(pCtx))); 1809 1809 1810 cpu_x86_load_seg_cache(&pVM->rem.s.Env, R_CS, pCtx->cs, pCtx->csHid.u 32Base, pCtx->csHid.u32Limit, (pCtx->csHid.Attr.u << 8) & 0xFFFFFF);1811 cpu_x86_load_seg_cache(&pVM->rem.s.Env, R_SS, pCtx->ss, pCtx->ssHid.u 32Base, pCtx->ssHid.u32Limit, (pCtx->ssHid.Attr.u << 8) & 0xFFFFFF);1812 cpu_x86_load_seg_cache(&pVM->rem.s.Env, R_DS, pCtx->ds, pCtx->dsHid.u 32Base, pCtx->dsHid.u32Limit, (pCtx->dsHid.Attr.u << 8) & 0xFFFFFF);1813 cpu_x86_load_seg_cache(&pVM->rem.s.Env, R_ES, pCtx->es, pCtx->esHid.u 32Base, pCtx->esHid.u32Limit, (pCtx->esHid.Attr.u << 8) & 0xFFFFFF);1814 cpu_x86_load_seg_cache(&pVM->rem.s.Env, R_FS, pCtx->fs, pCtx->fsHid.u 32Base, pCtx->fsHid.u32Limit, (pCtx->fsHid.Attr.u << 8) & 0xFFFFFF);1815 cpu_x86_load_seg_cache(&pVM->rem.s.Env, R_GS, pCtx->gs, pCtx->gsHid.u 32Base, pCtx->gsHid.u32Limit, (pCtx->gsHid.Attr.u << 8) & 0xFFFFFF);1810 cpu_x86_load_seg_cache(&pVM->rem.s.Env, R_CS, pCtx->cs, pCtx->csHid.u64Base, pCtx->csHid.u32Limit, (pCtx->csHid.Attr.u << 8) & 0xFFFFFF); 1811 cpu_x86_load_seg_cache(&pVM->rem.s.Env, R_SS, pCtx->ss, pCtx->ssHid.u64Base, pCtx->ssHid.u32Limit, (pCtx->ssHid.Attr.u << 8) & 0xFFFFFF); 1812 cpu_x86_load_seg_cache(&pVM->rem.s.Env, R_DS, pCtx->ds, pCtx->dsHid.u64Base, pCtx->dsHid.u32Limit, (pCtx->dsHid.Attr.u << 8) & 0xFFFFFF); 1813 cpu_x86_load_seg_cache(&pVM->rem.s.Env, R_ES, pCtx->es, pCtx->esHid.u64Base, pCtx->esHid.u32Limit, (pCtx->esHid.Attr.u << 8) & 0xFFFFFF); 1814 cpu_x86_load_seg_cache(&pVM->rem.s.Env, R_FS, pCtx->fs, pCtx->fsHid.u64Base, pCtx->fsHid.u32Limit, (pCtx->fsHid.Attr.u << 8) & 0xFFFFFF); 1815 cpu_x86_load_seg_cache(&pVM->rem.s.Env, R_GS, pCtx->gs, pCtx->gsHid.u64Base, pCtx->gsHid.u32Limit, (pCtx->gsHid.Attr.u << 8) & 0xFFFFFF); 1816 1816 } 1817 1817 else … … 2165 2165 2166 2166 /** @todo These values could still be out of sync! */ 2167 pCtx->csHid.u 32Base = (uint32_t)pVM->rem.s.Env.segs[R_CS].base;2167 pCtx->csHid.u64Base = pVM->rem.s.Env.segs[R_CS].base; 2168 2168 pCtx->csHid.u32Limit = pVM->rem.s.Env.segs[R_CS].limit; 2169 2169 /** @note QEmu saves the 2nd dword of the descriptor; we should store the attribute word only! */ 2170 2170 pCtx->csHid.Attr.u = (pVM->rem.s.Env.segs[R_CS].flags >> 8) & 0xF0FF; 2171 2171 2172 pCtx->dsHid.u 32Base = (uint32_t)pVM->rem.s.Env.segs[R_DS].base;2172 pCtx->dsHid.u64Base = pVM->rem.s.Env.segs[R_DS].base; 2173 2173 pCtx->dsHid.u32Limit = pVM->rem.s.Env.segs[R_DS].limit; 2174 2174 pCtx->dsHid.Attr.u = (pVM->rem.s.Env.segs[R_DS].flags >> 8) & 0xF0FF; 2175 2175 2176 pCtx->esHid.u 32Base = (uint32_t)pVM->rem.s.Env.segs[R_ES].base;2176 pCtx->esHid.u64Base = pVM->rem.s.Env.segs[R_ES].base; 2177 2177 pCtx->esHid.u32Limit = pVM->rem.s.Env.segs[R_ES].limit; 2178 2178 pCtx->esHid.Attr.u = (pVM->rem.s.Env.segs[R_ES].flags >> 8) & 0xF0FF; 2179 2179 2180 pCtx->fsHid.u 32Base = (uint32_t)pVM->rem.s.Env.segs[R_FS].base;2180 pCtx->fsHid.u64Base = pVM->rem.s.Env.segs[R_FS].base; 2181 2181 pCtx->fsHid.u32Limit = pVM->rem.s.Env.segs[R_FS].limit; 2182 2182 pCtx->fsHid.Attr.u = (pVM->rem.s.Env.segs[R_FS].flags >> 8) & 0xF0FF; 2183 2183 2184 pCtx->gsHid.u 32Base = (uint32_t)pVM->rem.s.Env.segs[R_GS].base;2184 pCtx->gsHid.u64Base = pVM->rem.s.Env.segs[R_GS].base; 2185 2185 pCtx->gsHid.u32Limit = pVM->rem.s.Env.segs[R_GS].limit; 2186 2186 pCtx->gsHid.Attr.u = (pVM->rem.s.Env.segs[R_GS].flags >> 8) & 0xF0FF; 2187 2187 2188 pCtx->ssHid.u 32Base = (uint32_t)pVM->rem.s.Env.segs[R_SS].base;2188 pCtx->ssHid.u64Base = pVM->rem.s.Env.segs[R_SS].base; 2189 2189 pCtx->ssHid.u32Limit = pVM->rem.s.Env.segs[R_SS].limit; 2190 2190 pCtx->ssHid.Attr.u = (pVM->rem.s.Env.segs[R_SS].flags >> 8) & 0xF0FF; 2191 2191 2192 pCtx->ldtrHid.u 32Base = (uint32_t)pVM->rem.s.Env.ldt.base;2192 pCtx->ldtrHid.u64Base = pVM->rem.s.Env.ldt.base; 2193 2193 pCtx->ldtrHid.u32Limit = pVM->rem.s.Env.ldt.limit; 2194 2194 pCtx->ldtrHid.Attr.u = (pVM->rem.s.Env.ldt.flags >> 8) & 0xF0FF; 2195 2195 2196 pCtx->trHid.u 32Base = (uint32_t)pVM->rem.s.Env.tr.base;2196 pCtx->trHid.u64Base = pVM->rem.s.Env.tr.base; 2197 2197 pCtx->trHid.u32Limit = pVM->rem.s.Env.tr.limit; 2198 2198 pCtx->trHid.Attr.u = (pVM->rem.s.Env.tr.flags >> 8) & 0xF0FF; … … 2367 2367 2368 2368 /** @todo These values could still be out of sync! */ 2369 pCtx->csHid.u 32Base = (uint32_t)pVM->rem.s.Env.segs[R_CS].base;2369 pCtx->csHid.u64Base = pVM->rem.s.Env.segs[R_CS].base; 2370 2370 pCtx->csHid.u32Limit = pVM->rem.s.Env.segs[R_CS].limit; 2371 2371 /** @note QEmu saves the 2nd dword of the descriptor; we should store the attribute word only! */ 2372 2372 pCtx->csHid.Attr.u = (pVM->rem.s.Env.segs[R_CS].flags >> 8) & 0xFFFF; 2373 2373 2374 pCtx->dsHid.u 32Base = (uint32_t)pVM->rem.s.Env.segs[R_DS].base;2374 pCtx->dsHid.u64Base = pVM->rem.s.Env.segs[R_DS].base; 2375 2375 pCtx->dsHid.u32Limit = pVM->rem.s.Env.segs[R_DS].limit; 2376 2376 pCtx->dsHid.Attr.u = (pVM->rem.s.Env.segs[R_DS].flags >> 8) & 0xFFFF; 2377 2377 2378 pCtx->esHid.u 32Base = (uint32_t)pVM->rem.s.Env.segs[R_ES].base;2378 pCtx->esHid.u64Base = pVM->rem.s.Env.segs[R_ES].base; 2379 2379 pCtx->esHid.u32Limit = pVM->rem.s.Env.segs[R_ES].limit; 2380 2380 pCtx->esHid.Attr.u = (pVM->rem.s.Env.segs[R_ES].flags >> 8) & 0xFFFF; 2381 2381 2382 pCtx->fsHid.u 32Base = (uint32_t)pVM->rem.s.Env.segs[R_FS].base;2382 pCtx->fsHid.u64Base = pVM->rem.s.Env.segs[R_FS].base; 2383 2383 pCtx->fsHid.u32Limit = pVM->rem.s.Env.segs[R_FS].limit; 2384 2384 pCtx->fsHid.Attr.u = (pVM->rem.s.Env.segs[R_FS].flags >> 8) & 0xFFFF; 2385 2385 2386 pCtx->gsHid.u 32Base = (uint32_t)pVM->rem.s.Env.segs[R_GS].base;2386 pCtx->gsHid.u64Base = pVM->rem.s.Env.segs[R_GS].base; 2387 2387 pCtx->gsHid.u32Limit = pVM->rem.s.Env.segs[R_GS].limit; 2388 2388 pCtx->gsHid.Attr.u = (pVM->rem.s.Env.segs[R_GS].flags >> 8) & 0xFFFF; 2389 2389 2390 pCtx->ssHid.u 32Base = (uint32_t)pVM->rem.s.Env.segs[R_SS].base;2390 pCtx->ssHid.u64Base = pVM->rem.s.Env.segs[R_SS].base; 2391 2391 pCtx->ssHid.u32Limit = pVM->rem.s.Env.segs[R_SS].limit; 2392 2392 pCtx->ssHid.Attr.u = (pVM->rem.s.Env.segs[R_SS].flags >> 8) & 0xFFFF; 2393 2393 2394 pCtx->ldtrHid.u 32Base = (uint32_t)pVM->rem.s.Env.ldt.base;2394 pCtx->ldtrHid.u64Base = pVM->rem.s.Env.ldt.base; 2395 2395 pCtx->ldtrHid.u32Limit = pVM->rem.s.Env.ldt.limit; 2396 2396 pCtx->ldtrHid.Attr.u = (pVM->rem.s.Env.ldt.flags >> 8) & 0xFFFF; 2397 2397 2398 pCtx->trHid.u 32Base = (uint32_t)pVM->rem.s.Env.tr.base;2398 pCtx->trHid.u64Base = pVM->rem.s.Env.tr.base; 2399 2399 pCtx->trHid.u32Limit = pVM->rem.s.Env.tr.limit; 2400 2400 pCtx->trHid.Attr.u = (pVM->rem.s.Env.tr.flags >> 8) & 0xFFFF;
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