Changeset 94882 in vbox for trunk/src/VBox/VMM/VMMR0
- Timestamp:
- May 6, 2022 6:33:54 AM (3 years ago)
- svn:sync-xref-src-repo-rev:
- 151284
- Location:
- trunk/src/VBox/VMM/VMMR0
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMR0/HMSVMR0.cpp
r93963 r94882 31 31 #include <VBox/vmm/tm.h> 32 32 #include <VBox/vmm/em.h> 33 #include <VBox/vmm/gcm.h> 33 34 #include <VBox/vmm/gim.h> 34 35 #include <VBox/vmm/apic.h> … … 357 358 static FNSVMEXITHANDLER hmR0SvmExitFerrFreeze; 358 359 static FNSVMEXITHANDLER hmR0SvmExitIret; 360 static FNSVMEXITHANDLER hmR0SvmExitXcptDE; 359 361 static FNSVMEXITHANDLER hmR0SvmExitXcptPF; 360 362 static FNSVMEXITHANDLER hmR0SvmExitXcptUD; … … 1002 1004 pVmcbCtrl0->u32InterceptXcpt |= RT_BIT(X86_XCPT_UD); 1003 1005 1006 /* Apply the exceptions intercepts needed by the GCM fixers. */ 1007 if (pVCpu0->hm.s.fGCMTrapXcptDE) 1008 pVmcbCtrl0->u32InterceptXcpt |= RT_BIT(X86_XCPT_DE); 1009 1004 1010 /* The mesa 3d driver hack needs #GP. */ 1005 1011 if (pVCpu0->hm.s.fTrapXcptGpForLovelyMesaDrv) … … 1154 1160 /* Verify our assumption that GIM providers trap #UD uniformly across VCPUs initially. */ 1155 1161 Assert(pVCpuCur->hm.s.fGIMTrapXcptUD == pVCpu0->hm.s.fGIMTrapXcptUD); 1162 /* Same for GCM, #DE trapping should be uniform across VCPUs. */ 1163 Assert(pVCpuCur->hm.s.fGCMTrapXcptDE == pVCpu0->hm.s.fGCMTrapXcptDE); 1156 1164 } 1157 1165 … … 2682 2690 2683 2691 if (fWhat & CPUMCTX_EXTRN_RFLAGS) 2692 { 2684 2693 pCtx->eflags.u32 = pVmcbGuest->u64RFlags; 2694 if (pVCpu->hmr0.s.fClearTrapFlag) 2695 { 2696 pVCpu->hmr0.s.fClearTrapFlag = false; 2697 pCtx->eflags.Bits.u1TF = 0; 2698 } 2699 } 2685 2700 2686 2701 if (fWhat & CPUMCTX_EXTRN_RSP) … … 3217 3232 Log4Func(("u=%#RX64 u8Vector=%#x Type=%#x ErrorCodeValid=%RTbool ErrorCode=%#RX32\n", pEvent->u, pEvent->n.u8Vector, 3218 3233 (uint8_t)pEvent->n.u3Type, !!pEvent->n.u1ErrorCodeValid, pEvent->n.u32ErrorCode)); 3234 } 3235 3236 3237 /** 3238 * Sets an divide error (\#DE) exception as pending-for-injection into the VM. 3239 * 3240 * @param pVCpu The cross context virtual CPU structure. 3241 */ 3242 DECLINLINE(void) hmR0SvmSetPendingXcptDE(PVMCPUCC pVCpu) 3243 { 3244 SVMEVENT Event; 3245 Event.u = 0; 3246 Event.n.u1Valid = 1; 3247 Event.n.u3Type = SVM_EVENT_EXCEPTION; 3248 Event.n.u8Vector = X86_XCPT_DE; 3249 hmR0SvmSetPendingEvent(pVCpu, &Event, 0 /* GCPtrFaultAddress */); 3219 3250 } 3220 3251 … … 5348 5379 case SVM_EXIT_RDPMC: VMEXIT_CALL_RET(0, hmR0SvmExitRdpmc(pVCpu, pSvmTransient)); 5349 5380 case SVM_EXIT_IRET: VMEXIT_CALL_RET(0, hmR0SvmExitIret(pVCpu, pSvmTransient)); 5381 case SVM_EXIT_XCPT_DE: VMEXIT_CALL_RET(0, hmR0SvmExitXcptDE(pVCpu, pSvmTransient)); 5350 5382 case SVM_EXIT_XCPT_UD: VMEXIT_CALL_RET(0, hmR0SvmExitXcptUD(pVCpu, pSvmTransient)); 5351 5383 case SVM_EXIT_XCPT_MF: VMEXIT_CALL_RET(0, hmR0SvmExitXcptMF(pVCpu, pSvmTransient)); … … 8350 8382 8351 8383 8384 8385 /** 8386 * \#VMEXIT handler for division overflow exceptions (SVM_EXIT_XCPT_1). 8387 * Conditional \#VMEXIT. 8388 */ 8389 HMSVM_EXIT_DECL hmR0SvmExitXcptDE(PVMCPUCC pVCpu, PSVMTRANSIENT pSvmTransient) 8390 { 8391 HMSVM_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pSvmTransient); 8392 HMSVM_ASSERT_NOT_IN_NESTED_GUEST(&pVCpu->cpum.GstCtx); 8393 STAM_COUNTER_INC(&pVCpu->hm.s.StatExitGuestDE); 8394 8395 /* Paranoia; Ensure we cannot be called as a result of event delivery. */ 8396 PSVMVMCB pVmcb = hmR0SvmGetCurrentVmcb(pVCpu); 8397 Assert(!pVmcb->ctrl.ExitIntInfo.n.u1Valid); NOREF(pVmcb); 8398 8399 int rc = VERR_SVM_UNEXPECTED_XCPT_EXIT; 8400 if (pVCpu->hm.s.fGCMTrapXcptDE) 8401 { 8402 HMSVM_CPUMCTX_IMPORT_STATE(pVCpu, HMSVM_CPUMCTX_EXTRN_ALL); 8403 uint8_t cbInstr = 0; 8404 VBOXSTRICTRC rcStrict = GCMXcptDE(pVCpu, &pVCpu->cpum.GstCtx, NULL /* pDis */, &cbInstr); 8405 if (rcStrict == VINF_SUCCESS) 8406 rc = VINF_SUCCESS; /* Restart instruction with modified guest register context. */ 8407 else if (rcStrict == VINF_EM_RAW_GUEST_TRAP) 8408 rc = VERR_NOT_FOUND; /* Deliver the exception. */ 8409 else 8410 Assert(RT_FAILURE(VBOXSTRICTRC_VAL(rcStrict))); 8411 } 8412 8413 /* If the GCM #DE exception handler didn't succeed or wasn't needed, raise #DE. */ 8414 if (RT_FAILURE(rc)) 8415 { 8416 hmR0SvmSetPendingXcptDE(pVCpu); 8417 rc = VINF_SUCCESS; 8418 } 8419 8420 STAM_COUNTER_INC(&pVCpu->hm.s.StatExitGuestDE); 8421 return rc; 8422 } 8423 8424 8352 8425 /** 8353 8426 * \#VMEXIT handler for undefined opcode (SVM_EXIT_XCPT_6). -
trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp
r94844 r94882 34 34 #include <VBox/vmm/tm.h> 35 35 #include <VBox/vmm/em.h> 36 #include <VBox/vmm/gcm.h> 36 37 #include <VBox/vmm/gim.h> 37 38 #include <VBox/vmm/apic.h>
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