Changeset 96032 in vbox
- Timestamp:
- Aug 4, 2022 2:47:23 PM (2 years ago)
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 6 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMAll/IEMAllAImpl.asm
r96028 r96032 3646 3646 IEMIMPL_MEDIA_F2 pmaxsw, 1 3647 3647 IEMIMPL_MEDIA_F2 pmaxsd, 0 3648 IEMIMPL_MEDIA_F2 pabsb, 1 3649 IEMIMPL_MEDIA_F2 pabsw, 1 3650 IEMIMPL_MEDIA_F2 pabsd, 1 3648 3651 3649 3652 ;; … … 4183 4186 4184 4187 4188 ;; 4189 ; Media instruction working on one full sized source registers and one destination (AVX), 4190 ; but no XSAVE state pointer argument. 4191 ; 4192 ; @param 1 The instruction 4193 ; 4194 ; @param A0 Pointer to the destination media register size operand (output). 4195 ; @param A1 Pointer to the source media register size operand (input). 4196 ; 4197 %macro IEMIMPL_MEDIA_OPT_F2_AVX 1 4198 BEGINPROC_FASTCALL iemAImpl_ %+ %1 %+ _u128, 12 4199 PROLOGUE_2_ARGS 4200 IEMIMPL_AVX_PROLOGUE 4201 4202 vmovdqu xmm0, [A1] 4203 %1 xmm0, xmm0 4204 vmovdqu [A0], xmm0 4205 4206 IEMIMPL_AVX_PROLOGUE 4207 EPILOGUE_2_ARGS 4208 ENDPROC iemAImpl_ %+ %1 %+ _u128 4209 4210 BEGINPROC_FASTCALL iemAImpl_ %+ %1 %+ _u256, 12 4211 PROLOGUE_2_ARGS 4212 IEMIMPL_AVX_PROLOGUE 4213 4214 vmovdqu ymm0, [A1] 4215 %1 ymm0, ymm0 4216 vmovdqu [A0], ymm0 4217 4218 IEMIMPL_AVX_PROLOGUE 4219 EPILOGUE_2_ARGS 4220 ENDPROC iemAImpl_ %+ %1 %+ _u256 4221 %endmacro 4222 4223 IEMIMPL_MEDIA_OPT_F2_AVX vpabsb 4224 IEMIMPL_MEDIA_OPT_F2_AVX vpabsw 4225 IEMIMPL_MEDIA_OPT_F2_AVX vpabsd 4226 4227 4185 4228 ; 4186 4229 ; The SSE 4.2 crc32 -
trunk/src/VBox/VMM/VMMAll/IEMAllAImplC.cpp
r96028 r96032 11998 11998 11999 11999 /* 12000 * [V]PABSB / [V]PABSW / [V]PABSD 12001 */ 12002 12003 IEM_DECL_IMPL_DEF(void, iemAImpl_pabsb_u64_fallback,(PCX86FXSTATE pFpuState, uint64_t *puDst, uint64_t const *puSrc)) 12004 { 12005 RTUINT64U const uSrc = { *puSrc }; 12006 RTUINT64U uDstOut = { 0 }; 12007 12008 uDstOut.au8[0] = RT_ABS(uSrc.ai8[0]); 12009 uDstOut.au8[1] = RT_ABS(uSrc.ai8[1]); 12010 uDstOut.au8[2] = RT_ABS(uSrc.ai8[2]); 12011 uDstOut.au8[3] = RT_ABS(uSrc.ai8[3]); 12012 uDstOut.au8[4] = RT_ABS(uSrc.ai8[4]); 12013 uDstOut.au8[5] = RT_ABS(uSrc.ai8[5]); 12014 uDstOut.au8[6] = RT_ABS(uSrc.ai8[6]); 12015 uDstOut.au8[7] = RT_ABS(uSrc.ai8[7]); 12016 *puDst = uDstOut.u; 12017 RT_NOREF(pFpuState); 12018 } 12019 12020 12021 IEM_DECL_IMPL_DEF(void, iemAImpl_pabsb_u128_fallback,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc)) 12022 { 12023 puDst->au8[ 0] = RT_ABS(puSrc->ai8[ 0]); 12024 puDst->au8[ 1] = RT_ABS(puSrc->ai8[ 1]); 12025 puDst->au8[ 2] = RT_ABS(puSrc->ai8[ 2]); 12026 puDst->au8[ 3] = RT_ABS(puSrc->ai8[ 3]); 12027 puDst->au8[ 4] = RT_ABS(puSrc->ai8[ 4]); 12028 puDst->au8[ 5] = RT_ABS(puSrc->ai8[ 5]); 12029 puDst->au8[ 6] = RT_ABS(puSrc->ai8[ 6]); 12030 puDst->au8[ 7] = RT_ABS(puSrc->ai8[ 7]); 12031 puDst->au8[ 8] = RT_ABS(puSrc->ai8[ 8]); 12032 puDst->au8[ 9] = RT_ABS(puSrc->ai8[ 9]); 12033 puDst->au8[10] = RT_ABS(puSrc->ai8[10]); 12034 puDst->au8[11] = RT_ABS(puSrc->ai8[11]); 12035 puDst->au8[12] = RT_ABS(puSrc->ai8[12]); 12036 puDst->au8[13] = RT_ABS(puSrc->ai8[13]); 12037 puDst->au8[14] = RT_ABS(puSrc->ai8[14]); 12038 puDst->au8[15] = RT_ABS(puSrc->ai8[15]); 12039 RT_NOREF(pFpuState); 12040 } 12041 12042 12043 IEM_DECL_IMPL_DEF(void, iemAImpl_pabsw_u64_fallback,(PCX86FXSTATE pFpuState, uint64_t *puDst, uint64_t const *puSrc)) 12044 { 12045 RTUINT64U const uSrc = { *puSrc }; 12046 RTUINT64U uDstOut = { 0 }; 12047 12048 uDstOut.au16[0] = RT_ABS(uSrc.ai16[0]); 12049 uDstOut.au16[1] = RT_ABS(uSrc.ai16[1]); 12050 uDstOut.au16[2] = RT_ABS(uSrc.ai16[2]); 12051 uDstOut.au16[3] = RT_ABS(uSrc.ai16[3]); 12052 *puDst = uDstOut.u; 12053 RT_NOREF(pFpuState); 12054 } 12055 12056 12057 IEM_DECL_IMPL_DEF(void, iemAImpl_pabsw_u128_fallback,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc)) 12058 { 12059 puDst->au16[ 0] = RT_ABS(puSrc->ai16[ 0]); 12060 puDst->au16[ 1] = RT_ABS(puSrc->ai16[ 1]); 12061 puDst->au16[ 2] = RT_ABS(puSrc->ai16[ 2]); 12062 puDst->au16[ 3] = RT_ABS(puSrc->ai16[ 3]); 12063 puDst->au16[ 4] = RT_ABS(puSrc->ai16[ 4]); 12064 puDst->au16[ 5] = RT_ABS(puSrc->ai16[ 5]); 12065 puDst->au16[ 6] = RT_ABS(puSrc->ai16[ 6]); 12066 puDst->au16[ 7] = RT_ABS(puSrc->ai16[ 7]); 12067 RT_NOREF(pFpuState); 12068 } 12069 12070 12071 IEM_DECL_IMPL_DEF(void, iemAImpl_pabsd_u64_fallback,(PCX86FXSTATE pFpuState, uint64_t *puDst, uint64_t const *puSrc)) 12072 { 12073 RTUINT64U const uSrc = { *puSrc }; 12074 RTUINT64U uDstOut = { 0 }; 12075 12076 uDstOut.au32[0] = RT_ABS(uSrc.ai32[0]); 12077 uDstOut.au32[1] = RT_ABS(uSrc.ai32[1]); 12078 *puDst = uDstOut.u; 12079 RT_NOREF(pFpuState); 12080 } 12081 12082 12083 IEM_DECL_IMPL_DEF(void, iemAImpl_pabsd_u128_fallback,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc)) 12084 { 12085 puDst->au32[ 0] = RT_ABS(puSrc->ai32[ 0]); 12086 puDst->au32[ 1] = RT_ABS(puSrc->ai32[ 1]); 12087 puDst->au32[ 2] = RT_ABS(puSrc->ai32[ 2]); 12088 puDst->au32[ 3] = RT_ABS(puSrc->ai32[ 3]); 12089 RT_NOREF(pFpuState); 12090 } 12091 12092 12093 IEM_DECL_IMPL_DEF(void, iemAImpl_vpabsb_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc)) 12094 { 12095 puDst->au8[ 0] = RT_ABS(puSrc->ai8[ 0]); 12096 puDst->au8[ 1] = RT_ABS(puSrc->ai8[ 1]); 12097 puDst->au8[ 2] = RT_ABS(puSrc->ai8[ 2]); 12098 puDst->au8[ 3] = RT_ABS(puSrc->ai8[ 3]); 12099 puDst->au8[ 4] = RT_ABS(puSrc->ai8[ 4]); 12100 puDst->au8[ 5] = RT_ABS(puSrc->ai8[ 5]); 12101 puDst->au8[ 6] = RT_ABS(puSrc->ai8[ 6]); 12102 puDst->au8[ 7] = RT_ABS(puSrc->ai8[ 7]); 12103 puDst->au8[ 8] = RT_ABS(puSrc->ai8[ 8]); 12104 puDst->au8[ 9] = RT_ABS(puSrc->ai8[ 9]); 12105 puDst->au8[10] = RT_ABS(puSrc->ai8[10]); 12106 puDst->au8[11] = RT_ABS(puSrc->ai8[11]); 12107 puDst->au8[12] = RT_ABS(puSrc->ai8[12]); 12108 puDst->au8[13] = RT_ABS(puSrc->ai8[13]); 12109 puDst->au8[14] = RT_ABS(puSrc->ai8[14]); 12110 puDst->au8[15] = RT_ABS(puSrc->ai8[15]); 12111 } 12112 12113 12114 IEM_DECL_IMPL_DEF(void, iemAImpl_vpabsb_u256_fallback,(PRTUINT256U puDst, PCRTUINT256U puSrc)) 12115 { 12116 puDst->au8[ 0] = RT_ABS(puSrc->ai8[ 0]); 12117 puDst->au8[ 1] = RT_ABS(puSrc->ai8[ 1]); 12118 puDst->au8[ 2] = RT_ABS(puSrc->ai8[ 2]); 12119 puDst->au8[ 3] = RT_ABS(puSrc->ai8[ 3]); 12120 puDst->au8[ 4] = RT_ABS(puSrc->ai8[ 4]); 12121 puDst->au8[ 5] = RT_ABS(puSrc->ai8[ 5]); 12122 puDst->au8[ 6] = RT_ABS(puSrc->ai8[ 6]); 12123 puDst->au8[ 7] = RT_ABS(puSrc->ai8[ 7]); 12124 puDst->au8[ 8] = RT_ABS(puSrc->ai8[ 8]); 12125 puDst->au8[ 9] = RT_ABS(puSrc->ai8[ 9]); 12126 puDst->au8[10] = RT_ABS(puSrc->ai8[10]); 12127 puDst->au8[11] = RT_ABS(puSrc->ai8[11]); 12128 puDst->au8[12] = RT_ABS(puSrc->ai8[12]); 12129 puDst->au8[13] = RT_ABS(puSrc->ai8[13]); 12130 puDst->au8[14] = RT_ABS(puSrc->ai8[14]); 12131 puDst->au8[15] = RT_ABS(puSrc->ai8[15]); 12132 puDst->au8[16] = RT_ABS(puSrc->ai8[16]); 12133 puDst->au8[17] = RT_ABS(puSrc->ai8[17]); 12134 puDst->au8[18] = RT_ABS(puSrc->ai8[18]); 12135 puDst->au8[19] = RT_ABS(puSrc->ai8[19]); 12136 puDst->au8[20] = RT_ABS(puSrc->ai8[20]); 12137 puDst->au8[21] = RT_ABS(puSrc->ai8[21]); 12138 puDst->au8[22] = RT_ABS(puSrc->ai8[22]); 12139 puDst->au8[23] = RT_ABS(puSrc->ai8[23]); 12140 puDst->au8[24] = RT_ABS(puSrc->ai8[24]); 12141 puDst->au8[25] = RT_ABS(puSrc->ai8[25]); 12142 puDst->au8[26] = RT_ABS(puSrc->ai8[26]); 12143 puDst->au8[27] = RT_ABS(puSrc->ai8[27]); 12144 puDst->au8[28] = RT_ABS(puSrc->ai8[28]); 12145 puDst->au8[29] = RT_ABS(puSrc->ai8[29]); 12146 puDst->au8[30] = RT_ABS(puSrc->ai8[30]); 12147 puDst->au8[31] = RT_ABS(puSrc->ai8[31]); 12148 } 12149 12150 12151 IEM_DECL_IMPL_DEF(void, iemAImpl_vpabsw_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc)) 12152 { 12153 puDst->au16[ 0] = RT_ABS(puSrc->ai16[ 0]); 12154 puDst->au16[ 1] = RT_ABS(puSrc->ai16[ 1]); 12155 puDst->au16[ 2] = RT_ABS(puSrc->ai16[ 2]); 12156 puDst->au16[ 3] = RT_ABS(puSrc->ai16[ 3]); 12157 puDst->au16[ 4] = RT_ABS(puSrc->ai16[ 4]); 12158 puDst->au16[ 5] = RT_ABS(puSrc->ai16[ 5]); 12159 puDst->au16[ 6] = RT_ABS(puSrc->ai16[ 6]); 12160 puDst->au16[ 7] = RT_ABS(puSrc->ai16[ 7]); 12161 } 12162 12163 12164 IEM_DECL_IMPL_DEF(void, iemAImpl_vpabsw_u256_fallback,(PRTUINT256U puDst, PCRTUINT256U puSrc)) 12165 { 12166 puDst->au16[ 0] = RT_ABS(puSrc->ai16[ 0]); 12167 puDst->au16[ 1] = RT_ABS(puSrc->ai16[ 1]); 12168 puDst->au16[ 2] = RT_ABS(puSrc->ai16[ 2]); 12169 puDst->au16[ 3] = RT_ABS(puSrc->ai16[ 3]); 12170 puDst->au16[ 4] = RT_ABS(puSrc->ai16[ 4]); 12171 puDst->au16[ 5] = RT_ABS(puSrc->ai16[ 5]); 12172 puDst->au16[ 6] = RT_ABS(puSrc->ai16[ 6]); 12173 puDst->au16[ 7] = RT_ABS(puSrc->ai16[ 7]); 12174 puDst->au16[ 8] = RT_ABS(puSrc->ai16[ 8]); 12175 puDst->au16[ 9] = RT_ABS(puSrc->ai16[ 9]); 12176 puDst->au16[10] = RT_ABS(puSrc->ai16[10]); 12177 puDst->au16[11] = RT_ABS(puSrc->ai16[11]); 12178 puDst->au16[12] = RT_ABS(puSrc->ai16[12]); 12179 puDst->au16[13] = RT_ABS(puSrc->ai16[13]); 12180 puDst->au16[14] = RT_ABS(puSrc->ai16[14]); 12181 puDst->au16[15] = RT_ABS(puSrc->ai16[15]); 12182 } 12183 12184 12185 IEM_DECL_IMPL_DEF(void, iemAImpl_vpabsd_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc)) 12186 { 12187 puDst->au32[ 0] = RT_ABS(puSrc->ai32[ 0]); 12188 puDst->au32[ 1] = RT_ABS(puSrc->ai32[ 1]); 12189 puDst->au32[ 2] = RT_ABS(puSrc->ai32[ 2]); 12190 puDst->au32[ 3] = RT_ABS(puSrc->ai32[ 3]); 12191 } 12192 12193 12194 IEM_DECL_IMPL_DEF(void, iemAImpl_vpabsd_u256_fallback,(PRTUINT256U puDst, PCRTUINT256U puSrc)) 12195 { 12196 puDst->au32[ 0] = RT_ABS(puSrc->ai32[ 0]); 12197 puDst->au32[ 1] = RT_ABS(puSrc->ai32[ 1]); 12198 puDst->au32[ 2] = RT_ABS(puSrc->ai32[ 2]); 12199 puDst->au32[ 3] = RT_ABS(puSrc->ai32[ 3]); 12200 puDst->au32[ 4] = RT_ABS(puSrc->ai32[ 4]); 12201 puDst->au32[ 5] = RT_ABS(puSrc->ai32[ 5]); 12202 puDst->au32[ 6] = RT_ABS(puSrc->ai32[ 6]); 12203 puDst->au32[ 7] = RT_ABS(puSrc->ai32[ 7]); 12204 } 12205 12206 12207 /* 12000 12208 * CRC32 (SEE 4.2). 12001 12209 */ -
trunk/src/VBox/VMM/VMMAll/IEMAllInstructionsThree0f38.cpp.h
r96020 r96032 412 412 /* Opcode 0x0f 0x38 0x1b - invalid */ 413 413 /* Opcode 0x66 0x0f 0x38 0x1b - invalid */ 414 415 414 416 /** Opcode 0x0f 0x38 0x1c. */ 415 FNIEMOP_STUB(iemOp_pabsb_Pq_Qq); 417 FNIEMOP_DEF(iemOp_pabsb_Pq_Qq) 418 { 419 IEMOP_MNEMONIC2(RM, PABSB, pabsb, Pq, Qq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 420 return FNIEMOP_CALL_2(iemOpCommonMmx_FullFull_To_Full_Ex, 421 IEM_SELECT_HOST_OR_FALLBACK(fSsse3, iemAImpl_pabsb_u64, &iemAImpl_pabsb_u64_fallback), 422 IEM_GET_GUEST_CPU_FEATURES(pVCpu)->fSsse3); 423 } 424 425 416 426 /** Opcode 0x66 0x0f 0x38 0x1c. */ 417 FNIEMOP_STUB(iemOp_pabsb_Vx_Wx); 427 FNIEMOP_DEF(iemOp_pabsb_Vx_Wx) 428 { 429 IEMOP_MNEMONIC2(RM, PABSB, pabsb, Vx, Wx, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 430 return FNIEMOP_CALL_1(iemOpCommonSsse3_FullFull_To_Full, 431 IEM_SELECT_HOST_OR_FALLBACK(fSsse3, iemAImpl_pabsb_u128, iemAImpl_pabsb_u128_fallback)); 432 433 } 434 435 418 436 /** Opcode 0x0f 0x38 0x1d. */ 419 FNIEMOP_STUB(iemOp_pabsw_Pq_Qq); 437 FNIEMOP_DEF(iemOp_pabsw_Pq_Qq) 438 { 439 IEMOP_MNEMONIC2(RM, PABSW, pabsw, Pq, Qq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 440 return FNIEMOP_CALL_2(iemOpCommonMmx_FullFull_To_Full_Ex, 441 IEM_SELECT_HOST_OR_FALLBACK(fSsse3, iemAImpl_pabsw_u64, &iemAImpl_pabsw_u64_fallback), 442 IEM_GET_GUEST_CPU_FEATURES(pVCpu)->fSsse3); 443 } 444 445 420 446 /** Opcode 0x66 0x0f 0x38 0x1d. */ 421 FNIEMOP_STUB(iemOp_pabsw_Vx_Wx); 447 FNIEMOP_DEF(iemOp_pabsw_Vx_Wx) 448 { 449 IEMOP_MNEMONIC2(RM, PABSW, pabsw, Vx, Wx, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 450 return FNIEMOP_CALL_1(iemOpCommonSsse3_FullFull_To_Full, 451 IEM_SELECT_HOST_OR_FALLBACK(fSsse3, iemAImpl_pabsw_u128, iemAImpl_pabsw_u128_fallback)); 452 453 } 454 455 422 456 /** Opcode 0x0f 0x38 0x1e. */ 423 FNIEMOP_STUB(iemOp_pabsd_Pq_Qq); 457 FNIEMOP_DEF(iemOp_pabsd_Pq_Qq) 458 { 459 IEMOP_MNEMONIC2(RM, PABSD, pabsd, Pq, Qq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 460 return FNIEMOP_CALL_2(iemOpCommonMmx_FullFull_To_Full_Ex, 461 IEM_SELECT_HOST_OR_FALLBACK(fSsse3, iemAImpl_pabsd_u64, &iemAImpl_pabsd_u64_fallback), 462 IEM_GET_GUEST_CPU_FEATURES(pVCpu)->fSsse3); 463 } 464 465 424 466 /** Opcode 0x66 0x0f 0x38 0x1e. */ 425 FNIEMOP_STUB(iemOp_pabsd_Vx_Wx); 467 FNIEMOP_DEF(iemOp_pabsd_Vx_Wx) 468 { 469 IEMOP_MNEMONIC2(RM, PABSD, pabsd, Vx, Wx, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 470 return FNIEMOP_CALL_1(iemOpCommonSsse3_FullFull_To_Full, 471 IEM_SELECT_HOST_OR_FALLBACK(fSsse3, iemAImpl_pabsd_u128, iemAImpl_pabsd_u128_fallback)); 472 473 } 474 475 426 476 /* Opcode 0x0f 0x38 0x1f - invalid */ 427 477 /* Opcode 0x66 0x0f 0x38 0x1f - invalid */ -
trunk/src/VBox/VMM/VMMAll/IEMAllInstructionsVexMap1.cpp.h
r96028 r96032 279 279 } 280 280 281 282 /** 283 * Common worker for AVX2 instructions on the forms: 284 * - vpxxx xmm0, xmm1/mem128 285 * - vpxxx ymm0, ymm1/mem256 286 * 287 * Takes function table for function w/o implicit state parameter. 288 * 289 * Exceptions type 4. AVX cpuid check for 128-bit operation, AVX2 for 256-bit. 290 */ 291 FNIEMOP_DEF_1(iemOpCommonAvxAvx2_Vx_Wx_Opt, PCIEMOPMEDIAOPTF2, pImpl) 292 { 293 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); 294 if (IEM_IS_MODRM_REG_MODE(bRm)) 295 { 296 /* 297 * Register, register. 298 */ 299 if (pVCpu->iem.s.uVexLength) 300 { 301 IEMOP_HLP_DONE_VEX_DECODING_EX(fAvx2); 302 IEM_MC_BEGIN(2, 2); 303 IEM_MC_LOCAL(RTUINT256U, uDst); 304 IEM_MC_LOCAL(RTUINT256U, uSrc); 305 IEM_MC_ARG_LOCAL_REF(PRTUINT256U, puDst, uDst, 0); 306 IEM_MC_ARG_LOCAL_REF(PCRTUINT256U, puSrc, uSrc, 1); 307 IEM_MC_MAYBE_RAISE_AVX2_RELATED_XCPT(); 308 IEM_MC_PREPARE_AVX_USAGE(); 309 IEM_MC_FETCH_YREG_U256(uSrc, IEM_GET_MODRM_RM(pVCpu, bRm)); 310 IEM_MC_CALL_VOID_AIMPL_2(pImpl->pfnU256, puDst, puSrc); 311 IEM_MC_STORE_YREG_U256_ZX_VLMAX(IEM_GET_MODRM_REG(pVCpu, bRm), uDst); 312 IEM_MC_ADVANCE_RIP(); 313 IEM_MC_END(); 314 } 315 else 316 { 317 IEMOP_HLP_DONE_VEX_DECODING_EX(fAvx); 318 IEM_MC_BEGIN(2, 0); 319 IEM_MC_ARG(PRTUINT128U, puDst, 0); 320 IEM_MC_ARG(PCRTUINT128U, puSrc, 1); 321 IEM_MC_MAYBE_RAISE_AVX2_RELATED_XCPT(); 322 IEM_MC_PREPARE_AVX_USAGE(); 323 IEM_MC_REF_XREG_U128(puDst, IEM_GET_MODRM_REG(pVCpu, bRm)); 324 IEM_MC_REF_XREG_U128_CONST(puSrc, IEM_GET_MODRM_RM(pVCpu, bRm)); 325 IEM_MC_CALL_VOID_AIMPL_2(pImpl->pfnU128, puDst, puSrc); 326 IEM_MC_CLEAR_YREG_128_UP( IEM_GET_MODRM_REG(pVCpu, bRm)); 327 IEM_MC_ADVANCE_RIP(); 328 IEM_MC_END(); 329 } 330 } 331 else 332 { 333 /* 334 * Register, memory. 335 */ 336 if (pVCpu->iem.s.uVexLength) 337 { 338 IEM_MC_BEGIN(2, 3); 339 IEM_MC_LOCAL(RTUINT256U, uDst); 340 IEM_MC_LOCAL(RTUINT256U, uSrc); 341 IEM_MC_LOCAL(RTGCPTR, GCPtrEffSrc); 342 IEM_MC_ARG_LOCAL_REF(PRTUINT256U, puDst, uDst, 0); 343 IEM_MC_ARG_LOCAL_REF(PCRTUINT256U, puSrc, uSrc, 1); 344 345 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0); 346 IEMOP_HLP_DONE_VEX_DECODING_EX(fAvx2); 347 IEM_MC_MAYBE_RAISE_AVX2_RELATED_XCPT(); 348 IEM_MC_PREPARE_AVX_USAGE(); 349 350 IEM_MC_FETCH_MEM_U256_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 351 IEM_MC_CALL_VOID_AIMPL_2(pImpl->pfnU256, puDst, puSrc); 352 IEM_MC_STORE_YREG_U256_ZX_VLMAX( IEM_GET_MODRM_REG(pVCpu, bRm), uDst); 353 354 IEM_MC_ADVANCE_RIP(); 355 IEM_MC_END(); 356 } 357 else 358 { 359 IEM_MC_BEGIN(2, 2); 360 IEM_MC_LOCAL(RTUINT128U, uSrc); 361 IEM_MC_LOCAL(RTGCPTR, GCPtrEffSrc); 362 IEM_MC_ARG(PRTUINT128U, puDst, 0); 363 IEM_MC_ARG_LOCAL_REF(PCRTUINT128U, puSrc, uSrc, 1); 364 365 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0); 366 IEMOP_HLP_DONE_VEX_DECODING_EX(fAvx); 367 IEM_MC_MAYBE_RAISE_AVX2_RELATED_XCPT(); 368 IEM_MC_PREPARE_AVX_USAGE(); 369 370 IEM_MC_FETCH_MEM_U128_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 371 IEM_MC_REF_XREG_U128(puDst, IEM_GET_MODRM_REG(pVCpu, bRm)); 372 IEM_MC_CALL_VOID_AIMPL_2(pImpl->pfnU128, puDst, puSrc); 373 IEM_MC_CLEAR_YREG_128_UP( IEM_GET_MODRM_REG(pVCpu, bRm)); 374 375 IEM_MC_ADVANCE_RIP(); 376 IEM_MC_END(); 377 } 378 } 379 return VINF_SUCCESS; 380 } 281 381 282 382 -
trunk/src/VBox/VMM/VMMAll/IEMAllInstructionsVexMap2.cpp.h
r96020 r96032 215 215 /* Opcode VEX.66.0F38 0x1b - invalid */ 216 216 /* Opcode VEX.0F38 0x1c - invalid. */ 217 218 217 219 /** Opcode VEX.66.0F38 0x1c. */ 218 FNIEMOP_STUB(iemOp_vpabsb_Vx_Wx); 220 FNIEMOP_DEF(iemOp_vpabsb_Vx_Wx) 221 { 222 IEMOP_MNEMONIC2(VEX_RM, VPABSB, vpabsb, Vx, Wx, DISOPTYPE_HARMLESS, 0); 223 IEMOPMEDIAOPTF2_INIT_VARS(vpabsb); 224 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Wx_Opt, IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &s_Host, &s_Fallback)); 225 } 226 227 219 228 /* Opcode VEX.0F38 0x1d - invalid. */ 229 230 220 231 /** Opcode VEX.66.0F38 0x1d. */ 221 FNIEMOP_STUB(iemOp_vpabsw_Vx_Wx); 232 FNIEMOP_DEF(iemOp_vpabsw_Vx_Wx) 233 { 234 IEMOP_MNEMONIC2(VEX_RM, VPABSW, vpabsw, Vx, Wx, DISOPTYPE_HARMLESS, 0); 235 IEMOPMEDIAOPTF2_INIT_VARS(vpabsw); 236 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Wx_Opt, IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &s_Host, &s_Fallback)); 237 } 238 222 239 /* Opcode VEX.0F38 0x1e - invalid. */ 240 241 223 242 /** Opcode VEX.66.0F38 0x1e. */ 224 FNIEMOP_STUB(iemOp_vpabsd_Vx_Wx); 243 FNIEMOP_DEF(iemOp_vpabsd_Vx_Wx) 244 { 245 IEMOP_MNEMONIC2(VEX_RM, VPABSD, vpabsd, Vx, Wx, DISOPTYPE_HARMLESS, 0); 246 IEMOPMEDIAOPTF2_INIT_VARS(vpabsd); 247 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Wx_Opt, IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &s_Host, &s_Fallback)); 248 } 249 250 225 251 /* Opcode VEX.0F38 0x1f - invalid */ 226 252 /* Opcode VEX.66.0F38 0x1f - invalid */ -
trunk/src/VBox/VMM/include/IEMInternal.h
r96028 r96032 1763 1763 typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAOPTF3U256,(PRTUINT256U puDst, PCRTUINT256U puSrc1, PCRTUINT256U puSrc2)); 1764 1764 typedef FNIEMAIMPLMEDIAOPTF3U256 *PFNIEMAIMPLMEDIAOPTF3U256; 1765 typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAOPTF2U256,(PRTUINT256U puDst, PCRTUINT256U puSrc)); 1766 typedef FNIEMAIMPLMEDIAOPTF2U256 *PFNIEMAIMPLMEDIAOPTF2U256; 1765 1767 FNIEMAIMPLMEDIAF2U64 iemAImpl_pshufb_u64, iemAImpl_pshufb_u64_fallback; 1766 1768 FNIEMAIMPLMEDIAF2U64 iemAImpl_pand_u64, iemAImpl_pandn_u64, iemAImpl_por_u64, iemAImpl_pxor_u64; … … 1779 1781 FNIEMAIMPLMEDIAF2U64 iemAImpl_pminub_u64, iemAImpl_pmaxub_u64; 1780 1782 FNIEMAIMPLMEDIAF2U64 iemAImpl_pminsw_u64, iemAImpl_pmaxsw_u64; 1783 FNIEMAIMPLMEDIAF2U64 iemAImpl_pabsb_u64, iemAImpl_pabsb_u64_fallback; 1784 FNIEMAIMPLMEDIAF2U64 iemAImpl_pabsw_u64, iemAImpl_pabsw_u64_fallback; 1785 FNIEMAIMPLMEDIAF2U64 iemAImpl_pabsd_u64, iemAImpl_pabsd_u64_fallback; 1781 1786 FNIEMAIMPLMEDIAOPTF2U64 iemAImpl_psllw_u64, iemAImpl_psrlw_u64, iemAImpl_psraw_u64; 1782 1787 FNIEMAIMPLMEDIAOPTF2U64 iemAImpl_pslld_u64, iemAImpl_psrld_u64, iemAImpl_psrad_u64; … … 1817 1822 FNIEMAIMPLMEDIAF2U128 iemAImpl_pmaxsw_u128; 1818 1823 FNIEMAIMPLMEDIAF2U128 iemAImpl_pmaxsd_u128, iemAImpl_pmaxsd_u128_fallback; 1824 FNIEMAIMPLMEDIAF2U128 iemAImpl_pabsb_u128, iemAImpl_pabsb_u128_fallback; 1825 FNIEMAIMPLMEDIAF2U128 iemAImpl_pabsw_u128, iemAImpl_pabsw_u128_fallback; 1826 FNIEMAIMPLMEDIAF2U128 iemAImpl_pabsd_u128, iemAImpl_pabsd_u128_fallback; 1819 1827 FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_packsswb_u128, iemAImpl_packuswb_u128; 1820 1828 FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_packssdw_u128, iemAImpl_packusdw_u128; … … 1869 1877 FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpavgw_u128, iemAImpl_vpavgw_u128_fallback; 1870 1878 1879 FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_vpabsb_u128, iemAImpl_vpabsb_u128_fallback; 1880 FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_vpabsw_u128, iemAImpl_vpabsd_u128_fallback; 1881 FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_vpabsd_u128, iemAImpl_vpabsw_u128_fallback; 1882 1871 1883 FNIEMAIMPLMEDIAF3U256 iemAImpl_vpshufb_u256, iemAImpl_vpshufb_u256_fallback; 1872 1884 FNIEMAIMPLMEDIAF3U256 iemAImpl_vpand_u256, iemAImpl_vpand_u256_fallback; … … 1912 1924 FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpavgb_u256, iemAImpl_vpavgb_u256_fallback; 1913 1925 FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpavgw_u256, iemAImpl_vpavgw_u256_fallback; 1926 1927 FNIEMAIMPLMEDIAOPTF2U256 iemAImpl_vpabsb_u256, iemAImpl_vpabsb_u256_fallback; 1928 FNIEMAIMPLMEDIAOPTF2U256 iemAImpl_vpabsw_u256, iemAImpl_vpabsw_u256_fallback; 1929 FNIEMAIMPLMEDIAOPTF2U256 iemAImpl_vpabsd_u256, iemAImpl_vpabsd_u256_fallback; 1914 1930 /** @} */ 1915 1931 … … 2164 2180 RT_CONCAT3(iemAImpl_,a_InstrNm,_u128_fallback), RT_CONCAT3(iemAImpl_,a_InstrNm,_u256_fallback)) 2165 2181 2166 2182 /** 2183 * Function table for media instruction taking one full sized media source 2184 * registers and one full sized destination register, but no additional state 2185 * (AVX). 2186 */ 2187 typedef struct IEMOPMEDIAOPTF2 2188 { 2189 PFNIEMAIMPLMEDIAOPTF2U128 pfnU128; 2190 PFNIEMAIMPLMEDIAOPTF2U256 pfnU256; 2191 } IEMOPMEDIAOPTF2; 2192 /** Pointer to a media operation function table for 2 full sized ops (AVX). */ 2193 typedef IEMOPMEDIAOPTF2 const *PCIEMOPMEDIAOPTF2; 2194 2195 /** @def IEMOPMEDIAOPTF2_INIT_VARS_EX 2196 * Declares a s_Host (x86 & amd64 only) and a s_Fallback variable with the 2197 * given functions as initializers. For use in AVX functions where a pair of 2198 * functions are only used once and the function table need not be public. */ 2199 #ifndef TST_IEM_CHECK_MC 2200 # if (defined(RT_ARCH_X86) || defined(RT_ARCH_AMD64)) && !defined(IEM_WITHOUT_ASSEMBLY) 2201 # define IEMOPMEDIAOPTF2_INIT_VARS_EX(a_pfnHostU128, a_pfnHostU256, a_pfnFallbackU128, a_pfnFallbackU256) \ 2202 static IEMOPMEDIAOPTF2 const s_Host = { a_pfnHostU128, a_pfnHostU256 }; \ 2203 static IEMOPMEDIAOPTF2 const s_Fallback = { a_pfnFallbackU128, a_pfnFallbackU256 } 2204 # else 2205 # define IEMOPMEDIAOPTF2_INIT_VARS_EX(a_pfnU128, a_pfnU256, a_pfnFallbackU128, a_pfnFallbackU256) \ 2206 static IEMOPMEDIAOPTF2 const s_Fallback = { a_pfnFallbackU128, a_pfnFallbackU256 } 2207 # endif 2208 #else 2209 # define IEMOPMEDIAOPTF2_INIT_VARS_EX(a_pfnU128, a_pfnU256, a_pfnFallbackU128, a_pfnFallbackU256) (void)0 2210 #endif 2211 /** @def IEMOPMEDIAOPTF2_INIT_VARS 2212 * Generate AVX function tables for the @a a_InstrNm instruction. 2213 * @sa IEMOPMEDIAOPTF2_INIT_VARS_EX */ 2214 #define IEMOPMEDIAOPTF2_INIT_VARS(a_InstrNm) \ 2215 IEMOPMEDIAOPTF2_INIT_VARS_EX(RT_CONCAT3(iemAImpl_,a_InstrNm,_u128), RT_CONCAT3(iemAImpl_,a_InstrNm,_u256),\ 2216 RT_CONCAT3(iemAImpl_,a_InstrNm,_u128_fallback), RT_CONCAT3(iemAImpl_,a_InstrNm,_u256_fallback)) 2167 2217 /** @} */ 2168 2218
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