Changeset 96251 in vbox for trunk/include
- Timestamp:
- Aug 17, 2022 9:16:21 AM (2 years ago)
- File:
-
- 1 edited
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trunk/include/iprt/x86.h
r96211 r96251 3457 3457 /** Misaligned Exception Mask (AMD MISALIGNSSE). */ 3458 3458 #define X86_MXCSR_MM RT_BIT_32(17) 3459 /** Bits which should be zero, apparently. */ 3460 #define X86_MXCSR_ZERO_MASK UINT32_C(0xfffd0000) 3459 3461 /** @} */ 3460 3462
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